DE69203144T2 - Verfahren zur Lokalpassivierung eines Substrates mit einer amorphen wasserstoffhaltigen Kohlenstoffschicht und Verfahren zur Herstellung von Dünnschicht-Transistoren auf diesem passivierten Substrat. - Google Patents

Verfahren zur Lokalpassivierung eines Substrates mit einer amorphen wasserstoffhaltigen Kohlenstoffschicht und Verfahren zur Herstellung von Dünnschicht-Transistoren auf diesem passivierten Substrat.

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Publication number
DE69203144T2
DE69203144T2 DE69203144T DE69203144T DE69203144T2 DE 69203144 T2 DE69203144 T2 DE 69203144T2 DE 69203144 T DE69203144 T DE 69203144T DE 69203144 T DE69203144 T DE 69203144T DE 69203144 T2 DE69203144 T2 DE 69203144T2
Authority
DE
Germany
Prior art keywords
substrate
passivating
locally
film transistors
carbon layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69203144T
Other languages
English (en)
Other versions
DE69203144D1 (de
Inventor
Yannick Chouan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Orange SA
Original Assignee
France Telecom SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by France Telecom SA filed Critical France Telecom SA
Publication of DE69203144D1 publication Critical patent/DE69203144D1/de
Application granted granted Critical
Publication of DE69203144T2 publication Critical patent/DE69203144T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4803Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • H01L21/481Insulating layers on insulating parts, with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15Ceramic or glass substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78636Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with supplementary region or layer for improving the flatness of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02115Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/10Lift-off masking
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/15Silicon on sapphire SOS
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/958Passivation layer
DE69203144T 1991-04-23 1992-04-22 Verfahren zur Lokalpassivierung eines Substrates mit einer amorphen wasserstoffhaltigen Kohlenstoffschicht und Verfahren zur Herstellung von Dünnschicht-Transistoren auf diesem passivierten Substrat. Expired - Fee Related DE69203144T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9104994A FR2675947A1 (fr) 1991-04-23 1991-04-23 Procede de passivation locale d'un substrat par une couche de carbone amorphe hydrogene et procede de fabrication de transistors en couches minces sur ce substrat passive.

Publications (2)

Publication Number Publication Date
DE69203144D1 DE69203144D1 (de) 1995-08-03
DE69203144T2 true DE69203144T2 (de) 1996-02-15

Family

ID=9412160

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69203144T Expired - Fee Related DE69203144T2 (de) 1991-04-23 1992-04-22 Verfahren zur Lokalpassivierung eines Substrates mit einer amorphen wasserstoffhaltigen Kohlenstoffschicht und Verfahren zur Herstellung von Dünnschicht-Transistoren auf diesem passivierten Substrat.

Country Status (5)

Country Link
US (1) US5250451A (de)
EP (1) EP0511096B1 (de)
JP (1) JPH07183524A (de)
DE (1) DE69203144T2 (de)
FR (1) FR2675947A1 (de)

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US5763997A (en) 1992-03-16 1998-06-09 Si Diamond Technology, Inc. Field emission display device
US5679043A (en) 1992-03-16 1997-10-21 Microelectronics And Computer Technology Corporation Method of making a field emitter
US5686791A (en) 1992-03-16 1997-11-11 Microelectronics And Computer Technology Corp. Amorphic diamond film flat field emission cathode
US5449970A (en) 1992-03-16 1995-09-12 Microelectronics And Computer Technology Corporation Diode structure flat panel display
US5675216A (en) 1992-03-16 1997-10-07 Microelectronics And Computer Technololgy Corp. Amorphic diamond film flat field emission cathode
US5543684A (en) 1992-03-16 1996-08-06 Microelectronics And Computer Technology Corporation Flat panel display based on diamond thin films
WO1995012835A1 (en) 1993-11-04 1995-05-11 Microelectronics And Computer Technology Corporation Methods for fabricating flat panel display systems and components
FR2719416B1 (fr) * 1994-04-29 1996-07-05 Thomson Lcd Procédé de passivation des flancs d'un composant semiconducteur à couches minces.
US6204834B1 (en) 1994-08-17 2001-03-20 Si Diamond Technology, Inc. System and method for achieving uniform screen brightness within a matrix display
US5531880A (en) * 1994-09-13 1996-07-02 Microelectronics And Computer Technology Corporation Method for producing thin, uniform powder phosphor for display screens
JPH08160405A (ja) * 1994-12-09 1996-06-21 Seiko Instr Inc 表示装置及びその製造方法
US5628659A (en) * 1995-04-24 1997-05-13 Microelectronics And Computer Corporation Method of making a field emission electron source with random micro-tip structures
US6296740B1 (en) 1995-04-24 2001-10-02 Si Diamond Technology, Inc. Pretreatment process for a surface texturing process
US5736448A (en) * 1995-12-04 1998-04-07 General Electric Company Fabrication method for thin film capacitors
US6927826B2 (en) * 1997-03-26 2005-08-09 Semiconductor Energy Labaratory Co., Ltd. Display device
JPH10268360A (ja) 1997-03-26 1998-10-09 Semiconductor Energy Lab Co Ltd 表示装置
US5874745A (en) * 1997-08-05 1999-02-23 International Business Machines Corporation Thin film transistor with carbonaceous gate dielectric
US5976396A (en) * 1998-02-10 1999-11-02 Feldman Technology Corporation Method for etching
JPH11307782A (ja) 1998-04-24 1999-11-05 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
US6417013B1 (en) 1999-01-29 2002-07-09 Plasma-Therm, Inc. Morphed processing of semiconductor devices
US6475836B1 (en) 1999-03-29 2002-11-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US6995821B1 (en) * 1999-04-23 2006-02-07 International Business Machines Corporation Methods of reducing unbalanced DC voltage between two electrodes of reflective liquid crystal display by thin film passivation
DE102004002908B4 (de) * 2004-01-20 2008-01-24 Infineon Technologies Ag Verfahren zum Herstellen eines Halbleiterbauelements oder einer mikromechanischen Struktur
US7867627B2 (en) * 2004-12-13 2011-01-11 Silcotek Corporation Process for the modification of substrate surfaces through the deposition of amorphous silicon layers followed by surface functionalization with organic molecules and functionalized structures
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US8440467B2 (en) * 2007-09-28 2013-05-14 William Marsh Rice University Electronic switching, memory, and sensor devices from a discontinuous graphene and/or graphite carbon layer on dielectric materials
US8623231B2 (en) * 2008-06-11 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. Method for etching an ultra thin film
KR101773213B1 (ko) 2009-10-27 2017-08-30 실코텍 코포레이션 화학적 증기 증착 코팅, 물품, 및 방법
CN103237920B (zh) 2010-10-05 2016-01-13 西尔科特克公司 耐磨涂层、包含该耐磨涂层的产品以及涂覆该耐磨涂层的方法
WO2014186470A1 (en) 2013-05-14 2014-11-20 Silcotek Corp. Vapor phase treatment of amorphous carbon films with (perfluoro 1,1,2,2 tetrahydroalkyl)trialkoxysilane
US11292924B2 (en) 2014-04-08 2022-04-05 Silcotek Corp. Thermal chemical vapor deposition coated article and process
US9915001B2 (en) 2014-09-03 2018-03-13 Silcotek Corp. Chemical vapor deposition process and coated article
US10316408B2 (en) 2014-12-12 2019-06-11 Silcotek Corp. Delivery device, manufacturing system and process of manufacturing
US10876206B2 (en) 2015-09-01 2020-12-29 Silcotek Corp. Thermal chemical vapor deposition coating
US10323321B1 (en) 2016-01-08 2019-06-18 Silcotek Corp. Thermal chemical vapor deposition process and coated article
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Also Published As

Publication number Publication date
EP0511096B1 (de) 1995-06-28
DE69203144D1 (de) 1995-08-03
US5250451A (en) 1993-10-05
EP0511096A1 (de) 1992-10-28
FR2675947A1 (fr) 1992-10-30
JPH07183524A (ja) 1995-07-21
FR2675947B1 (de) 1997-02-07

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