DE69128123D1 - Verfahren zum Herstellen selbst-ausrichtender bipolarer Transistoren mit Heteroübergang - Google Patents

Verfahren zum Herstellen selbst-ausrichtender bipolarer Transistoren mit Heteroübergang

Info

Publication number
DE69128123D1
DE69128123D1 DE69128123T DE69128123T DE69128123D1 DE 69128123 D1 DE69128123 D1 DE 69128123D1 DE 69128123 T DE69128123 T DE 69128123T DE 69128123 T DE69128123 T DE 69128123T DE 69128123 D1 DE69128123 D1 DE 69128123D1
Authority
DE
Germany
Prior art keywords
heterojunction
self
production
bipolar transistors
aligning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69128123T
Other languages
English (en)
Other versions
DE69128123T2 (de
Inventor
Burhan Bayraktaroglu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69128123D1 publication Critical patent/DE69128123D1/de
Application granted granted Critical
Publication of DE69128123T2 publication Critical patent/DE69128123T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/6631—Bipolar junction transistors [BJT] with an active layer made of a group 13/15 material
    • H01L29/66318—Heterojunction transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/072—Heterojunctions
DE69128123T 1990-08-31 1991-08-02 Verfahren zum Herstellen selbst-ausrichtender bipolarer Transistoren mit Heteroübergang Expired - Fee Related DE69128123T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US57654090A 1990-08-31 1990-08-31

Publications (2)

Publication Number Publication Date
DE69128123D1 true DE69128123D1 (de) 1997-12-11
DE69128123T2 DE69128123T2 (de) 1998-03-05

Family

ID=24304857

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69128123T Expired - Fee Related DE69128123T2 (de) 1990-08-31 1991-08-02 Verfahren zum Herstellen selbst-ausrichtender bipolarer Transistoren mit Heteroübergang

Country Status (5)

Country Link
US (1) US5344786A (de)
EP (1) EP0478923B1 (de)
JP (1) JPH04234130A (de)
KR (1) KR100235568B1 (de)
DE (1) DE69128123T2 (de)

Families Citing this family (16)

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Publication number Priority date Publication date Assignee Title
US5298438A (en) * 1992-08-31 1994-03-29 Texas Instruments Incorporated Method of reducing extrinsic base-collector capacitance in bipolar transistors
US5700701A (en) * 1992-10-30 1997-12-23 Texas Instruments Incorporated Method for reducing junction capacitance and increasing current gain in collector-up bipolar transistors
US5266505A (en) * 1992-12-22 1993-11-30 International Business Machines Corporation Image reversal process for self-aligned implants in planar epitaxial-base bipolar transistors
PL317379A1 (en) * 1994-05-27 1997-04-01 Ciba Geigy Ag Supercritically excited luminescence detecting process
US5445976A (en) * 1994-08-09 1995-08-29 Texas Instruments Incorporated Method for producing bipolar transistor having reduced base-collector capacitance
US5665614A (en) * 1995-06-06 1997-09-09 Hughes Electronics Method for making fully self-aligned submicron heterojunction bipolar transistor
EP0810646A3 (de) * 1996-05-13 1998-01-14 Trw Inc. Verfahren zur Herstellung eines Heterobipolartransistors mit sehr hohem Verstärkungsfaktor
US5736417A (en) * 1996-05-13 1998-04-07 Trw Inc. Method of fabricating double photoresist layer self-aligned heterojunction bipolar transistor
US5804487A (en) * 1996-07-10 1998-09-08 Trw Inc. Method of fabricating high βHBT devices
JP2001510636A (ja) * 1997-02-03 2001-07-31 ザ ウィタカー コーポレーション ヘテロジャンクションバイポーラトランジスタにおける不動化棚を製造する自己整合方法
TW483171B (en) * 2000-03-16 2002-04-11 Trw Inc Ultra high speed heterojunction bipolar transistor having a cantilevered base.
DE10104776A1 (de) * 2001-02-02 2002-08-22 Infineon Technologies Ag Bipolartransistor und Verfahren zu dessen Herstellung
DE102006007053B4 (de) * 2006-02-15 2008-08-14 Infineon Technologies Austria Ag Optimierte dielektrische Isolationsstrukturen und Verfahren zu deren Herstellung
US8092704B2 (en) * 2008-12-30 2012-01-10 Hitachi Global Storage Technologies Netherlands B.V. System, method and apparatus for fabricating a c-aperture or E-antenna plasmonic near field source for thermal assisted recording applications
CN104124155A (zh) * 2014-07-02 2014-10-29 中国电子科技集团公司第五十五研究所 一种磷化铟异质结晶体管侧墙保护发射极制作方法
CN104485281A (zh) * 2014-10-27 2015-04-01 中国电子科技集团公司第五十五研究所 磷化铟异质结晶体管发射区材料干湿法结合刻蚀制作方法

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US4272348A (en) * 1978-11-20 1981-06-09 International Business Machines Corporation Bubble device fabrication
JPS5616663A (en) * 1979-07-17 1981-02-17 Teikoku Piston Ring Co Ltd Member having formed cavitation resistant sprayed coat
US4380774A (en) * 1980-12-19 1983-04-19 The United States Of America As Represented By The Secretary Of The Navy High-performance bipolar microwave transistor
US4593305A (en) * 1983-05-17 1986-06-03 Kabushiki Kaisha Toshiba Heterostructure bipolar transistor
US4617724A (en) * 1983-06-30 1986-10-21 Fujitsu Limited Process for fabricating heterojunction bipolar transistor with low base resistance
US4672419A (en) * 1984-06-25 1987-06-09 Texas Instruments Incorporated Metal gate, interconnect and contact system for VLSI devices
US4674174A (en) * 1984-10-17 1987-06-23 Kabushiki Kaisha Toshiba Method for forming a conductor pattern using lift-off
JPS61147571A (ja) * 1984-12-21 1986-07-05 Toshiba Corp ヘテロ接合バイポ−ラトランジスタの製造方法
EP0206787B1 (de) * 1985-06-21 1991-12-18 Matsushita Electric Industrial Co., Ltd. Bipolarer Transistor mit Heteroübergang und Verfahren zu seiner Herstellung
DE3788527T2 (de) * 1986-04-01 1994-05-11 Matsushita Electric Ind Co Ltd Bipolarer Transistor und sein Herstellungsverfahren.
JPH07114193B2 (ja) * 1986-08-05 1995-12-06 富士通株式会社 微細パタ−ンの形成方法
JPS63114258A (ja) * 1986-10-31 1988-05-19 Sony Corp ヘテロ接合型バイポ−ラトランジスタ
JPS63124465A (ja) * 1986-11-13 1988-05-27 Nec Corp バイポ−ラトランジスタの製造方法
EP0281235B1 (de) * 1987-01-30 1993-07-14 Texas Instruments Incorporated Verfahren zum Herstellen eines bipolaren Transistors unter Verwendung von CMOS-Techniken
JPS63200567A (ja) * 1987-02-17 1988-08-18 Toshiba Corp ヘテロ接合バイポ−ラトランジスタおよびその製造方法
US4872040A (en) * 1987-04-23 1989-10-03 International Business Machines Corporation Self-aligned heterojunction transistor
US5124270A (en) * 1987-09-18 1992-06-23 Kabushiki Kaisha Toshiba Bipolar transistor having external base region
FR2625613B1 (de) * 1987-12-30 1990-05-04 Labo Electronique Physique
JPH01189167A (ja) * 1988-01-25 1989-07-28 Matsushita Electric Ind Co Ltd バイポーラトランジスタの製造方法
JPH01238161A (ja) * 1988-03-18 1989-09-22 Fujitsu Ltd 半導体装置及びその製造方法
JP2683552B2 (ja) * 1988-04-25 1997-12-03 日本電信電話株式会社 バイポーラトランジスタの製法
US4935797A (en) * 1988-10-31 1990-06-19 International Business Machines Corporation Heterojunction bipolar transistors
JP2907452B2 (ja) * 1989-08-30 1999-06-21 三菱化学株式会社 化合物半導体用電極
JP2511932Y2 (ja) * 1990-03-06 1996-09-25 株式会社ナブコ 流路接続装置
JPH04188964A (ja) * 1990-11-22 1992-07-07 Hitachi Ltd 放送映像システム
US5168071A (en) * 1991-04-05 1992-12-01 At&T Bell Laboratories Method of making semiconductor devices
US5171697A (en) * 1991-06-28 1992-12-15 Texas Instruments Incorporated Method of forming multiple layer collector structure for bipolar transistors

Also Published As

Publication number Publication date
EP0478923A2 (de) 1992-04-08
KR100235568B1 (ko) 1999-12-15
JPH04234130A (ja) 1992-08-21
KR920005325A (ko) 1992-03-28
EP0478923A3 (en) 1993-04-21
US5344786A (en) 1994-09-06
EP0478923B1 (de) 1997-11-05
DE69128123T2 (de) 1998-03-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee