DE69122713D1 - Fehlertolerantes rechnersystem - Google Patents

Fehlertolerantes rechnersystem

Info

Publication number
DE69122713D1
DE69122713D1 DE69122713T DE69122713T DE69122713D1 DE 69122713 D1 DE69122713 D1 DE 69122713D1 DE 69122713 T DE69122713 T DE 69122713T DE 69122713 T DE69122713 T DE 69122713T DE 69122713 D1 DE69122713 D1 DE 69122713D1
Authority
DE
Germany
Prior art keywords
backups
data processor
failure
computer system
fault tolerant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69122713T
Other languages
English (en)
Other versions
DE69122713T2 (de
Inventor
Barry Gleeson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Unisys Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unisys Corp filed Critical Unisys Corp
Publication of DE69122713D1 publication Critical patent/DE69122713D1/de
Application granted granted Critical
Publication of DE69122713T2 publication Critical patent/DE69122713T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2038—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with a single idle spare processing component
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61P—SPECIFIC THERAPEUTIC ACTIVITY OF CHEMICAL COMPOUNDS OR MEDICINAL PREPARATIONS
    • A61P3/00—Drugs for disorders of the metabolism
    • A61P3/02—Nutrients, e.g. vitamins, minerals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2097—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements maintaining the standby controller/processing unit updated
DE69122713T 1990-05-09 1991-05-08 Fehlertolerantes rechnersystem Expired - Fee Related DE69122713T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/521,283 US5271013A (en) 1990-05-09 1990-05-09 Fault tolerant computer system
PCT/US1991/003198 WO1991017504A1 (en) 1990-05-09 1991-05-08 Fault tolerant computer system

Publications (2)

Publication Number Publication Date
DE69122713D1 true DE69122713D1 (de) 1996-11-21
DE69122713T2 DE69122713T2 (de) 1997-05-15

Family

ID=24076128

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69122713T Expired - Fee Related DE69122713T2 (de) 1990-05-09 1991-05-08 Fehlertolerantes rechnersystem

Country Status (5)

Country Link
US (1) US5271013A (de)
EP (1) EP0482175B1 (de)
JP (1) JP3194579B2 (de)
DE (1) DE69122713T2 (de)
WO (1) WO1991017504A1 (de)

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US6799224B1 (en) 1998-03-10 2004-09-28 Quad Research High speed fault tolerant mass storage network information server
US6260155B1 (en) 1998-05-01 2001-07-10 Quad Research Network information server
US6691183B1 (en) 1998-05-20 2004-02-10 Invensys Systems, Inc. Second transfer logic causing a first transfer logic to check a data ready bit prior to each of multibit transfer of a continous transfer operation
US6266781B1 (en) * 1998-07-20 2001-07-24 Academia Sinica Method and apparatus for providing failure detection and recovery with predetermined replication style for distributed applications in a network
US7096465B1 (en) 1999-05-17 2006-08-22 Invensys Systems, Inc. Process control configuration system with parameterized objects
US6754885B1 (en) 1999-05-17 2004-06-22 Invensys Systems, Inc. Methods and apparatus for controlling object appearance in a process control configuration system
US7272815B1 (en) 1999-05-17 2007-09-18 Invensys Systems, Inc. Methods and apparatus for control configuration with versioning, security, composite blocks, edit selection, object swapping, formulaic values and other aspects
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US6788980B1 (en) 1999-06-11 2004-09-07 Invensys Systems, Inc. Methods and apparatus for control using control devices that provide a virtual machine environment and that communicate via an IP network
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US6473660B1 (en) 1999-12-03 2002-10-29 The Foxboro Company Process control system and method with automatic fault avoidance
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US6954877B2 (en) * 2001-11-29 2005-10-11 Agami Systems, Inc. Fault tolerance using logical checkpointing in computing systems
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EP1690163A4 (de) * 2003-11-17 2011-07-13 Virginia Tech Intell Prop Transparentes checkpointing und prozessmigration in einem verteilten system
US7761923B2 (en) 2004-03-01 2010-07-20 Invensys Systems, Inc. Process control methods and apparatus for intrusion detection, protection and network hardening
US20070076228A1 (en) * 2005-10-04 2007-04-05 Jacob Apelbaum System and method for providing data services via a network
US7493512B2 (en) * 2005-10-04 2009-02-17 First Data Corporation System and method for providing data services via a network
WO2007123753A2 (en) 2006-03-30 2007-11-01 Invensys Systems, Inc. Digital data processing apparatus and methods for improving plant performance
KR100800044B1 (ko) 2006-08-04 2008-01-31 한국과학기술정보연구원 체크포인트 파일 자동 관리 방법
EP2304536A4 (de) 2008-06-20 2012-08-15 Invensys Sys Inc Systeme und verfahren zur immersiven interaktion mit tatsächlichen und/oder simulierten einrichtungen zur prozess-, umwelt- und industriesteuerung
US8127060B2 (en) 2009-05-29 2012-02-28 Invensys Systems, Inc Methods and apparatus for control configuration with control objects that are fieldbus protocol-aware
US8463964B2 (en) 2009-05-29 2013-06-11 Invensys Systems, Inc. Methods and apparatus for control configuration with enhanced change-tracking
US8370605B2 (en) * 2009-11-11 2013-02-05 Sunman Engineering, Inc. Computer architecture for a mobile communication platform
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CN106462612A (zh) 2014-07-01 2017-02-22 萨思学会有限公司 用于容错通信的系统和方法
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Also Published As

Publication number Publication date
EP0482175B1 (de) 1996-10-16
WO1991017504A1 (en) 1991-11-14
JPH05500430A (ja) 1993-01-28
US5271013A (en) 1993-12-14
EP0482175A1 (de) 1992-04-29
JP3194579B2 (ja) 2001-07-30
DE69122713T2 (de) 1997-05-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee