DE69116938T2 - Verfahren zum Herstellen einer Halbleiteranordnung - Google Patents
Verfahren zum Herstellen einer HalbleiteranordnungInfo
- Publication number
- DE69116938T2 DE69116938T2 DE69116938T DE69116938T DE69116938T2 DE 69116938 T2 DE69116938 T2 DE 69116938T2 DE 69116938 T DE69116938 T DE 69116938T DE 69116938 T DE69116938 T DE 69116938T DE 69116938 T2 DE69116938 T2 DE 69116938T2
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3178—Coating or filling in grooves made in the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/137—Resists
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9013787A GB2245420A (en) | 1990-06-20 | 1990-06-20 | A method of manufacturing a semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69116938D1 DE69116938D1 (de) | 1996-03-21 |
DE69116938T2 true DE69116938T2 (de) | 1996-09-19 |
Family
ID=10677940
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69116938T Expired - Fee Related DE69116938T2 (de) | 1990-06-20 | 1991-06-13 | Verfahren zum Herstellen einer Halbleiteranordnung |
Country Status (6)
Country | Link |
---|---|
US (1) | US5093283A (de) |
EP (1) | EP0463669B1 (de) |
JP (1) | JPH0715896B2 (de) |
KR (1) | KR920001755A (de) |
DE (1) | DE69116938T2 (de) |
GB (1) | GB2245420A (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5539217A (en) * | 1993-08-09 | 1996-07-23 | Cree Research, Inc. | Silicon carbide thyristor |
KR0172237B1 (ko) * | 1995-06-26 | 1999-03-30 | 김주용 | 반도체 소자의 미세패턴 형성방법 |
US11764110B2 (en) * | 2020-04-29 | 2023-09-19 | Semiconductor Components Industries, Llc | Moat coverage with dielectric film for device passivation and singulation |
US20230065066A1 (en) * | 2021-08-30 | 2023-03-02 | Polar Semiconductor, Llc | Transistor with single termination trench having depth more than 10 microns |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3578515A (en) * | 1967-04-05 | 1971-05-11 | Texas Instruments Inc | Process for fabricating planar diodes in semi-insulating substrates |
US3639186A (en) * | 1969-02-24 | 1972-02-01 | Ibm | Process for the production of finely etched patterns |
US3808069A (en) * | 1972-03-15 | 1974-04-30 | Bell Telephone Labor Inc | Forming windows in composite dielectric layers |
DE2724348A1 (de) * | 1976-06-08 | 1977-12-22 | Itt Ind Gmbh Deutsche | Glaspassiviertes halbleiterbauelement und verfahren zur herstellung |
FR2466859A1 (fr) * | 1979-10-05 | 1981-04-10 | Thomson Csf | Procede de sillonnage et de glassivation par masquage au nitrure de silicium et composants semi-conducteurs obtenus |
US4354896A (en) * | 1980-08-05 | 1982-10-19 | Texas Instruments Incorporated | Formation of submicron substrate element |
US4506435A (en) * | 1981-07-27 | 1985-03-26 | International Business Machines Corporation | Method for forming recessed isolated regions |
US4497684A (en) * | 1983-02-22 | 1985-02-05 | Amdahl Corporation | Lift-off process for depositing metal on a substrate |
JPS6281727A (ja) * | 1985-10-05 | 1987-04-15 | Fujitsu Ltd | 埋込型素子分離溝の形成方法 |
JPS6284520A (ja) * | 1985-10-07 | 1987-04-18 | Sharp Corp | 絶縁膜への開孔形成方法 |
GB2206443A (en) * | 1987-06-08 | 1989-01-05 | Philips Electronic Associated | A method of manufacturing a semiconductor device |
GB2206540B (en) * | 1987-06-30 | 1991-03-27 | British Aerospace | Aperture forming method |
JPH0279437A (ja) * | 1988-09-14 | 1990-03-20 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
-
1990
- 1990-06-20 GB GB9013787A patent/GB2245420A/en not_active Withdrawn
-
1991
- 1991-05-16 US US07/701,552 patent/US5093283A/en not_active Expired - Fee Related
- 1991-06-13 DE DE69116938T patent/DE69116938T2/de not_active Expired - Fee Related
- 1991-06-13 EP EP91201468A patent/EP0463669B1/de not_active Expired - Lifetime
- 1991-06-17 JP JP3170432A patent/JPH0715896B2/ja not_active Expired - Lifetime
- 1991-06-17 KR KR1019910009946A patent/KR920001755A/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
JPH04230031A (ja) | 1992-08-19 |
GB2245420A (en) | 1992-01-02 |
KR920001755A (ko) | 1992-01-30 |
EP0463669A3 (en) | 1992-08-05 |
EP0463669A2 (de) | 1992-01-02 |
US5093283A (en) | 1992-03-03 |
DE69116938D1 (de) | 1996-03-21 |
EP0463669B1 (de) | 1996-02-07 |
JPH0715896B2 (ja) | 1995-02-22 |
GB9013787D0 (en) | 1990-08-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |