DE68924051D1 - Vielfacher Ein-/Ausgabe-Kanal. - Google Patents

Vielfacher Ein-/Ausgabe-Kanal.

Info

Publication number: DE68924051D1
Authority: DE; Germany
Prior art keywords: output channel; multiple input; input; channel; output
Prior art date: 1988-12-30
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE68924051T

Other languages

English (en)

Other versions

DE68924051T2 (de

Inventor

Stefan Peter Jackowski

Ronald Brian Jenkins

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

International Business Machines Corp

Original Assignee

International Business Machines Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1988-12-30

Filing date

1989-11-16

Publication date

1995-10-05

1989-11-16 Application filed by International Business Machines Corp filed Critical International Business Machines Corp

1995-10-05 Publication of DE68924051D1 publication Critical patent/DE68924051D1/de

1996-05-02 Application granted granted Critical

1996-05-02 Publication of DE68924051T2 publication Critical patent/DE68924051T2/de

2009-11-17 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
- G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor

DE68924051T 1988-12-30 1989-11-16 Vielfacher Ein-/Ausgabe-Kanal. Expired - Fee Related DE68924051T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US29227988A	1988-12-30	1988-12-30

Publications (2)

Publication Number	Publication Date
DE68924051D1 true DE68924051D1 (de)	1995-10-05
DE68924051T2 DE68924051T2 (de)	1996-05-02

Family

ID=23123990

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE68924051T Expired - Fee Related DE68924051T2 (de)	1988-12-30	1989-11-16	Vielfacher Ein-/Ausgabe-Kanal.

Country Status (4)

Country	Link
US (1)	US5418909A (de)
EP (1)	EP0375909B1 (de)
JP (1)	JPH02214959A (de)
DE (1)	DE68924051T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP3392436B2 (ja) *	1992-08-28	2003-03-31	株式会社東芝	通信システム及び通信方法
EP0660239A1 (de) *	1993-12-17	1995-06-28	International Business Machines Corporation	Datenübertragung zwischen Rechnerelementen
US5546549A (en) *	1994-06-01	1996-08-13	International Business Machines Corporation	Multi-path channel (MPC) interface with user transparent, unbalanced, dynamically alterable computer input/output channels
US5715475A (en) *	1994-12-29	1998-02-03	Intel Corporation	Topological identification and initialization of a system for processing video information
DE69614291T2 (de) *	1995-03-17	2001-12-06	Lsi Logic Corp	(n+i) Ein/Ausgabekanälesteuerung, mit (n) Datenverwaltern, in einer homogenen Software-Programmierbetriebsumgebung
US5864712A (en) *	1995-03-17	1999-01-26	Lsi Logic Corporation	Method and apparatus for controlling (N+I) I/O channels with (N) data managers in a homogenous software programmable environment
US5787304A (en) *	1996-02-05	1998-07-28	International Business Machines Corporation	Multipath I/O storage systems with multipath I/O request mechanisms
US6038621A (en) *	1996-11-04	2000-03-14	Hewlett-Packard Company	Dynamic peripheral control of I/O buffers in peripherals with modular I/O
US5941972A (en)	1997-12-31	1999-08-24	Crossroads Systems, Inc.	Storage router and method for providing virtual local storage
USRE42761E1 (en)	1997-12-31	2011-09-27	Crossroads Systems, Inc.	Storage router and method for providing virtual local storage
US6192423B1 (en) *	1998-08-10	2001-02-20	Hewlett-Packard Company	Sharing a single serial port between system remote access software and a remote management microcontroller
GB2388224B (en) *	1998-12-31	2003-12-24	Emc Corp	Method and apparatus for balancing workloads among paths in a multi-path computer system
US20020091843A1 (en) *	1999-12-21	2002-07-11	Vaid Rahul R.	Wireless network adapter
EP1337621B1 (de) *	2000-11-27	2006-09-27	The Procter & Gamble Company	Geschirrspülverfahren
US8719626B2 (en) *	2011-09-28	2014-05-06	International Business Machines Corporation	Proactively removing channel paths in error from a variable scope of I/O devices
US9846609B2 (en) *	2015-12-11	2017-12-19	Yokogawa Electric Corporation	System and method for testing configuration and operation of I/O devices
US10055368B2 (en) *	2016-02-26	2018-08-21	Sandisk Technologies Llc	Mobile device and method for synchronizing use of the mobile device's communications port among a plurality of applications

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3553656A (en) *	1969-06-03	1971-01-05	Gen Electric	Selector for the dynamic assignment of priority on a periodic basis
US3902162A (en) *	1972-11-24	1975-08-26	Honeywell Inf Systems	Data communication system incorporating programmable front end processor having multiple peripheral units
JPS5144843A (ja) *	1974-10-15	1976-04-16	Fujitsu Ltd	Johoshorisochi
US4400771A (en) *	1975-12-04	1983-08-23	Tokyo Shibaura Electric Co., Ltd.	Multi-processor system with programmable memory-access priority control
JPS52137222A (en) *	1976-05-12	1977-11-16	Hitachi Ltd	Interface system
JPS5845730B2 (ja) *	1978-02-08	1983-10-12	株式会社日立製作所	切替機構
US4191997A (en) *	1978-04-10	1980-03-04	International Business Machines Corporation	Circuits and methods for multiple control in data processing systems
US4207609A (en) *	1978-05-08	1980-06-10	International Business Machines Corporation	Method and means for path independent device reservation and reconnection in a multi-CPU and shared device access system
US4437157A (en) *	1978-07-20	1984-03-13	Sperry Corporation	Dynamic subchannel allocation
US4205374A (en) *	1978-10-19	1980-05-27	International Business Machines Corporation	Method and means for CPU recovery of non-logged data from a storage subsystem subject to selective resets
JPS562030A (en) *	1979-06-21	1981-01-10	Fujitsu Ltd	Input-output controller
US4275095A (en) *	1979-07-31	1981-06-23	Warren Consultants, Inc.	Composite article and method of making same
US4314335A (en) *	1980-02-06	1982-02-02	The Perkin-Elmer Corporation	Multilevel priority arbiter
US4396984A (en) *	1981-03-06	1983-08-02	International Business Machines Corporation	Peripheral systems employing multipathing, path and access grouping
US4495564A (en) *	1981-08-10	1985-01-22	International Business Machines Corporation	Multi sub-channel adapter with single status/address register
US4493036A (en) *	1982-12-14	1985-01-08	Honeywell Information Systems Inc.	Priority resolver having dynamically adjustable priority levels
JPS60142418A (ja) *	1983-12-28	1985-07-27	Hitachi Ltd	入出力エラ−回復方式
US4641308A (en) *	1984-01-03	1987-02-03	Texas Instruments Incorporated	Method of internal self-test of microprocessor using microcode
US4649475A (en) *	1984-04-02	1987-03-10	Sperry Corporation	Multiple port memory with port decode error detector
US4868742A (en) *	1984-06-20	1989-09-19	Convex Computer Corporation	Input/output bus for system which generates a new header parcel when an interrupted data block transfer between a computer and peripherals is resumed
US4697232A (en) *	1984-11-30	1987-09-29	Storage Technology Corporation	I/O device reconnection in a multiple-CPU, dynamic path allocation environment
DE3688759T2 (de) *	1985-03-20	1994-01-05	Hitachi Ltd	Ein-/Ausgabe-Steuerungssystem.
US4716523A (en) *	1985-06-14	1987-12-29	International Business Machines Corporation	Multiple port integrated DMA and interrupt controller and arbitrator
JP2550311B2 (ja) *	1985-11-20	1996-11-06	株式会社日立製作所	磁気デイスクの多重制御方式
US4814980A (en) *	1986-04-01	1989-03-21	California Institute Of Technology	Concurrent hypercube system with improved message passing
US4821177A (en) *	1986-09-02	1989-04-11	Honeywell Bull Inc.	Apparatus for controlling system accesses having multiple command level conditional rotational multiple port servicing priority hierarchy
US5025370A (en) *	1986-09-02	1991-06-18	Koegel Robert J	Circuit for preventing lock-out of high priority requests to a system controller
JPH0752420B2 (ja) *	1986-09-10	1995-06-05	株式会社日立製作所	入出力装置アドレス方式
US4766534A (en) *	1986-10-16	1988-08-23	American Telephone And Telegraph Company, At&T Bell Laboratories	Parallel processing network and method
US4831523A (en) *	1986-10-31	1989-05-16	Bull Hn Information Systems Inc.	Multiple DMA controller chip sequencer
US4730864A (en) *	1987-02-24	1988-03-15	Sample Tommy G	Arm mounted hand operated leaf and trash grabber
US4821170A (en) *	1987-04-17	1989-04-11	Tandem Computers Incorporated	Input/output system for multiprocessors

1989
- 1989-11-16 DE DE68924051T patent/DE68924051T2/de not_active Expired - Fee Related
- 1989-11-16 EP EP89121192A patent/EP0375909B1/de not_active Expired - Lifetime
- 1989-12-20 JP JP1328604A patent/JPH02214959A/ja active Granted
1994
- 1994-04-11 US US08/226,221 patent/US5418909A/en not_active Expired - Fee Related

Also Published As

Publication number	Publication date
EP0375909A3 (de)	1991-09-04
EP0375909A2 (de)	1990-07-04
EP0375909B1 (de)	1995-08-30
DE68924051T2 (de)	1996-05-02
US5418909A (en)	1995-05-23
JPH0583940B2 (de)	1993-11-30
JPH02214959A (ja)	1990-08-27

Legal Events

Date	Code	Title	Description
1996-09-26	8364	No opposition during term of opposition
1998-12-10	8339	Ceased/non-payment of the annual fee

Publication	Publication Date	Title
DE3788354D1 (de)	1994-01-13	Eingangs-/ausgangssteuerungstechnik.
FI883566A0 (fi)	1988-07-29	Virtuella input/output-kommandon.
DE68918299T3 (de)	1998-05-20	Kanalwechselsystem.
DE612205T1 (de)	1995-06-14	Eingabe/Ausgabe-Einrichtung.
DE3583537D1 (de)	1991-08-29	Cmos-eingabe-/ausgabeschaltung.
DE3688759D1 (de)	1993-09-02	Ein-/ausgabe-steuerungssystem.
DE3783286D1 (de)	1993-02-11	Eingabeschnittstelle.
DE3787173T2 (de)	1994-04-14	Ausgabevorrichtung.
NO894790L (no)	1990-06-05	Beta-aminoboronsyrederivater.
DE68924051T2 (de)	1996-05-02	Vielfacher Ein-/Ausgabe-Kanal.
DE3871889T2 (de)	1992-12-24	Programmierbare eingangs-/ausgangsschaltung.
DE68910413T2 (de)	1994-04-21	Ausgangsschaltung.
DE68915351T2 (de)	1994-09-29	Ausgangschaltung.
DE68923668D1 (de)	1995-09-07	Ausgabegerät.
FI893541A (fi)	1990-01-29	Nytt uttryckningssystem.
DE3781919D1 (de)	1992-11-05	Eingangsschaltung.
DE68923573D1 (de)	1995-08-31	Eingangsschaltungen.
DE68919873D1 (de)	1995-01-26	Ausgabeanordnung.
DE68924688T2 (de)	1996-05-02	Ausgangsvorrichtung.
DE68908455D1 (de)	1993-09-23	Ausgabekontrolleinrichtung.
DE68907727T2 (de)	1993-10-28	Kanalverbindungsvorrichtung.
FI890892A0 (fi)	1989-02-24	B-amylasgen.
ES1007018Y (es)	1989-08-01	Tobogan.
ATE69417T1 (de)	1991-11-15	Gleitstueck.
NO882253D0 (no)	1988-05-24	Sammenfollbar stige.