DE60333837D1 - Verarbeitungssystem mit vermischten prozessoren und kommunikationselementen - Google Patents

Verarbeitungssystem mit vermischten prozessoren und kommunikationselementen

Info

Publication number
DE60333837D1
DE60333837D1 DE60333837T DE60333837T DE60333837D1 DE 60333837 D1 DE60333837 D1 DE 60333837D1 DE 60333837 T DE60333837 T DE 60333837T DE 60333837 T DE60333837 T DE 60333837T DE 60333837 D1 DE60333837 D1 DE 60333837D1
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DE
Germany
Prior art keywords
communication elements
processors
dynamically configurable
configurable communication
ports
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60333837T
Other languages
English (en)
Inventor
Michael B Doerr
William H Hallidy
David A Gibson
Craig M Chase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Coherent Logix Inc
Original Assignee
Coherent Logix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Coherent Logix Inc filed Critical Coherent Logix Inc
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Publication of DE60333837D1 publication Critical patent/DE60333837D1/de
Anticipated expiration legal-status Critical
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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
DE60333837T 2002-06-26 2003-06-25 Verarbeitungssystem mit vermischten prozessoren und kommunikationselementen Expired - Lifetime DE60333837D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US39173402P 2002-06-26 2002-06-26
US10/602,292 US7415594B2 (en) 2002-06-26 2003-06-24 Processing system with interspersed stall propagating processors and communication elements
PCT/US2003/020049 WO2004003781A2 (en) 2002-06-26 2003-06-25 Processing system with interspersed processors and communication elements

Publications (1)

Publication Number Publication Date
DE60333837D1 true DE60333837D1 (de) 2010-09-30

Family

ID=30003204

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60333837T Expired - Lifetime DE60333837D1 (de) 2002-06-26 2003-06-25 Verarbeitungssystem mit vermischten prozessoren und kommunikationselementen

Country Status (7)

Country Link
US (8) US7415594B2 (de)
EP (6) EP1520233B1 (de)
JP (1) JP4391935B2 (de)
AT (1) ATE478389T1 (de)
AU (1) AU2003280403A1 (de)
DE (1) DE60333837D1 (de)
WO (1) WO2004003781A2 (de)

Families Citing this family (112)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8418129B1 (en) 2001-12-14 2013-04-09 Qualcomm Incorporated Method for automatically generating code to define a system of hardware elements
US7298739B1 (en) * 2001-12-14 2007-11-20 Applied Micro Circuits Corporation System and method for communicating switch fabric control information
US7424013B1 (en) * 2001-12-20 2008-09-09 Applied Micro Circuits Corporation System and method for granting arbitrated bids in the switching of information
US7352694B1 (en) * 2001-12-14 2008-04-01 Applied Micro Circuits Corporation System and method for tolerating data link faults in a packet communications switch fabric
US6934427B2 (en) * 2002-03-12 2005-08-23 Enablence Holdings Llc High density integrated optical chip with low index difference waveguide functions
US7415594B2 (en) 2002-06-26 2008-08-19 Coherent Logix, Incorporated Processing system with interspersed stall propagating processors and communication elements
US8451933B2 (en) 2002-07-18 2013-05-28 Coherent Logix, Incorporated Detection of low-amplitude echoes in a received communication signal
US7346013B2 (en) * 2002-07-18 2008-03-18 Coherent Logix, Incorporated Frequency domain equalization of communication signals
US7394284B2 (en) * 2002-09-06 2008-07-01 Pact Xpp Technologies Ag Reconfigurable sequencer structure
US8397034B1 (en) * 2003-06-27 2013-03-12 Cypress Semiconductor Corporation Multi-port arbitration system and method
US7373111B2 (en) * 2004-02-19 2008-05-13 Marvell International Ltd. Communication access apparatus, systems, and methods
US7937557B2 (en) * 2004-03-16 2011-05-03 Vns Portfolio Llc System and method for intercommunication between computers in an array
US20080235490A1 (en) * 2004-06-18 2008-09-25 Anthony Mark Jones System for configuring a processor array
US8103866B2 (en) * 2004-06-18 2012-01-24 Nethra Imaging Inc. System for reconfiguring a processor array
US7483422B2 (en) * 2005-02-10 2009-01-27 International Business Machines Corporation Data processing system, method and interconnect fabric for selective link information allocation in a data processing system
US20060176890A1 (en) * 2005-02-10 2006-08-10 International Business Machines Corporation Data processing system, method and interconnect fabric for improved communication in a data processing system
US7451231B2 (en) * 2005-02-10 2008-11-11 International Business Machines Corporation Data processing system, method and interconnect fabric for synchronized communication in a data processing system
US7840914B1 (en) * 2005-05-13 2010-11-23 Massachusetts Institute Of Technology Distributing computations in a parallel processing environment
US7904695B2 (en) * 2006-02-16 2011-03-08 Vns Portfolio Llc Asynchronous power saving computer
US9098641B1 (en) * 2006-01-30 2015-08-04 Cypress Semiconductor Corporation Configurable bus
JP2009527814A (ja) * 2006-02-16 2009-07-30 ブイエヌエス ポートフォリオ リミテッド ライアビリティ カンパニー コンピュータのアレイ間でのリソースの割り当て
US7966481B2 (en) 2006-02-16 2011-06-21 Vns Portfolio Llc Computer system and method for executing port communications without interrupting the receiving computer
US7904615B2 (en) 2006-02-16 2011-03-08 Vns Portfolio Llc Asynchronous computer communication
CN101479704B (zh) 2006-03-27 2013-09-04 相干逻辑公司 为多处理器系统设计程序
US7836435B2 (en) * 2006-03-31 2010-11-16 Intel Corporation Checking for memory access collisions in a multi-processor architecture
TW200817925A (en) * 2006-03-31 2008-04-16 Technology Properties Ltd Method and apparatus for operating a computer processor array
US20070270671A1 (en) * 2006-04-10 2007-11-22 Vivometrics, Inc. Physiological signal processing devices and associated processing methods
WO2007137266A2 (en) 2006-05-22 2007-11-29 Coherent Logix Incorporated Designing an asic based on execution of a software program on a processing system
JP4934356B2 (ja) * 2006-06-20 2012-05-16 株式会社日立製作所 映像処理エンジンおよびそれを含む映像処理システム
EP2033316A4 (de) * 2006-06-21 2010-08-11 Element Cxi Llc Aufbau einer fehlertoleranten integirerten schaltung
US7657773B1 (en) * 2006-06-22 2010-02-02 Lattice Semiconductor Corporation Clock distribution chip for generating both zero-delay and non-zero-delay clock signals
JP2008042343A (ja) * 2006-08-02 2008-02-21 Nec Electronics Corp スイッチ回路およびスイッチ装置
US8122078B2 (en) * 2006-10-06 2012-02-21 Calos Fund, LLC Processor with enhanced combined-arithmetic capability
JP5055942B2 (ja) * 2006-10-16 2012-10-24 富士通株式会社 計算機クラスタ
US8291400B1 (en) 2007-02-07 2012-10-16 Tilera Corporation Communication scheduling for parallel processing architectures
US20080282062A1 (en) * 2007-05-07 2008-11-13 Montvelishsky Michael B Method and apparatus for loading data and instructions into a computer
US8151305B2 (en) 2007-07-05 2012-04-03 Coherent Logix, Incorporated Mobile television broadcast system
US8861379B2 (en) * 2007-07-26 2014-10-14 Verizon Patent And Licensing Inc. Test automation for an integrated telephony call management service
US8156313B2 (en) * 2007-09-22 2012-04-10 Navosha Corporation Chained operation of functional units in integrated circuit by writing DONE/complete value and by reading as GO/start value from same memory location
US8132137B1 (en) * 2007-11-10 2012-03-06 Altera Corporation Prediction of dynamic current waveform and spectrum in a semiconductor device
US7996454B2 (en) * 2007-11-16 2011-08-09 Vns Portfolio Llc Method and apparatus for performing complex calculations in a multiprocessor array
US20090300334A1 (en) * 2008-05-30 2009-12-03 Vns Portfolio Llc Method and Apparatus for Loading Data and Instructions Into a Computer
US7958341B1 (en) * 2008-07-07 2011-06-07 Ovics Processing stream instruction in IC of mesh connected matrix of processors containing pipeline coupled switch transferring messages over consecutive cycles from one link to another link or memory
US8145880B1 (en) 2008-07-07 2012-03-27 Ovics Matrix processor data switch routing systems and methods
US8327114B1 (en) 2008-07-07 2012-12-04 Ovics Matrix processor proxy systems and methods
US7870365B1 (en) 2008-07-07 2011-01-11 Ovics Matrix of processors with data stream instruction execution pipeline coupled to data switch linking to neighbor units by non-contentious command channel / data channel
US8131975B1 (en) 2008-07-07 2012-03-06 Ovics Matrix processor initialization systems and methods
US8755515B1 (en) 2008-09-29 2014-06-17 Wai Wu Parallel signal processing system and method
EP2350931A2 (de) * 2008-11-05 2011-08-03 Nxp B.V. Elektrische schaltungsanordnung und verfahren zum entwurf einer elektrischen schaltungsanordnung
EP2443751A1 (de) 2009-06-17 2012-04-25 Coherent Logix Incorporated Parallele ausführung von verfahren auf trellis-basis
CN106227693B (zh) * 2010-10-15 2019-06-04 相干逻辑公司 多处理器系统中的通信禁用
US8787368B2 (en) * 2010-12-07 2014-07-22 Advanced Micro Devices, Inc. Crossbar switch with primary and secondary pickers
CN102063408B (zh) * 2010-12-13 2012-05-30 北京时代民芯科技有限公司 一种多核处理器片内数据总线
CN103493345B (zh) * 2011-02-10 2016-05-11 舍弗勒技术股份两合公司 磁阻电动机
JP2012252490A (ja) * 2011-06-02 2012-12-20 Renesas Electronics Corp マルチプロセッサおよびそれを用いた画像処理システム
WO2013100783A1 (en) 2011-12-29 2013-07-04 Intel Corporation Method and system for control signalling in a data path module
JP5876319B2 (ja) * 2012-02-21 2016-03-02 日本電信電話株式会社 サービス提供システム、サービス提供方法、リソースマネージャ、プログラム
US9230046B2 (en) 2012-03-30 2016-01-05 International Business Machines Corporation Generating clock signals for a cycle accurate, cycle reproducible FPGA based hardware accelerator
US9286423B2 (en) 2012-03-30 2016-03-15 International Business Machines Corporation Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator
US9094304B2 (en) 2012-05-10 2015-07-28 Cognex Corporation Systems and methods for dynamically configuring communication data items
CN111405315B (zh) 2012-06-12 2022-04-12 相干逻辑公司 用于编码和交付视频内容的分布式体系结构
US9137173B2 (en) * 2012-06-19 2015-09-15 Advanced Micro Devices, Inc. Devices and methods for interconnecting server nodes
US9160617B2 (en) 2012-09-28 2015-10-13 International Business Machines Corporation Faulty core recovery mechanisms for a three-dimensional network on a processor array
US8990616B2 (en) * 2012-09-28 2015-03-24 International Business Machines Corporation Final faulty core recovery mechanisms for a two-dimensional network on a processor array
WO2014074251A1 (en) 2012-11-06 2014-05-15 Coherent Logix, Incorporated Multiprocessor programming toolkit for design reuse
US8959301B2 (en) * 2012-11-09 2015-02-17 International Business Machines Corporation Accessing data in a storage system
EP3499371B1 (de) 2012-11-09 2023-06-07 Coherent Logix Incorporated Echtzeitanalyse und steuerung für ein multiprozessorsystem
JP6122135B2 (ja) 2012-11-21 2017-04-26 コーヒレント・ロジックス・インコーポレーテッド 分散型プロセッサを有する処理システム
CN104823164B (zh) * 2012-12-06 2019-07-16 相干逻辑公司 具有同步控制器的多处理器系统以及维持同步的方法
CN105122172B (zh) 2012-12-13 2017-10-27 相干逻辑公司 同步数字系统及避免其中的时钟信号错误的方法
EP3614273A3 (de) 2012-12-13 2020-04-15 Coherent Logix, Incorporated Multiprozessorsystem mit verbessertem sekundärem verbindungsnetzwerk
US9258257B2 (en) 2013-01-10 2016-02-09 Qualcomm Incorporated Direct memory access rate limiting in a communication device
WO2014178856A1 (en) * 2013-04-30 2014-11-06 Hewlett-Packard Development Company, L.P. Memory network
US9195575B2 (en) 2013-05-17 2015-11-24 Coherent Logix, Incorporated Dynamic reconfiguration of applications on a multi-processor embedded system
EP3690641B1 (de) 2013-05-24 2024-02-21 Coherent Logix Incorporated Prozessor mit mehreren parallelen adressgeneratoreinheiten
US10331583B2 (en) 2013-09-26 2019-06-25 Intel Corporation Executing distributed memory operations using processing elements connected by distributed channels
KR20150086718A (ko) * 2014-01-20 2015-07-29 삼성전자주식회사 메모리를 이용하여 파이프라인이 데이터를 처리하는 방법 및 장치
EP3012975B1 (de) * 2014-10-20 2019-07-03 IMEC vzw Fehlerfeste digitalsignalverarbeitungsvorrichtung
US20170083313A1 (en) * 2015-09-22 2017-03-23 Qualcomm Incorporated CONFIGURING COARSE-GRAINED RECONFIGURABLE ARRAYS (CGRAs) FOR DATAFLOW INSTRUCTION BLOCK EXECUTION IN BLOCK-BASED DATAFLOW INSTRUCTION SET ARCHITECTURES (ISAs)
CN108370255B (zh) 2015-11-24 2022-04-12 相干逻辑公司 极性码连续消去列表解码器中的存储器管理和路径排序
US9992135B2 (en) * 2015-12-11 2018-06-05 Intel Corporation Apparatus and method for fusion of compute and switching functions of exascale system into a single component by using configurable network-on-chip fabric with distributed dual mode input-output ports and programmable network interfaces
EP3686735B1 (de) 2015-12-28 2022-05-04 Coherent Logix, Inc. Prozessorbefehle zur beschleunigung der fec-codierung und -decodierung
JP7242634B2 (ja) * 2017-07-30 2023-03-20 ニューロブレード リミテッド メモリチップ
US11086816B2 (en) 2017-09-28 2021-08-10 Intel Corporation Processors, methods, and systems for debugging a configurable spatial accelerator
WO2019089816A2 (en) 2017-10-31 2019-05-09 Micron Technology, Inc. System having a hybrid threading processor, a hybrid threading fabric having configurable computing elements, and a hybrid interconnection network
US10873754B2 (en) 2017-12-12 2020-12-22 Coherent Logix, Incorporated Low latency video codec and transmission with parallel processing
US11360930B2 (en) 2017-12-19 2022-06-14 Samsung Electronics Co., Ltd. Neural processing accelerator
WO2019191743A1 (en) 2018-03-31 2019-10-03 Micron Technology, Inc. Conditional branching control for a multi-threaded, self- scheduling reconfigurable computing fabric
CN112055853B (zh) 2018-03-31 2024-04-09 美光科技公司 用于多线程自调度可重新配置计算架构的电路及系统
EP3776242A1 (de) 2018-03-31 2021-02-17 Micron Technology, Inc. Selbstplanende rekonfigurierbare multithread-rechenmatrix
EP3776239A1 (de) 2018-03-31 2021-02-17 Micron Technology, Inc. Schleifenausführungssteuerung für eine rekonfigurierbare rechnerstruktur mit mehreren threads und eigenständiger planung unter verwendung einer wiedereintrittswarteschlange
US11275710B2 (en) 2018-03-31 2022-03-15 Micron Technology, Inc. Loop thread order execution control of a multi-threaded, self-scheduling reconfigurable computing fabric
CN111919204A (zh) 2018-03-31 2020-11-10 美光科技公司 用于多线程自调度可重新配置计算架构的高效循环执行
CN111919206A (zh) 2018-03-31 2020-11-10 美光科技公司 将停止信号用于多线程自调度可重新配置计算架构的背压控制
EP3776238A1 (de) 2018-03-31 2021-02-17 Micron Technology, Inc. Ausführungssteuerung für eine selbstplanende rekonfigurierbare multithread-rechenmatrix
US11307873B2 (en) 2018-04-03 2022-04-19 Intel Corporation Apparatus, methods, and systems for unstructured data flow in a configurable spatial accelerator with predicate propagation and merging
US10891240B2 (en) 2018-06-30 2021-01-12 Intel Corporation Apparatus, methods, and systems for low latency communication in a configurable spatial accelerator
US11200186B2 (en) 2018-06-30 2021-12-14 Intel Corporation Apparatuses, methods, and systems for operations in a configurable spatial accelerator
US10853073B2 (en) 2018-06-30 2020-12-01 Intel Corporation Apparatuses, methods, and systems for conditional operations in a configurable spatial accelerator
WO2020163287A1 (en) 2019-02-04 2020-08-13 Coherent Logix, Inc. A comprehensive system design to address the needs for virtual segmentation of the coaxial cable plant
US10915471B2 (en) 2019-03-30 2021-02-09 Intel Corporation Apparatuses, methods, and systems for memory interface circuit allocation in a configurable spatial accelerator
US10817291B2 (en) 2019-03-30 2020-10-27 Intel Corporation Apparatuses, methods, and systems for swizzle operations in a configurable spatial accelerator
US11037050B2 (en) 2019-06-29 2021-06-15 Intel Corporation Apparatuses, methods, and systems for memory interface circuit arbitration in a configurable spatial accelerator
US11294672B2 (en) 2019-08-22 2022-04-05 Apple Inc. Routing circuitry for permutation of single-instruction multiple-data operands
US11573834B2 (en) 2019-08-22 2023-02-07 Micron Technology, Inc. Computational partition for a multi-threaded, self-scheduling reconfigurable computing fabric
US11150900B2 (en) 2019-08-28 2021-10-19 Micron Technology, Inc. Execution or write mask generation for data selection in a multi-threaded, self-scheduling reconfigurable computing fabric
US11886377B2 (en) 2019-09-10 2024-01-30 Cornami, Inc. Reconfigurable arithmetic engine circuit
US11256518B2 (en) * 2019-10-09 2022-02-22 Apple Inc. Datapath circuitry for math operations using SIMD pipelines
US11076210B1 (en) * 2020-01-03 2021-07-27 Microsoft Technology Licensing, Llc Distributed processing architecture
US11580388B2 (en) * 2020-01-03 2023-02-14 Microsoft Technology Licensing, Llc Distributed processing architecture
US11620169B2 (en) * 2020-03-13 2023-04-04 Nvidia Corporation Barrierless and fenceless shared memory synchronization with write flag toggling
US11593164B2 (en) 2021-03-03 2023-02-28 Microsoft Technology Licensing, Llc Data transfer scheduling for hardware accelerator

Family Cites Families (54)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459846A (en) * 1988-12-02 1995-10-17 Hyatt; Gilbert P. Computer architecture system having an imporved memory
US4139149A (en) * 1977-08-31 1979-02-13 Ncr Corporation Display system
US4493048A (en) 1982-02-26 1985-01-08 Carnegie-Mellon University Systolic array apparatuses for matrix computations
US4901230A (en) * 1983-04-25 1990-02-13 Cray Research, Inc. Computer vector multiprocessing control with multiple access memory and priority conflict resolution method
US5152000A (en) * 1983-05-31 1992-09-29 Thinking Machines Corporation Array communications arrangement for parallel processor
US4598400A (en) * 1983-05-31 1986-07-01 Thinking Machines Corporation Method and apparatus for routing message packets
US4709327A (en) * 1983-05-31 1987-11-24 Hillis W Daniel Parallel processor/memory circuit
US5008815A (en) * 1983-05-31 1991-04-16 Thinking Machines Corporation Parallel processor
US5151996A (en) * 1983-05-31 1992-09-29 Thinking Machines Corporation Multi-dimensional message transfer router
US5123109A (en) * 1983-05-31 1992-06-16 Thinking Machines Corporation Parallel processor including a processor array with plural data transfer arrangements including (1) a global router and (2) a proximate-neighbor transfer system
US4814973A (en) * 1983-05-31 1989-03-21 Hillis W Daniel Parallel processor
US4873630A (en) * 1985-07-31 1989-10-10 Unisys Corporation Scientific processor to support a host processor referencing common memory
US4945479A (en) * 1985-07-31 1990-07-31 Unisys Corporation Tightly coupled scientific processing system
US4739476A (en) 1985-08-01 1988-04-19 General Electric Company Local interconnection scheme for parallel processing architectures
US4720780A (en) 1985-09-17 1988-01-19 The Johns Hopkins University Memory-linked wavefront array processor
US4807183A (en) 1985-09-27 1989-02-21 Carnegie-Mellon University Programmable interconnection chip for computer system functional modules
DE3750839T2 (de) 1986-10-29 1995-05-04 United Technologies Corp Modulare Multiprozessor-N-Dimensionsgitterarchitektur.
JPH01241660A (ja) 1988-03-24 1989-09-26 Toshiba Corp プロセッサ間通信方式
US5193199A (en) * 1988-04-14 1993-03-09 Zilog, Inc. Device and method for programming critical hardware parameters
US5630162A (en) 1990-11-13 1997-05-13 International Business Machines Corporation Array processor dotted communication network based on H-DOTs
US5963746A (en) 1990-11-13 1999-10-05 International Business Machines Corporation Fully distributed processing memory element
US5794059A (en) * 1990-11-13 1998-08-11 International Business Machines Corporation N-dimensional modified hypercube
US5963745A (en) * 1990-11-13 1999-10-05 International Business Machines Corporation APAP I/O programmable router
US5689719A (en) 1991-06-28 1997-11-18 Sanyo Electric O., Ltd. Parallel computer system including processing elements
RO105026B1 (en) 1991-10-10 1993-09-01 Ion Minca Network structure for parallel processing of calcullation programs
JPH05216846A (ja) 1992-02-03 1993-08-27 Agency Of Ind Science & Technol 通信パケット転送方式
JP2976675B2 (ja) 1992-02-21 1999-11-10 日本電気株式会社 アレイプロセッサのルーティング方法
JP2642039B2 (ja) * 1992-05-22 1997-08-20 インターナショナル・ビジネス・マシーンズ・コーポレイション アレイ・プロセッサ
EP0570729A3 (en) 1992-05-22 1994-07-20 Ibm Apap i/o programmable router
JPH06274467A (ja) 1993-03-23 1994-09-30 Sumitomo Metal Ind Ltd フィールドプログラマブルプロセッサアレイ
JPH06290158A (ja) * 1993-03-31 1994-10-18 Fujitsu Ltd 再構成可能なトーラス・ネットワーク方式
WO1994027216A1 (en) * 1993-05-14 1994-11-24 Massachusetts Institute Of Technology Multiprocessor coupling system with integrated compile and run time scheduling for parallelism
WO1994028484A1 (en) * 1993-06-02 1994-12-08 International Business Machines Corporation Multiplexing device for a redundant channel bus
JPH0736842A (ja) 1993-07-20 1995-02-07 Toshiba Corp 並列計算機
US5581705A (en) * 1993-12-13 1996-12-03 Cray Research, Inc. Messaging facility with hardware tail pointer and software implemented head pointer message queue for distributed memory massively parallel processing system
AU700629B2 (en) * 1994-03-22 1999-01-07 Hyperchip Inc. Efficient direct cell replacement fault tolerant architecture supporting completely integrated systems with means for direct communication with system operator
US5634043A (en) 1994-08-25 1997-05-27 Intel Corporation Microprocessor point-to-point communication
US5708835A (en) * 1995-03-27 1998-01-13 Hughes Electronics Dual-directional parallel processor
US5864738A (en) * 1996-03-13 1999-01-26 Cray Research, Inc. Massively parallel processing system using two data paths: one connecting router circuit to the interconnect network and the other connecting router circuit to I/O controller
US6141769A (en) * 1996-05-16 2000-10-31 Resilience Corporation Triple modular redundant computer system and associated method
KR100211123B1 (ko) * 1997-05-23 1999-07-15 윤종용 고속 패킷 스위칭을 위한 다단 상호 연결 망
US5936977A (en) * 1997-09-17 1999-08-10 Cypress Semiconductor Corp. Scan path circuitry including a programmable delay circuit
US5953285A (en) * 1997-09-17 1999-09-14 Cypress Semiconductor Corp. Scan path circuitry including an output register having a flow through mode
US6115836A (en) * 1997-09-17 2000-09-05 Cypress Semiconductor Corporation Scan path circuitry for programming a variable clock pulse width
US6633945B1 (en) * 1997-12-07 2003-10-14 Conexant Systems, Inc. Fully connected cache coherent multiprocessing systems
JPH11353288A (ja) 1998-06-04 1999-12-24 Toshiba Corp 並列計算機及びメモリ装置
JP2001014288A (ja) 1999-07-02 2001-01-19 Nippon Telegr & Teleph Corp <Ntt> セルアレイ間のメッセージ通信装置
US6681282B1 (en) * 2000-08-31 2004-01-20 Hewlett-Packard Development Company, L.P. Online control of a multiprocessor computer system
US7069372B1 (en) * 2001-07-30 2006-06-27 Cisco Technology, Inc. Processor having systolic array pipeline for processing data packets
US6950394B1 (en) * 2001-09-07 2005-09-27 Agilent Technologies, Inc. Methods and systems to transfer information using an alternative routing associated with a communication network
US7415594B2 (en) 2002-06-26 2008-08-19 Coherent Logix, Incorporated Processing system with interspersed stall propagating processors and communication elements
KR101507828B1 (ko) 2007-04-23 2015-04-06 플라스트메드 리미티드 위험 약물의 무-오염 이전을 위한 방법 및 장치
JP5233566B2 (ja) 2007-12-20 2013-07-10 株式会社リコー トナーホッパ、プロセスカートリッジ及び画像形成装置
JP6035872B2 (ja) 2012-05-29 2016-11-30 セイコーエプソン株式会社 制御装置、制御装置の制御方法、及び、プログラム

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