DE60232367D1 - Verfahren zum dynamischen einstellen einer speicherseitenschliess-strategie - Google Patents

Verfahren zum dynamischen einstellen einer speicherseitenschliess-strategie

Info

Publication number
DE60232367D1
DE60232367D1 DE60232367T DE60232367T DE60232367D1 DE 60232367 D1 DE60232367 D1 DE 60232367D1 DE 60232367 T DE60232367 T DE 60232367T DE 60232367 T DE60232367 T DE 60232367T DE 60232367 D1 DE60232367 D1 DE 60232367D1
Authority
DE
Germany
Prior art keywords
memory
page
accesses
set point
dynamically adjusting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60232367T
Other languages
English (en)
Inventor
Opher D Khan
Jeffrey R Wilcox
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE60232367D1 publication Critical patent/DE60232367D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0215Addressing or allocation; Relocation with look ahead addressing means
DE60232367T 2002-01-03 2002-12-27 Verfahren zum dynamischen einstellen einer speicherseitenschliess-strategie Expired - Lifetime DE60232367D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/039,087 US6799241B2 (en) 2002-01-03 2002-01-03 Method for dynamically adjusting a memory page closing policy
PCT/US2002/041550 WO2003058456A1 (en) 2002-01-03 2002-12-27 Method for dynamically adjusting a memory page closing policy

Publications (1)

Publication Number Publication Date
DE60232367D1 true DE60232367D1 (de) 2009-06-25

Family

ID=21903596

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60232367T Expired - Lifetime DE60232367D1 (de) 2002-01-03 2002-12-27 Verfahren zum dynamischen einstellen einer speicherseitenschliess-strategie

Country Status (9)

Country Link
US (1) US6799241B2 (de)
EP (1) EP1461706B1 (de)
KR (1) KR100626770B1 (de)
CN (1) CN1284086C (de)
AT (1) ATE431590T1 (de)
AU (1) AU2002359868A1 (de)
DE (1) DE60232367D1 (de)
TW (1) TWI284261B (de)
WO (1) WO2003058456A1 (de)

Families Citing this family (99)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6906978B2 (en) * 2002-03-19 2005-06-14 Intel Corporation Flexible integrated memory
US6976122B1 (en) * 2002-06-21 2005-12-13 Advanced Micro Devices, Inc. Dynamic idle counter threshold value for use in memory paging policy
US6910114B2 (en) * 2002-11-15 2005-06-21 Intel Corporation Adaptive idle timer for a memory device
JP4250989B2 (ja) * 2003-03-26 2009-04-08 日本電気株式会社 メモリアクセス制御装置
US20050060533A1 (en) * 2003-09-17 2005-03-17 Steven Woo Method, device, software and apparatus for adjusting a system parameter value, such as a page closing time
US7076617B2 (en) * 2003-09-30 2006-07-11 Intel Corporation Adaptive page management
US20050204113A1 (en) * 2004-03-09 2005-09-15 International Business Machines Corp. Method, system and storage medium for dynamically selecting a page management policy for a memory controller
US7296129B2 (en) 2004-07-30 2007-11-13 International Business Machines Corporation System, method and storage medium for providing a serialized memory interface with a bus repeater
US7331010B2 (en) 2004-10-29 2008-02-12 International Business Machines Corporation System, method and storage medium for providing fault detection and correction in a memory subsystem
US7305574B2 (en) * 2004-10-29 2007-12-04 International Business Machines Corporation System, method and storage medium for bus calibration in a memory subsystem
US7512762B2 (en) 2004-10-29 2009-03-31 International Business Machines Corporation System, method and storage medium for a memory subsystem with positional read data latency
US7299313B2 (en) 2004-10-29 2007-11-20 International Business Machines Corporation System, method and storage medium for a memory subsystem command interface
US7457926B2 (en) 2005-05-18 2008-11-25 International Business Machines Corporation Cache line replacement monitoring and profiling
US7392338B2 (en) 2006-07-31 2008-06-24 Metaram, Inc. Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits
US10013371B2 (en) 2005-06-24 2018-07-03 Google Llc Configurable memory circuit system and method
US8041881B2 (en) 2006-07-31 2011-10-18 Google Inc. Memory device with emulated characteristics
US8077535B2 (en) 2006-07-31 2011-12-13 Google Inc. Memory refresh apparatus and method
US9171585B2 (en) 2005-06-24 2015-10-27 Google Inc. Configurable memory circuit system and method
US8438328B2 (en) 2008-02-21 2013-05-07 Google Inc. Emulation of abstracted DIMMs using abstracted DRAMs
US7609567B2 (en) 2005-06-24 2009-10-27 Metaram, Inc. System and method for simulating an aspect of a memory circuit
US7386656B2 (en) 2006-07-31 2008-06-10 Metaram, Inc. Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
US8111566B1 (en) 2007-11-16 2012-02-07 Google, Inc. Optimal channel design for memory devices for providing a high-speed memory interface
US8130560B1 (en) 2006-11-13 2012-03-06 Google Inc. Multi-rank partial width memory modules
US9507739B2 (en) 2005-06-24 2016-11-29 Google Inc. Configurable memory circuit system and method
US7472220B2 (en) 2006-07-31 2008-12-30 Metaram, Inc. Interface circuit system and method for performing power management operations utilizing power management signals
US7590796B2 (en) * 2006-07-31 2009-09-15 Metaram, Inc. System and method for power management in memory systems
US8359187B2 (en) 2005-06-24 2013-01-22 Google Inc. Simulating a different number of memory circuit devices
US8335894B1 (en) 2008-07-25 2012-12-18 Google Inc. Configurable memory system with interface circuit
US20080028136A1 (en) 2006-07-31 2008-01-31 Schakel Keith R Method and apparatus for refresh management of memory modules
US9542352B2 (en) 2006-02-09 2017-01-10 Google Inc. System and method for reducing command scheduling constraints of memory circuits
US8796830B1 (en) 2006-09-01 2014-08-05 Google Inc. Stackable low-profile lead frame package
US8397013B1 (en) 2006-10-05 2013-03-12 Google Inc. Hybrid memory module
US8244971B2 (en) 2006-07-31 2012-08-14 Google Inc. Memory circuit system and method
US8081474B1 (en) 2007-12-18 2011-12-20 Google Inc. Embossed heat spreader
US8089795B2 (en) 2006-02-09 2012-01-03 Google Inc. Memory module with memory stack and interface with enhanced capabilities
US8386722B1 (en) 2008-06-23 2013-02-26 Google Inc. Stacked DIMM memory interface
US8090897B2 (en) 2006-07-31 2012-01-03 Google Inc. System and method for simulating an aspect of a memory circuit
US8060774B2 (en) 2005-06-24 2011-11-15 Google Inc. Memory systems and memory modules
US8055833B2 (en) 2006-10-05 2011-11-08 Google Inc. System and method for increasing capacity, performance, and flexibility of flash storage
US20080082763A1 (en) 2006-10-02 2008-04-03 Metaram, Inc. Apparatus and method for power management of memory circuits by a system or component thereof
US8327104B2 (en) 2006-07-31 2012-12-04 Google Inc. Adjusting the timing of signals associated with a memory system
KR100714396B1 (ko) * 2005-07-18 2007-05-04 삼성전자주식회사 메모리의 처리속도를 향상시킨 컴퓨터 시스템
GB2444663B (en) 2005-09-02 2011-12-07 Metaram Inc Methods and apparatus of stacking drams
US7478259B2 (en) 2005-10-31 2009-01-13 International Business Machines Corporation System, method and storage medium for deriving clocks in a memory system
US7685392B2 (en) * 2005-11-28 2010-03-23 International Business Machines Corporation Providing indeterminate read data latency in a memory system
US9632929B2 (en) 2006-02-09 2017-04-25 Google Inc. Translating an address associated with a command communicated between a system and memory circuits
US7409516B2 (en) * 2006-03-30 2008-08-05 Intel Corporation Pending request scoreboard for out-of-order memory scheduler
US7587547B2 (en) * 2006-03-30 2009-09-08 Intel Corporation Dynamic update adaptive idle timer
US7594055B2 (en) * 2006-05-24 2009-09-22 International Business Machines Corporation Systems and methods for providing distributed technology independent memory controllers
US7724589B2 (en) 2006-07-31 2010-05-25 Google Inc. System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
US7669086B2 (en) 2006-08-02 2010-02-23 International Business Machines Corporation Systems and methods for providing collision detection in a memory system
US7870459B2 (en) 2006-10-23 2011-01-11 International Business Machines Corporation High density high reliability memory module with power gating and a fault tolerant address and command bus
US7721140B2 (en) 2007-01-02 2010-05-18 International Business Machines Corporation Systems and methods for improving serviceability of a memory system
KR100885783B1 (ko) * 2007-01-23 2009-02-26 주식회사 하이닉스반도체 플래시 메모리 장치 및 동작 방법
US7606988B2 (en) * 2007-01-29 2009-10-20 International Business Machines Corporation Systems and methods for providing a dynamic memory bank page policy
US20080282029A1 (en) * 2007-05-09 2008-11-13 Ganesh Balakrishnan Structure for dynamic optimization of dynamic random access memory (dram) controller page policy
US20080282028A1 (en) * 2007-05-09 2008-11-13 International Business Machines Corporation Dynamic optimization of dynamic random access memory (dram) controller page policy
KR100879463B1 (ko) * 2007-05-11 2009-01-20 삼성전자주식회사 억세스 권한 이양 시 프리차아지 스킵을 방지하는 동작을갖는 멀티패쓰 억세스블 반도체 메모리 장치
US8874831B2 (en) 2007-06-01 2014-10-28 Netlist, Inc. Flash-DRAM hybrid memory module
US8301833B1 (en) 2007-06-01 2012-10-30 Netlist, Inc. Non-volatile memory module
US8904098B2 (en) 2007-06-01 2014-12-02 Netlist, Inc. Redundant backup using non-volatile memory
US8209479B2 (en) 2007-07-18 2012-06-26 Google Inc. Memory circuit system and method
US8080874B1 (en) 2007-09-14 2011-12-20 Google Inc. Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
KR101598828B1 (ko) * 2008-12-22 2016-03-02 삼성전자주식회사 메모리 장치의 페이지 오픈 시간 조절 방법 및 이를 이용한메모리 시스템
US8347020B2 (en) * 2009-03-20 2013-01-01 Qualcomm Incorporated Memory access controller, systems, and methods for optimizing memory access times
EP2441007A1 (de) 2009-06-09 2012-04-18 Google, Inc. Programmierung von dimm-abschlusswiderstandswerten
US20120059983A1 (en) * 2010-09-03 2012-03-08 David Wilkins Nellans Predictor-based management of dram row-buffers
US20120317376A1 (en) * 2011-06-10 2012-12-13 Advanced Micro Devices, Inc. Row buffer register file
US10838646B2 (en) 2011-07-28 2020-11-17 Netlist, Inc. Method and apparatus for presearching stored data
US10380022B2 (en) 2011-07-28 2019-08-13 Netlist, Inc. Hybrid memory module and system and method of operating the same
US10198350B2 (en) 2011-07-28 2019-02-05 Netlist, Inc. Memory module having volatile and non-volatile memory subsystems and method of operation
US9684600B2 (en) * 2011-11-30 2017-06-20 International Business Machines Corporation Dynamic process/object scoped memory affinity adjuster
CN102662713B (zh) 2012-04-12 2014-04-16 腾讯科技(深圳)有限公司 提高应用程序运行速度的方法、装置及终端
CN103136120B (zh) * 2012-12-31 2016-01-27 北京北大众志微系统科技有限责任公司 行缓冲管理策略确定方法和装置、bank划分方法和装置
US10372551B2 (en) 2013-03-15 2019-08-06 Netlist, Inc. Hybrid memory system with configurable error thresholds and failure analysis capability
KR20150138211A (ko) 2013-03-28 2015-12-09 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. 메모리 활성화 레이트의 조정
WO2014178839A1 (en) 2013-04-30 2014-11-06 Hewlett-Packard Development Company, L.P. Memory access rate
US9436600B2 (en) 2013-06-11 2016-09-06 Svic No. 28 New Technology Business Investment L.L.P. Non-volatile memory storage for multi-channel memory system
US9378127B2 (en) * 2013-06-21 2016-06-28 Intel Corporation Dynamic memory page policy
US10248328B2 (en) 2013-11-07 2019-04-02 Netlist, Inc. Direct data move between DRAM and storage on a memory module
KR101914260B1 (ko) * 2014-04-22 2019-01-14 후아웨이 테크놀러지 컴퍼니 리미티드 파일 관리 방법 및 파일 시스템
KR20160042224A (ko) * 2014-10-07 2016-04-19 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
WO2016089355A1 (en) 2014-12-01 2016-06-09 Hewlett Packard Enterprise Development Lp Auto-negotiation over extended backplane
WO2016122585A1 (en) * 2015-01-30 2016-08-04 Hewlett Packard Enterprise Development Lp Modifying characteristics of a memory segment
CN105068940B (zh) * 2015-07-28 2018-07-31 北京工业大学 一种基于Bank划分的自适应页策略确定方法
WO2017065732A1 (en) 2015-10-12 2017-04-20 Hewlett Packard Enterprise Development Lp Switch network architecture
EP3258382B1 (de) * 2016-06-14 2021-08-11 Arm Ltd Speichersteuerung
CN106874106A (zh) * 2016-12-23 2017-06-20 北京北大众志微系统科技有限责任公司 一种主存bank划分方法及装置
US10191689B2 (en) * 2016-12-29 2019-01-29 Intel Corporation Systems and methods for page management using local page information
JP6905195B2 (ja) * 2017-11-16 2021-07-21 富士通株式会社 データ転送装置、演算処理装置及びデータ転送方法
CN108595124A (zh) * 2018-04-27 2018-09-28 江苏华存电子科技有限公司 一种提升多颗闪存平行写入校能的管理方法
US10559348B2 (en) 2018-05-16 2020-02-11 Intel Corporation System, apparatus and method for simultaneous read and precharge of a memory
US10776047B2 (en) 2018-08-30 2020-09-15 Micron Technology, Inc. Memory characteristic based access commands
CN111372369B (zh) 2018-12-25 2023-07-07 奥特斯科技(重庆)有限公司 具有部件屏蔽的部件承载件及其制造方法
KR20200089886A (ko) * 2019-01-18 2020-07-28 에스케이하이닉스 주식회사 데이터 저장 시스템 및 이를 위한 프리차지 정책 설정 방법
US11114150B2 (en) 2019-04-18 2021-09-07 Rambus Inc. Memory system with multiple open rows per bank
US11216386B2 (en) * 2019-09-26 2022-01-04 Intel Corporation Techniques for setting a 2-level auto-close timer to access a memory device
CN112487340A (zh) * 2020-12-23 2021-03-12 深圳市哈哈丫丫互联网有限公司 一种极速简约防盗Linux全屏浏览器的创新技术
US11449267B1 (en) 2021-04-28 2022-09-20 Micron Technology, Inc. Determination of durations of memory device temperatures

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6269433B1 (en) 1998-04-29 2001-07-31 Compaq Computer Corporation Memory controller using queue look-ahead to reduce memory latency
US6389514B1 (en) 1999-03-25 2002-05-14 Hewlett-Packard Company Method and computer system for speculatively closing pages in memory
US6604186B1 (en) * 1999-10-19 2003-08-05 Intel Corporation Method for dynamically adjusting memory system paging policy

Also Published As

Publication number Publication date
KR100626770B1 (ko) 2006-09-25
EP1461706B1 (de) 2009-05-13
TW200305803A (en) 2003-11-01
US6799241B2 (en) 2004-09-28
CN1613064A (zh) 2005-05-04
ATE431590T1 (de) 2009-05-15
WO2003058456A1 (en) 2003-07-17
TWI284261B (en) 2007-07-21
KR20040064742A (ko) 2004-07-19
US20030126354A1 (en) 2003-07-03
AU2002359868A1 (en) 2003-07-24
EP1461706A1 (de) 2004-09-29
CN1284086C (zh) 2006-11-08

Similar Documents

Publication Publication Date Title
DE60232367D1 (de) Verfahren zum dynamischen einstellen einer speicherseitenschliess-strategie
US6526483B1 (en) Page open hint in transactions
US20030189870A1 (en) Individual memory page activity timing method and system
WO2004013897A3 (en) Memory hub and access method having internal row caching
US20060112255A1 (en) Method and apparatus for determining a dynamic random access memory page management implementation
ATE500554T1 (de) Speichersystem mit einer kürzeren burstlänge als der prefetchlänge
WO2005114428A3 (en) Providing an alternative caching scheme at the storage area network level
MY138723A (en) Implementation of memory access control using optimizations
KR20050108352A (ko) 버퍼된 기록들 및 메모리 페이지 제어
ATE405885T1 (de) Methode zum umschalten zwischen lesen und schreiben in einem speicherkontroller
CN106326140A (zh) 数据拷贝方法、直接内存访问控制器及计算机系统
US20040268050A1 (en) Apparatus and method for an adaptive multiple line prefetcher
US7133995B1 (en) Dynamic page conflict prediction for DRAM
US20170147429A1 (en) Adjustable error protection for stored data
US6871119B2 (en) Filter based throttling
US6976122B1 (en) Dynamic idle counter threshold value for use in memory paging policy
Stevens et al. An integrated simulation infrastructure for the entire memory hierarchy: Cache, dram, nonvolatile memory, and disk
WO2003050688A3 (en) System and method for handling device accesses to a memory providing increased memory access security
EP0470739A1 (de) Verfahren zur Verwaltung einer Cache-Speicheranordnung
WO2004095205A3 (en) Nodma cache
WO2003083661A8 (en) Memory-access management method and system for synchronous dynamic random-access memory or the like
WO2001088717A3 (en) System and method for using a page tracking buffer to reduce main memory latency in a computer system
US11494120B2 (en) Adaptive memory transaction scheduling
WO2003090231A3 (en) Method of performing access to a single-port memory device, memory access device, integrated circuit device and method of use of an integrated circuit device
US20230168818A1 (en) Memory device having reduced power noise in refresh operation and operating method thereof

Legal Events

Date Code Title Description
8364 No opposition during term of opposition