DE60227048D1 - Serielle verbindungsarchitektur - Google Patents

Serielle verbindungsarchitektur

Info

Publication number
DE60227048D1
DE60227048D1 DE60227048T DE60227048T DE60227048D1 DE 60227048 D1 DE60227048 D1 DE 60227048D1 DE 60227048 T DE60227048 T DE 60227048T DE 60227048 T DE60227048 T DE 60227048T DE 60227048 D1 DE60227048 D1 DE 60227048D1
Authority
DE
Germany
Prior art keywords
data
pll
fir
chip
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60227048T
Other languages
English (en)
Inventor
Hayden Clavie Cranford
Vernon Roberts Norman
Martin Leo Schmatz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE60227048D1 publication Critical patent/DE60227048D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0044—Control loops for carrier regulation
    • H04L2027/0063—Elements of loops
    • H04L2027/0067—Phase error detectors
DE60227048T 2001-01-16 2002-01-15 Serielle verbindungsarchitektur Expired - Lifetime DE60227048D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US26240101P 2001-01-16 2001-01-16
US09/996,113 US6970529B2 (en) 2001-01-16 2001-11-28 Unified digital architecture
PCT/GB2002/000123 WO2002057924A2 (en) 2001-01-16 2002-01-15 Serial link architecture

Publications (1)

Publication Number Publication Date
DE60227048D1 true DE60227048D1 (de) 2008-07-24

Family

ID=26949196

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60227048T Expired - Lifetime DE60227048D1 (de) 2001-01-16 2002-01-15 Serielle verbindungsarchitektur

Country Status (8)

Country Link
US (2) US6970529B2 (de)
EP (1) EP1354274B1 (de)
KR (1) KR20030078066A (de)
AT (1) ATE398308T1 (de)
AU (1) AU2002219371A1 (de)
DE (1) DE60227048D1 (de)
TW (1) TW571538B (de)
WO (1) WO2002057924A2 (de)

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Also Published As

Publication number Publication date
EP1354274B1 (de) 2008-06-11
AU2002219371A1 (en) 2002-07-30
KR20030078066A (ko) 2003-10-04
WO2002057924A2 (en) 2002-07-25
WO2002057924A3 (en) 2003-06-26
TW571538B (en) 2004-01-11
US20020094055A1 (en) 2002-07-18
ATE398308T1 (de) 2008-07-15
EP1354274A2 (de) 2003-10-22
US20060029177A1 (en) 2006-02-09
US7646839B2 (en) 2010-01-12
US6970529B2 (en) 2005-11-29

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