DE60220339D1 - Layout-Technik für ein induktives C3MOS Breitband - Google Patents

Layout-Technik für ein induktives C3MOS Breitband

Info

Publication number
DE60220339D1
DE60220339D1 DE60220339T DE60220339T DE60220339D1 DE 60220339 D1 DE60220339 D1 DE 60220339D1 DE 60220339 T DE60220339 T DE 60220339T DE 60220339 T DE60220339 T DE 60220339T DE 60220339 D1 DE60220339 D1 DE 60220339D1
Authority
DE
Germany
Prior art keywords
c3mos
broadband
inductive
layout technology
layout
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60220339T
Other languages
English (en)
Other versions
DE60220339T2 (de
Inventor
Afshin D Momtaz
Michael M Green
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Broadcom Corp
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Publication of DE60220339D1 publication Critical patent/DE60220339D1/de
Application granted granted Critical
Publication of DE60220339T2 publication Critical patent/DE60220339T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE60220339T 2001-05-17 2002-04-26 Layout-Technik für ein induktives C3MOS Breitband Expired - Lifetime DE60220339T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US861143 1986-05-08
US09/861,143 US6864558B2 (en) 2001-05-17 2001-05-17 Layout technique for C3MOS inductive broadbanding

Publications (2)

Publication Number Publication Date
DE60220339D1 true DE60220339D1 (de) 2007-07-12
DE60220339T2 DE60220339T2 (de) 2008-01-31

Family

ID=25335003

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60220339T Expired - Lifetime DE60220339T2 (de) 2001-05-17 2002-04-26 Layout-Technik für ein induktives C3MOS Breitband

Country Status (3)

Country Link
US (2) US6864558B2 (de)
EP (1) EP1263047B1 (de)
DE (1) DE60220339T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6624699B2 (en) * 2001-10-25 2003-09-23 Broadcom Corporation Current-controlled CMOS wideband data amplifier circuits
US7362174B2 (en) * 2005-07-29 2008-04-22 Broadcom Corporation Current-controlled CMOS (C3MOS) wideband input data amplifier for reduced differential and common-mode reflection
US7598811B2 (en) * 2005-07-29 2009-10-06 Broadcom Corporation Current-controlled CMOS (C3MOS) fully differential integrated wideband amplifier/equalizer with adjustable gain and frequency response without additional power or loading
US7598788B2 (en) * 2005-09-06 2009-10-06 Broadcom Corporation Current-controlled CMOS (C3MOS) fully differential integrated delay cell with variable delay and high bandwidth
CA2687120A1 (en) 2007-05-08 2008-11-13 Scanimetrics Inc. Ultra high speed signal transmission/reception
US8901973B2 (en) * 2013-04-19 2014-12-02 Keysight Technologies, Inc. Multi-band frequency multiplier
US10840907B1 (en) 2019-11-19 2020-11-17 Honeywell International Inc. Source-coupled logic with reference controlled inputs

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Also Published As

Publication number Publication date
EP1263047A2 (de) 2002-12-04
US7132727B2 (en) 2006-11-07
DE60220339T2 (de) 2008-01-31
EP1263047A3 (de) 2005-09-21
US20040207040A1 (en) 2004-10-21
US20020171095A1 (en) 2002-11-21
EP1263047B1 (de) 2007-05-30
US6864558B2 (en) 2005-03-08

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Legal Events

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8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: BOSCH JEHLE PATENTANWALTSGESELLSCHAFT MBH, 80639 M