DE602006011684D1 - Nichtflüchtiger Halbleiterspeicher mit drei Zuständen und dessen Betriebsverfahren - Google Patents

Nichtflüchtiger Halbleiterspeicher mit drei Zuständen und dessen Betriebsverfahren

Info

Publication number
DE602006011684D1
DE602006011684D1 DE602006011684T DE602006011684T DE602006011684D1 DE 602006011684 D1 DE602006011684 D1 DE 602006011684D1 DE 602006011684 T DE602006011684 T DE 602006011684T DE 602006011684 T DE602006011684 T DE 602006011684T DE 602006011684 D1 DE602006011684 D1 DE 602006011684D1
Authority
DE
Germany
Prior art keywords
states
semiconductor memory
operating method
volatile semiconductor
volatile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006011684T
Other languages
English (en)
Inventor
Ki Tae Park
Jung Dal Choi
Sung Kyu Jo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE602006011684D1 publication Critical patent/DE602006011684D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
DE602006011684T 2005-07-29 2006-07-17 Nichtflüchtiger Halbleiterspeicher mit drei Zuständen und dessen Betriebsverfahren Active DE602006011684D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20050069270 2005-07-29
KR1020060008358A KR100666185B1 (ko) 2005-07-29 2006-01-26 3-레벨 불휘발성 반도체 메모리 장치 및 이에 대한구동방법

Publications (1)

Publication Number Publication Date
DE602006011684D1 true DE602006011684D1 (de) 2010-03-04

Family

ID=37674303

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006011684T Active DE602006011684D1 (de) 2005-07-29 2006-07-17 Nichtflüchtiger Halbleiterspeicher mit drei Zuständen und dessen Betriebsverfahren

Country Status (6)

Country Link
US (3) US7366033B2 (de)
EP (2) EP1750279B1 (de)
JP (1) JP5063950B2 (de)
KR (1) KR100666185B1 (de)
CN (1) CN1905072B (de)
DE (1) DE602006011684D1 (de)

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KR100597790B1 (ko) * 2005-05-04 2006-07-06 삼성전자주식회사 멀티레벨 불휘발성 반도체 메모리 장치 및 이에 대한데이터 독출방법
WO2007069322A1 (ja) * 2005-12-15 2007-06-21 Spansion Llc 半導体装置およびその制御方法
KR100666183B1 (ko) * 2006-02-01 2007-01-09 삼성전자주식회사 3-레벨 불휘발성 반도체 메모리 장치 및 이에 대한구동방법
KR100666223B1 (ko) * 2006-02-22 2007-01-09 삼성전자주식회사 메모리셀 사이의 커플링 노이즈를 저감시키는 3-레벨불휘발성 반도체 메모리 장치 및 이에 대한 구동방법
US7639540B2 (en) * 2007-02-16 2009-12-29 Mosaid Technologies Incorporated Non-volatile semiconductor memory having multiple external power supplies
US7646645B2 (en) * 2007-04-13 2010-01-12 Atmel Corporation Method and apparatus for testing the functionality of a page decoder
US7577029B2 (en) * 2007-05-04 2009-08-18 Mosaid Technologies Incorporated Multi-level cell access buffer with dual function
KR101397549B1 (ko) * 2007-08-16 2014-05-26 삼성전자주식회사 고속 프로그램이 가능한 불휘발성 반도체 메모리 시스템 및그것의 독출 방법
US7796431B2 (en) * 2008-10-01 2010-09-14 Elite Semiconductor Memory Technology Inc. Page buffer used in a NAND flash memory and programming method thereof
US7852671B2 (en) 2008-10-30 2010-12-14 Micron Technology, Inc. Data path for multi-level cell memory, methods for storing and methods for utilizing a memory array
KR101736985B1 (ko) 2011-02-17 2017-05-17 삼성전자 주식회사 불휘발성 메모리 장치 및 그것의 읽기 방법
US8503237B1 (en) * 2011-05-18 2013-08-06 Western Digital Technologies, Inc. System and method for data recovery in a solid state storage device
JP2013254537A (ja) * 2012-06-06 2013-12-19 Toshiba Corp 半導体記憶装置及びコントローラ
KR102568203B1 (ko) 2016-02-23 2023-08-21 삼성전자주식회사 비휘발성 메모리 장치
KR102530071B1 (ko) 2016-03-02 2023-05-08 삼성전자주식회사 페이지 버퍼를 포함하는 불휘발성 메모리 장치 및 그 동작방법
JP7051484B2 (ja) * 2018-02-22 2022-04-11 キオクシア株式会社 半導体メモリ
US11031071B2 (en) 2019-03-05 2021-06-08 Samsung Electronics Co., Ltd. Nonvolatile memory device, operating method of nonvolatile memory device, and storage device including nonvolatile memory device
KR20200107024A (ko) * 2019-03-05 2020-09-16 삼성전자주식회사 불휘발성 메모리 장치, 불휘발성 메모리 장치의 동작 방법, 그리고 불휘발성 메모리 장치를 포함하는 스토리지 장치

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US4327424A (en) * 1980-07-17 1982-04-27 International Business Machines Corporation Read-only storage using enhancement-mode, depletion-mode or omitted gate field-effect transistors
JPS6342099A (ja) * 1986-08-06 1988-02-23 Fujitsu Ltd ３値レベルｒｏｍ
US5287305A (en) * 1991-06-28 1994-02-15 Sharp Kabushiki Kaisha Memory device including two-valued/n-valued conversion unit
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JPH0766304A (ja) * 1993-08-31 1995-03-10 Toshiba Corp 半導体記憶装置
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JP3181454B2 (ja) 1993-12-13 2001-07-03 株式会社東芝 不揮発性半導体記憶装置
TW389909B (en) * 1995-09-13 2000-05-11 Toshiba Corp Nonvolatile semiconductor memory device and its usage
KR100205240B1 (ko) * 1996-09-13 1999-07-01 윤종용 단일 비트 및 다중 비트 셀들이 장착된 불휘발성 반도체 메모리 장치
US5862074A (en) * 1996-10-04 1999-01-19 Samsung Electronics Co., Ltd. Integrated circuit memory devices having reconfigurable nonvolatile multi-bit memory cells therein and methods of operating same
JP3592887B2 (ja) * 1997-04-30 2004-11-24 株式会社東芝 不揮発性半導体記憶装置
US6272049B1 (en) * 1999-05-12 2001-08-07 Matsushita Electric Industrial Co., Ltd. Non-volatile semiconductor memory device having increased operating speed
JP3472271B2 (ja) 2001-02-13 2003-12-02 株式会社東芝 不揮発性半導体記憶装置
US6717847B2 (en) * 2001-09-17 2004-04-06 Sandisk Corporation Selective operation of a multi-state non-volatile memory system in a binary mode
KR100463197B1 (ko) 2001-12-24 2004-12-23 삼성전자주식회사 멀티-페이지 프로그램 동작, 멀티-페이지 읽기 동작,그리고 멀티-블록 소거 동작을 갖는 낸드 플래시 메모리장치
KR100471167B1 (ko) * 2002-05-13 2005-03-08 삼성전자주식회사 프로그램된 메모리 셀들을 검증하기 위한 페이지 버퍼를구비한 반도체 메모리 장치
KR100512181B1 (ko) * 2003-07-11 2005-09-05 삼성전자주식회사 멀티 레벨 셀을 갖는 플래시 메모리 장치와 그것의 독출방법 및 프로그램 방법
ITMI20031619A1 (it) * 2003-08-06 2005-02-07 St Microelectronics Srl Amplificatore di rilevamento perfezionato.
US7170793B2 (en) * 2004-04-13 2007-01-30 Sandisk Corporation Programming inhibit for non-volatile memory
US7057939B2 (en) * 2004-04-23 2006-06-06 Sandisk Corporation Non-volatile memory and control with improved partial page program capability
KR100597788B1 (ko) * 2004-12-17 2006-07-06 삼성전자주식회사 프로그램 동작 속도를 개선하는 불휘발성 반도체 메모리장치의 페이지 버퍼와 이에 대한 구동방법
KR100666174B1 (ko) * 2005-04-27 2007-01-09 삼성전자주식회사 3-레벨 불휘발성 반도체 메모리 장치 및 이에 대한구동방법
KR100597790B1 (ko) * 2005-05-04 2006-07-06 삼성전자주식회사 멀티레벨 불휘발성 반도체 메모리 장치 및 이에 대한데이터 독출방법
KR100666183B1 (ko) * 2006-02-01 2007-01-09 삼성전자주식회사 3-레벨 불휘발성 반도체 메모리 장치 및 이에 대한구동방법
KR100666186B1 (ko) * 2006-02-17 2007-01-09 삼성전자주식회사 3-레벨 불휘발성 반도체 메모리 장치 및 이에 적용되는페이지 버퍼
KR100666223B1 (ko) * 2006-02-22 2007-01-09 삼성전자주식회사 메모리셀 사이의 커플링 노이즈를 저감시키는 3-레벨불휘발성 반도체 메모리 장치 및 이에 대한 구동방법

Also Published As

Publication number Publication date
EP1750279B1 (de) 2010-01-13
CN1905072A (zh) 2007-01-31
EP2043104B1 (de) 2012-05-16
KR100666185B1 (ko) 2007-01-09
US20100271873A1 (en) 2010-10-28
US7773422B2 (en) 2010-08-10
JP5063950B2 (ja) 2012-10-31
EP1750279A2 (de) 2007-02-07
EP2043104A1 (de) 2009-04-01
EP1750279A3 (de) 2007-08-15
US20070025161A1 (en) 2007-02-01
US20080165580A1 (en) 2008-07-10
US8085607B2 (en) 2011-12-27
US7366033B2 (en) 2008-04-29
CN1905072B (zh) 2011-05-18
JP2007042265A (ja) 2007-02-15

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