DE602005023273D1 - Ein verbessertes Cache-Speicher System - Google Patents
Ein verbessertes Cache-Speicher SystemInfo
- Publication number
- DE602005023273D1 DE602005023273D1 DE602005023273T DE602005023273T DE602005023273D1 DE 602005023273 D1 DE602005023273 D1 DE 602005023273D1 DE 602005023273 T DE602005023273 T DE 602005023273T DE 602005023273 T DE602005023273 T DE 602005023273T DE 602005023273 D1 DE602005023273 D1 DE 602005023273D1
- Authority
- DE
- Germany
- Prior art keywords
- cache system
- improved cache
- improved
- cache
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0893—Caches characterised by their organisation or structure
- G06F12/0895—Caches characterised by their organisation or structure of parts of caches, e.g. directory or tag array
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
- G06F12/1063—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache the data cache being concurrently virtually addressed
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05103593A EP1717708B1 (de) | 2005-04-29 | 2005-04-29 | Ein verbessertes Cache-Speicher System |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602005023273D1 true DE602005023273D1 (de) | 2010-10-14 |
Family
ID=35432390
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602005023273T Active DE602005023273D1 (de) | 2005-04-29 | 2005-04-29 | Ein verbessertes Cache-Speicher System |
Country Status (3)
Country | Link |
---|---|
US (1) | US8250300B2 (de) |
EP (1) | EP1717708B1 (de) |
DE (1) | DE602005023273D1 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012061048A1 (en) | 2010-11-04 | 2012-05-10 | Rambus Inc. | Techniques for storing data and tags in different memory arrays |
US9569359B2 (en) | 2011-02-24 | 2017-02-14 | Rambus Inc. | Methods and apparatuses for addressing memory caches |
US9524242B2 (en) | 2014-01-28 | 2016-12-20 | Stmicroelectronics International N.V. | Cache memory system with simultaneous read-write in single cycle |
JP6027567B2 (ja) * | 2014-03-07 | 2016-11-16 | 株式会社東芝 | キャッシュメモリおよびプロセッサシステム |
KR102317248B1 (ko) * | 2014-03-17 | 2021-10-26 | 한국전자통신연구원 | 캐시의 부분연관 재구성을 이용한 캐시 제어 장치 및 캐시 관리 방법 |
US9558120B2 (en) * | 2014-03-27 | 2017-01-31 | Intel Corporation | Method, apparatus and system to cache sets of tags of an off-die cache memory |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4953073A (en) * | 1986-02-06 | 1990-08-28 | Mips Computer Systems, Inc. | Cup chip having tag comparator and address translation unit on chip and connected to off-chip cache and main memories |
US5226133A (en) * | 1989-12-01 | 1993-07-06 | Silicon Graphics, Inc. | Two-level translation look-aside buffer using partial addresses for enhanced speed |
JP2678527B2 (ja) * | 1991-01-08 | 1997-11-17 | 三菱電機株式会社 | キャッシュメモリ装置 |
US5812815A (en) * | 1995-04-28 | 1998-09-22 | Apple Computer, Inc. | Address tenure control for cache management wherein bus master addresses are internally latched in a cache controller |
US5857214A (en) * | 1995-12-18 | 1999-01-05 | Advanced Micro Devices, Inc. | Microprocessor with a fixed cache size selected from a predesigned set of sizes |
US5710905A (en) * | 1995-12-21 | 1998-01-20 | Cypress Semiconductor Corp. | Cache controller for a non-symetric cache system |
US5752261A (en) * | 1996-11-07 | 1998-05-12 | Ncr Corporation | Method and apparatus for detecting thrashing in a cache memory |
US6516386B1 (en) * | 1997-12-31 | 2003-02-04 | Intel Corporation | Method and apparatus for indexing a cache |
US6192458B1 (en) * | 1998-03-23 | 2001-02-20 | International Business Machines Corporation | High performance cache directory addressing scheme for variable cache sizes utilizing associativity |
US6243795B1 (en) * | 1998-08-04 | 2001-06-05 | The Board Of Governors For Higher Education, State Of Rhode Island And Providence Plantations | Redundant, asymmetrically parallel disk cache for a data storage system |
US6442666B1 (en) * | 1999-01-28 | 2002-08-27 | Infineon Technologies Ag | Techniques for improving memory access in a virtual memory system |
GB2373889A (en) * | 2001-03-30 | 2002-10-02 | Siroyan Ltd | Address translation with partial physical addresses |
US6854033B2 (en) * | 2001-06-29 | 2005-02-08 | Intel Corporation | Using linked list for caches with variable length data |
US6834327B2 (en) * | 2002-02-08 | 2004-12-21 | Hewlett-Packard Development Company, L.P. | Multilevel cache system having unified cache tag memory |
US6832294B2 (en) * | 2002-04-22 | 2004-12-14 | Sun Microsystems, Inc. | Interleaved n-way set-associative external cache |
US7451182B2 (en) * | 2002-06-28 | 2008-11-11 | Intel Corporation | Coordinating operations of network and host processors |
US20040078508A1 (en) * | 2002-10-02 | 2004-04-22 | Rivard William G. | System and method for high performance data storage and retrieval |
US6950906B2 (en) * | 2002-12-13 | 2005-09-27 | Hewlett-Packard Development Company, L.P. | System for and method of operating a cache |
US7143239B2 (en) * | 2003-08-07 | 2006-11-28 | Hewlett-Packard Development Company, L.P. | Cache structure and methodology |
US7162584B2 (en) * | 2003-12-29 | 2007-01-09 | Intel Corporation | Mechanism to include hints within compressed data |
JP3834323B2 (ja) * | 2004-04-30 | 2006-10-18 | 日本電気株式会社 | キャッシュメモリおよびキャッシュ制御方法 |
US7243191B2 (en) * | 2004-08-31 | 2007-07-10 | Intel Corporation | Compressing data in a cache memory |
-
2005
- 2005-04-29 EP EP05103593A patent/EP1717708B1/de not_active Expired - Fee Related
- 2005-04-29 DE DE602005023273T patent/DE602005023273D1/de active Active
-
2006
- 2006-05-01 US US11/415,880 patent/US8250300B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP1717708A1 (de) | 2006-11-02 |
US20060271723A1 (en) | 2006-11-30 |
US8250300B2 (en) | 2012-08-21 |
EP1717708B1 (de) | 2010-09-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DK1889198T3 (da) | Farma-informatiksystem | |
DK1928521T3 (da) | Trombektomikateterindsættelsessystem | |
DK1928882T3 (da) | (s)-n-methylnaltrexon | |
DK2194043T3 (da) | Fremgangsmåder | |
ATE467138T1 (de) | Radarsystem | |
ATE408603T1 (de) | Pyrazolylcarboxanilide | |
DE112006001892A5 (de) | Heizsystem | |
DE502006007103D1 (de) | Anschluss-system | |
CR9974A (es) | Gavión | |
DE602006004919D1 (de) | Endoskopsystem | |
ATE549324T1 (de) | Tetrahydrobenzoxazine | |
DE602005027499D1 (de) | Endoskopsystem | |
ATE519404T1 (de) | Siebträgersystem | |
DE602006017145D1 (de) | Fahrzeuge | |
DE502006008147D1 (de) | Blendschutzsystem | |
ATE404837T1 (de) | Kondensationsanlage | |
DE602006018435D1 (de) | Surround-System | |
DE602006015274D1 (de) | Mikroskopsystem | |
FI20050866A0 (fi) | Aggregaatin jäähdytysjärjestelmä | |
DE602005023273D1 (de) | Ein verbessertes Cache-Speicher System | |
ITMO20050193A1 (it) | Apparato illuminante | |
DE502006006589D1 (de) | Teils | |
SE0501828L (sv) | Rörelsetransformerande arrangemang | |
ATE420331T1 (de) | Kondensationsanlage | |
AT501523A3 (de) | Estrich |