DE602004025479D1 - Verfahren zur Verringerung von Stapelfehler-Keimstellen in bipolaren Siliziumkarbid-bauelementen - Google Patents
Verfahren zur Verringerung von Stapelfehler-Keimstellen in bipolaren Siliziumkarbid-bauelementenInfo
- Publication number
- DE602004025479D1 DE602004025479D1 DE602004025479T DE602004025479T DE602004025479D1 DE 602004025479 D1 DE602004025479 D1 DE 602004025479D1 DE 602004025479 T DE602004025479 T DE 602004025479T DE 602004025479 T DE602004025479 T DE 602004025479T DE 602004025479 D1 DE602004025479 D1 DE 602004025479D1
- Authority
- DE
- Germany
- Prior art keywords
- silicon carbide
- substrate
- stacking fault
- thereafter
- etch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30608—Anisotropic liquid etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02019—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02378—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02529—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/931—Silicon carbide semiconductor
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Plasma & Fusion (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Weting (AREA)
- Bipolar Transistors (AREA)
- Chemical Vapour Deposition (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/605,312 US7018554B2 (en) | 2003-09-22 | 2003-09-22 | Method to reduce stacking fault nucleation sites and reduce forward voltage drift in bipolar devices |
PCT/US2004/030041 WO2005034208A2 (en) | 2003-09-22 | 2004-09-14 | METHOD TO REDUCE STACKING FAULT NUCLEATION SITES AND REDUCE Vf DRIFT IN BIPOLAR DEVICES |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602004025479D1 true DE602004025479D1 (de) | 2010-03-25 |
Family
ID=34312546
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602004025479T Active DE602004025479D1 (de) | 2003-09-22 | 2004-09-14 | Verfahren zur Verringerung von Stapelfehler-Keimstellen in bipolaren Siliziumkarbid-bauelementen |
Country Status (9)
Country | Link |
---|---|
US (2) | US7018554B2 (de) |
EP (1) | EP1665343B1 (de) |
JP (1) | JP4723500B2 (de) |
CN (1) | CN100470725C (de) |
AT (1) | ATE457523T1 (de) |
CA (1) | CA2539618A1 (de) |
DE (1) | DE602004025479D1 (de) |
TW (1) | TW200525582A (de) |
WO (1) | WO2005034208A2 (de) |
Families Citing this family (70)
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US7018554B2 (en) * | 2003-09-22 | 2006-03-28 | Cree, Inc. | Method to reduce stacking fault nucleation sites and reduce forward voltage drift in bipolar devices |
US7230274B2 (en) | 2004-03-01 | 2007-06-12 | Cree, Inc | Reduction of carrot defects in silicon carbide epitaxy |
US7173285B2 (en) | 2004-03-18 | 2007-02-06 | Cree, Inc. | Lithographic methods to reduce stacking fault nucleation sites |
JP4639326B2 (ja) * | 2004-03-24 | 2011-02-23 | 独立行政法人産業技術総合研究所 | 半導体装置 |
US7391058B2 (en) * | 2005-06-27 | 2008-06-24 | General Electric Company | Semiconductor devices and methods of making same |
US9455356B2 (en) * | 2006-02-28 | 2016-09-27 | Cree, Inc. | High power silicon carbide (SiC) PiN diodes having low forward voltage drops |
CA2584950A1 (en) * | 2006-04-26 | 2007-10-26 | Kansai Paint Co., Ltd. | Powder primer composition and method for forming coating film |
JP4946202B2 (ja) * | 2006-06-26 | 2012-06-06 | 日立金属株式会社 | 炭化珪素半導体エピタキシャル基板の製造方法。 |
US7728402B2 (en) | 2006-08-01 | 2010-06-01 | Cree, Inc. | Semiconductor devices including schottky diodes with controlled breakdown |
US8432012B2 (en) | 2006-08-01 | 2013-04-30 | Cree, Inc. | Semiconductor devices including schottky diodes having overlapping doped regions and methods of fabricating same |
WO2008020911A2 (en) | 2006-08-17 | 2008-02-21 | Cree, Inc. | High power insulated gate bipolar transistors |
JP5131675B2 (ja) * | 2006-08-25 | 2013-01-30 | 国立大学法人京都大学 | 炭化ケイ素基板の製造方法 |
US8157914B1 (en) | 2007-02-07 | 2012-04-17 | Chien-Min Sung | Substrate surface modifications for compositional gradation of crystalline materials and associated products |
US8835987B2 (en) | 2007-02-27 | 2014-09-16 | Cree, Inc. | Insulated gate bipolar transistors including current suppressing layers |
WO2009031270A1 (ja) * | 2007-09-03 | 2009-03-12 | Panasonic Corporation | ウエハ再生方法およびウエハ再生装置 |
JP2009088223A (ja) * | 2007-09-28 | 2009-04-23 | Hitachi Cable Ltd | 炭化珪素半導体基板およびそれを用いた炭化珪素半導体装置 |
WO2009048997A1 (en) * | 2007-10-12 | 2009-04-16 | The Government Of The United States Of America, As Represented By The Secretary Of The Navy | Producing epitaxial layers with low basal plane dislocation concentrations |
US8232558B2 (en) | 2008-05-21 | 2012-07-31 | Cree, Inc. | Junction barrier Schottky diodes with current surge capability |
JP5458509B2 (ja) | 2008-06-04 | 2014-04-02 | 日立金属株式会社 | 炭化珪素半導体基板 |
DE102008060372B4 (de) | 2008-09-05 | 2015-11-05 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zur Herstellung einer Siliziumkarbid-Epitaxieschicht und eines Siliziumkarbid-Bauelementes |
US8497552B2 (en) * | 2008-12-01 | 2013-07-30 | Cree, Inc. | Semiconductor devices with current shifting regions and related methods |
US8294507B2 (en) | 2009-05-08 | 2012-10-23 | Cree, Inc. | Wide bandgap bipolar turn-off thyristor having non-negative temperature coefficient and related control circuits |
US8629509B2 (en) | 2009-06-02 | 2014-01-14 | Cree, Inc. | High voltage insulated gate bipolar transistors with minority carrier diverter |
US8193848B2 (en) | 2009-06-02 | 2012-06-05 | Cree, Inc. | Power switching devices having controllable surge current capabilities |
US8541787B2 (en) | 2009-07-15 | 2013-09-24 | Cree, Inc. | High breakdown voltage wide band-gap MOS-gated bipolar junction transistors with avalanche capability |
US9464366B2 (en) * | 2009-08-20 | 2016-10-11 | The United States Of America, As Represented By The Secretary Of The Navy | Reduction of basal plane dislocations in epitaxial SiC |
US8354690B2 (en) | 2009-08-31 | 2013-01-15 | Cree, Inc. | Solid-state pinch off thyristor circuits |
US9117739B2 (en) | 2010-03-08 | 2015-08-25 | Cree, Inc. | Semiconductor devices with heterojunction barrier regions and methods of fabricating same |
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US8415671B2 (en) | 2010-04-16 | 2013-04-09 | Cree, Inc. | Wide band-gap MOSFETs having a heterojunction under gate trenches thereof and related methods of forming such devices |
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US9673283B2 (en) | 2011-05-06 | 2017-06-06 | Cree, Inc. | Power module for supporting high current densities |
US9142662B2 (en) | 2011-05-06 | 2015-09-22 | Cree, Inc. | Field effect transistor devices with low source resistance |
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US8664665B2 (en) | 2011-09-11 | 2014-03-04 | Cree, Inc. | Schottky diode employing recesses for elements of junction barrier array |
US9640617B2 (en) | 2011-09-11 | 2017-05-02 | Cree, Inc. | High performance power module |
US8680587B2 (en) | 2011-09-11 | 2014-03-25 | Cree, Inc. | Schottky diode |
US8618582B2 (en) | 2011-09-11 | 2013-12-31 | Cree, Inc. | Edge termination structure employing recesses for edge termination elements |
US9373617B2 (en) | 2011-09-11 | 2016-06-21 | Cree, Inc. | High current, low switching loss SiC power module |
US9644288B2 (en) | 2011-11-23 | 2017-05-09 | University Of South Carolina | Pretreatment method for reduction and/or elimination of basal plane dislocations close to epilayer/substrate interface in growth of SiC epitaxial films |
WO2013078219A1 (en) | 2011-11-23 | 2013-05-30 | University Of South Carolina | Method of growing high quality, thick sic epitaxial films by eliminating silicon gas phase nucleation and suppressing parasitic deposition |
JP5717674B2 (ja) | 2012-03-02 | 2015-05-13 | 株式会社東芝 | 半導体装置の製造方法 |
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US9797064B2 (en) | 2013-02-05 | 2017-10-24 | Dow Corning Corporation | Method for growing a SiC crystal by vapor deposition onto a seed crystal provided on a support shelf which permits thermal expansion |
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CN105140111A (zh) * | 2015-08-11 | 2015-12-09 | 中国科学院半导体研究所 | 消除碳化硅外延面穿通缺陷的方法 |
CN105244255B (zh) * | 2015-08-27 | 2019-03-05 | 中国电子科技集团公司第十三研究所 | 一种碳化硅外延材料及其生产方法 |
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JP7129889B2 (ja) * | 2018-11-09 | 2022-09-02 | 昭和電工株式会社 | SiCエピタキシャルウェハの製造方法 |
JPWO2021025085A1 (de) | 2019-08-06 | 2021-02-11 | ||
CN110767593A (zh) * | 2019-10-14 | 2020-02-07 | 芯盟科技有限公司 | 一种半导体结构及其形成方法 |
CN111005068A (zh) * | 2019-12-09 | 2020-04-14 | 中国电子科技集团公司第五十五研究所 | 一种生长高表面质量超厚igbt结构碳化硅外延材料的方法 |
JPWO2022153918A1 (de) * | 2021-01-15 | 2022-07-21 | ||
JP7294502B1 (ja) | 2022-06-03 | 2023-06-20 | 株式会社レゾナック | SiC単結晶基板 |
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US7018554B2 (en) * | 2003-09-22 | 2006-03-28 | Cree, Inc. | Method to reduce stacking fault nucleation sites and reduce forward voltage drift in bipolar devices |
-
2003
- 2003-09-22 US US10/605,312 patent/US7018554B2/en not_active Expired - Lifetime
-
2004
- 2004-09-14 CA CA002539618A patent/CA2539618A1/en not_active Abandoned
- 2004-09-14 WO PCT/US2004/030041 patent/WO2005034208A2/en active Application Filing
- 2004-09-14 AT AT04784035T patent/ATE457523T1/de not_active IP Right Cessation
- 2004-09-14 EP EP04784035A patent/EP1665343B1/de active Active
- 2004-09-14 JP JP2006528051A patent/JP4723500B2/ja active Active
- 2004-09-14 DE DE602004025479T patent/DE602004025479D1/de active Active
- 2004-09-14 CN CNB2004800274044A patent/CN100470725C/zh active Active
- 2004-09-22 TW TW093128733A patent/TW200525582A/zh unknown
-
2006
- 2006-03-27 US US11/389,825 patent/US7279115B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
CA2539618A1 (en) | 2005-04-14 |
EP1665343B1 (de) | 2010-02-10 |
JP4723500B2 (ja) | 2011-07-13 |
US7279115B1 (en) | 2007-10-09 |
TW200525582A (en) | 2005-08-01 |
WO2005034208A3 (en) | 2005-06-02 |
EP1665343A2 (de) | 2006-06-07 |
US20070221614A1 (en) | 2007-09-27 |
CN1856862A (zh) | 2006-11-01 |
US7018554B2 (en) | 2006-03-28 |
JP2007506289A (ja) | 2007-03-15 |
ATE457523T1 (de) | 2010-02-15 |
CN100470725C (zh) | 2009-03-18 |
US20050064723A1 (en) | 2005-03-24 |
WO2005034208A2 (en) | 2005-04-14 |
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