DE602004023200D1 - Halbleiterbauelement mit supergitter - Google Patents

Halbleiterbauelement mit supergitter

Info

Publication number
DE602004023200D1
DE602004023200D1 DE602004023200T DE602004023200T DE602004023200D1 DE 602004023200 D1 DE602004023200 D1 DE 602004023200D1 DE 602004023200 T DE602004023200 T DE 602004023200T DE 602004023200 T DE602004023200 T DE 602004023200T DE 602004023200 D1 DE602004023200 D1 DE 602004023200D1
Authority
DE
Germany
Prior art keywords
grille
super
semiconductor component
semiconductor
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004023200T
Other languages
English (en)
Inventor
Robert J Mears
Jean Augustin Yiptong
Marek Hytha
Scott A Kreps
Ilija Dukovski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mears Technologies Inc
Original Assignee
Mears Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/603,621 external-priority patent/US20040266116A1/en
Priority claimed from US10/603,696 external-priority patent/US20040262594A1/en
Application filed by Mears Technologies Inc filed Critical Mears Technologies Inc
Publication of DE602004023200D1 publication Critical patent/DE602004023200D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1054Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • H01L29/155Comprising only semiconductor materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
DE602004023200T 2003-06-26 2004-06-28 Halbleiterbauelement mit supergitter Active DE602004023200D1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US10/603,621 US20040266116A1 (en) 2003-06-26 2003-06-26 Methods of fabricating semiconductor structures having improved conductivity effective mass
US10/603,696 US20040262594A1 (en) 2003-06-26 2003-06-26 Semiconductor structures having improved conductivity effective mass and methods for fabricating same
US10/647,060 US6958486B2 (en) 2003-06-26 2003-08-22 Semiconductor device including band-engineered superlattice
PCT/US2004/020652 WO2005034245A1 (en) 2003-06-26 2004-06-28 Semiconductor device including band-engineered superlattice

Publications (1)

Publication Number Publication Date
DE602004023200D1 true DE602004023200D1 (de) 2009-10-29

Family

ID=33493657

Family Applications (4)

Application Number Title Priority Date Filing Date
DE602004025349T Active DE602004025349D1 (de) 2003-06-26 2004-06-28 Halbleiterbauelement mit bandlücken-angepasstem üb
DE602004023200T Active DE602004023200D1 (de) 2003-06-26 2004-06-28 Halbleiterbauelement mit supergitter
DE602004016855T Active DE602004016855D1 (de) 2003-06-26 2004-06-28 Verfahren zur herstellung eines halbleiterbauelements mit bandentworfenem supergitter
DE602004017472T Active DE602004017472D1 (de) 2003-06-26 2004-06-28 Halbleiterbauelement mit einem mosfet mit bandlücken-angepasstem übergitter

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE602004025349T Active DE602004025349D1 (de) 2003-06-26 2004-06-28 Halbleiterbauelement mit bandlücken-angepasstem üb

Family Applications After (2)

Application Number Title Priority Date Filing Date
DE602004016855T Active DE602004016855D1 (de) 2003-06-26 2004-06-28 Verfahren zur herstellung eines halbleiterbauelements mit bandentworfenem supergitter
DE602004017472T Active DE602004017472D1 (de) 2003-06-26 2004-06-28 Halbleiterbauelement mit einem mosfet mit bandlücken-angepasstem übergitter

Country Status (7)

Country Link
US (8) US6897472B2 (de)
EP (2) EP1644981B1 (de)
JP (5) JP4918355B2 (de)
AU (2) AU2004301905B2 (de)
CA (2) CA2530067C (de)
DE (4) DE602004025349D1 (de)
WO (2) WO2005034245A1 (de)

Families Citing this family (145)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6749687B1 (en) * 1998-01-09 2004-06-15 Asm America, Inc. In situ growth of oxide and silicon layers
US7531829B2 (en) 2003-06-26 2009-05-12 Mears Technologies, Inc. Semiconductor device including regions of band-engineered semiconductor superlattice to reduce device-on resistance
US20070010040A1 (en) * 2003-06-26 2007-01-11 Rj Mears, Llc Method for Making a Semiconductor Device Including a Strained Superlattice Layer Above a Stress Layer
US20060220118A1 (en) * 2003-06-26 2006-10-05 Rj Mears, Llc Semiconductor device including a dopant blocking superlattice
US7491587B2 (en) * 2003-06-26 2009-02-17 Mears Technologies, Inc. Method for making a semiconductor device having a semiconductor-on-insulator (SOI) configuration and including a superlattice on a thin semiconductor layer
US7045813B2 (en) * 2003-06-26 2006-05-16 Rj Mears, Llc Semiconductor device including a superlattice with regions defining a semiconductor junction
US20070020833A1 (en) * 2003-06-26 2007-01-25 Rj Mears, Llc Method for Making a Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer
US7535041B2 (en) 2003-06-26 2009-05-19 Mears Technologies, Inc. Method for making a semiconductor device including regions of band-engineered semiconductor superlattice to reduce device-on resistance
US20070020860A1 (en) * 2003-06-26 2007-01-25 Rj Mears, Llc Method for Making Semiconductor Device Including a Strained Superlattice and Overlying Stress Layer and Related Methods
US20070015344A1 (en) * 2003-06-26 2007-01-18 Rj Mears, Llc Method for Making a Semiconductor Device Including a Strained Superlattice Between at Least One Pair of Spaced Apart Stress Regions
US7045377B2 (en) * 2003-06-26 2006-05-16 Rj Mears, Llc Method for making a semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junction
US20050282330A1 (en) * 2003-06-26 2005-12-22 Rj Mears, Llc Method for making a semiconductor device including a superlattice having at least one group of substantially undoped layers
US7446002B2 (en) * 2003-06-26 2008-11-04 Mears Technologies, Inc. Method for making a semiconductor device comprising a superlattice dielectric interface layer
US20060289049A1 (en) * 2003-06-26 2006-12-28 Rj Mears, Llc Semiconductor Device Having a Semiconductor-on-Insulator (SOI) Configuration and Including a Superlattice on a Thin Semiconductor Layer
US7586165B2 (en) 2003-06-26 2009-09-08 Mears Technologies, Inc. Microelectromechanical systems (MEMS) device including a superlattice
US7612366B2 (en) * 2003-06-26 2009-11-03 Mears Technologies, Inc. Semiconductor device including a strained superlattice layer above a stress layer
US7514328B2 (en) 2003-06-26 2009-04-07 Mears Technologies, Inc. Method for making a semiconductor device including shallow trench isolation (STI) regions with a superlattice therebetween
US7531828B2 (en) * 2003-06-26 2009-05-12 Mears Technologies, Inc. Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions
US7227174B2 (en) * 2003-06-26 2007-06-05 Rj Mears, Llc Semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junction
US7659539B2 (en) * 2003-06-26 2010-02-09 Mears Technologies, Inc. Semiconductor device including a floating gate memory cell with a superlattice channel
US7598515B2 (en) * 2003-06-26 2009-10-06 Mears Technologies, Inc. Semiconductor device including a strained superlattice and overlying stress layer and related methods
JP4059183B2 (ja) * 2003-10-07 2008-03-12 ソニー株式会社 絶縁体薄膜の製造方法
US7268362B2 (en) * 2005-02-25 2007-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. High performance transistors with SiGe strain
US20060265803A1 (en) * 2005-05-25 2006-11-30 Gestion Ultra Internationale Inc. Hydromassaging bathing tub with adjustable elevated seat
CN101258100B (zh) * 2005-05-31 2012-01-04 梅尔斯科技公司 包括超晶格的微型机电系统(mems)器件及制造方法
EP1900021A1 (de) * 2005-06-20 2008-03-19 Mears Technologies, Inc. Halbleiterbauelement mit regionen der seichten grabenisolation (sti) mit einem supergitter dazwischen und assoziierte verfahren
WO2007005862A1 (en) * 2005-06-30 2007-01-11 Mears Technologies, Inc. Semiconductor device having a semiconductor-on-insulator (soi) configuration and including a superlattice on a thin semiconductor layer and associated methods
TW200709410A (en) * 2005-07-15 2007-03-01 Mears R J Llc Semiconductor device including a strained superlattice layer above a stress layer and associated methods
AU2006270126A1 (en) * 2005-07-15 2007-01-25 Mears Technologies, Inc. Semiconductor device including a channel with a non-semiconductor monolayer and associated methods
TW200746263A (en) * 2005-07-15 2007-12-16 Mears R J Llc Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions and associated methods
JP2009500871A (ja) * 2005-07-15 2009-01-08 メアーズ テクノロジーズ, インコーポレイテッド 歪み超格子とその上の応力層とを含む半導体デバイス、及びその製造方法
TW200725886A (en) * 2005-09-23 2007-07-01 Mears R J Llc Semiconductor device including regions of band-engineered simiconductor superlattice to reduce device-on resistance
TW200746237A (en) * 2005-12-22 2007-12-16 Mears R J Llc Method for making an electronic device including a poled superlattice having a net electrical dipole moment
WO2007098138A2 (en) * 2006-02-21 2007-08-30 Mears Technologies, Inc. Semiconductor device comprising a lattice matching layer and associated methods
US7625767B2 (en) 2006-03-17 2009-12-01 Mears Technologies, Inc. Methods of making spintronic devices with constrained spintronic dopant
US20080012004A1 (en) * 2006-03-17 2008-01-17 Mears Technologies, Inc. Spintronic devices with constrained spintronic dopant
US7901968B2 (en) * 2006-03-23 2011-03-08 Asm America, Inc. Heteroepitaxial deposition over an oxidized surface
EP2020035A1 (de) * 2006-05-01 2009-02-04 Mears Technologies, Inc. Halbleiterbauelement mit dotierungsblockierendem übergitter und entsprechende verfahren
JP2009536464A (ja) * 2006-05-05 2009-10-08 メアーズ テクノロジーズ, インコーポレイテッド 絶縁体上に半導体が存在する配置及び超格子を有する半導体素子並びに関連方法
AU2007247953A1 (en) * 2006-05-05 2007-11-15 Mears Technologies, Inc. Semiconductor device including a floating gate memory cell with a superlattice channel and associated methods
US7777290B2 (en) * 2006-06-13 2010-08-17 Wisconsin Alumni Research Foundation PIN diodes for photodetection and high-speed, high-resolution image sensing
US7928425B2 (en) * 2007-01-25 2011-04-19 Mears Technologies, Inc. Semiconductor device including a metal-to-semiconductor superlattice interface layer and related methods
US7880161B2 (en) * 2007-02-16 2011-02-01 Mears Technologies, Inc. Multiple-wavelength opto-electronic device including a superlattice
US7812370B2 (en) * 2007-07-25 2010-10-12 Taiwan Semiconductor Manufacturing Company, Ltd. Tunnel field-effect transistor with narrow band-gap channel and strong gate coupling
TWI348766B (en) * 2007-10-04 2011-09-11 Taiwan Tft Lcd Ass Method of fabricating thin film transistor
JP5156419B2 (ja) * 2008-02-05 2013-03-06 日本電信電話株式会社 半導体素子
US7834345B2 (en) * 2008-09-05 2010-11-16 Taiwan Semiconductor Manufacturing Company, Ltd. Tunnel field-effect transistors with superlattice channels
US8587075B2 (en) * 2008-11-18 2013-11-19 Taiwan Semiconductor Manufacturing Company, Ltd. Tunnel field-effect transistor with metal source
WO2011112574A1 (en) 2010-03-08 2011-09-15 Mears Technologies, Inc Semiconductor device including a superlattice and dopant diffusion retarding implants and related methods
US9127345B2 (en) 2012-03-06 2015-09-08 Asm America, Inc. Methods for depositing an epitaxial silicon germanium layer having a germanium to silicon ratio greater than 1:1 using silylgermane and a diluent
US9171715B2 (en) 2012-09-05 2015-10-27 Asm Ip Holding B.V. Atomic layer deposition of GeO2
US9196769B2 (en) 2013-06-25 2015-11-24 L-3 Communications Cincinnati Electronics Corporation Superlattice structures and infrared detector devices incorporating the same
US9337210B2 (en) 2013-08-12 2016-05-10 Micron Technology, Inc. Vertical ferroelectric field effect transistor constructions, constructions comprising a pair of vertical ferroelectric field effect transistors, vertical strings of ferroelectric field effect transistors, and vertical strings of laterally opposing pairs of vertical ferroelectric field effect transistors
US9406753B2 (en) 2013-11-22 2016-08-02 Atomera Incorporated Semiconductor devices including superlattice depletion layer stack and related methods
EP3072158A1 (de) 2013-11-22 2016-09-28 Atomera Incorporated Vertikale halbleiterbauelemente mit einer übergitter-durchstanz-stoppschicht und zugehörige verfahren
US9218963B2 (en) 2013-12-19 2015-12-22 Asm Ip Holding B.V. Cyclical deposition of germanium
US9276134B2 (en) 2014-01-10 2016-03-01 Micron Technology, Inc. Field effect transistor constructions and memory arrays
US9263577B2 (en) 2014-04-24 2016-02-16 Micron Technology, Inc. Ferroelectric field effect transistors, pluralities of ferroelectric field effect transistors arrayed in row lines and column lines, and methods of forming a plurality of ferroelectric field effect transistors
US9716147B2 (en) 2014-06-09 2017-07-25 Atomera Incorporated Semiconductor devices with enhanced deterministic doping and related methods
US9472560B2 (en) 2014-06-16 2016-10-18 Micron Technology, Inc. Memory cell and an array of memory cells
US9159829B1 (en) 2014-10-07 2015-10-13 Micron Technology, Inc. Recessed transistors containing ferroelectric material
US9722046B2 (en) 2014-11-25 2017-08-01 Atomera Incorporated Semiconductor device including a superlattice and replacement metal gate structure and related methods
US9305929B1 (en) 2015-02-17 2016-04-05 Micron Technology, Inc. Memory cells
WO2016187038A1 (en) * 2015-05-15 2016-11-24 Atomera Incorporated Semiconductor devices with superlattice and punch-through stop (pts) layers at different depths and related methods
US9721790B2 (en) 2015-06-02 2017-08-01 Atomera Incorporated Method for making enhanced semiconductor structures in single wafer processing chamber with desired uniformity control
US10134982B2 (en) 2015-07-24 2018-11-20 Micron Technology, Inc. Array of cross point memory cells
US9853211B2 (en) 2015-07-24 2017-12-26 Micron Technology, Inc. Array of cross point memory cells individually comprising a select device and a programmable device
US10918747B2 (en) 2015-07-30 2021-02-16 Vital Vio, Inc. Disinfecting lighting device
US10357582B1 (en) 2015-07-30 2019-07-23 Vital Vio, Inc. Disinfecting lighting device
CA2993825C (en) 2015-07-30 2020-08-25 Vital Vio, Inc. Single diode disinfection
US10026751B2 (en) * 2015-10-02 2018-07-17 Samsung Electronics Co., Ltd. Semiconductor device including a repeater/buffer at higher metal routing layers and methods of manufacturing the same
US9558939B1 (en) 2016-01-15 2017-01-31 Atomera Incorporated Methods for making a semiconductor device including atomic layer structures using N2O as an oxygen source
DE102016001387A1 (de) * 2016-02-09 2017-08-10 Azur Space Solar Power Gmbh Empfängerbaustein
WO2017197108A1 (en) 2016-05-11 2017-11-16 Atomera Incorporated Dram architecture to reduce row activation circuitry power and peripheral leakage and related methods
US10453945B2 (en) 2016-08-08 2019-10-22 Atomera Incorporated Semiconductor device including resonant tunneling diode structure having a superlattice
US10191105B2 (en) 2016-08-17 2019-01-29 Atomera Incorporated Method for making a semiconductor device including threshold voltage measurement circuitry
US10854591B2 (en) 2016-11-04 2020-12-01 Samsung Electronics Co., Ltd. Semiconductor device including a repeater/buffer at upper metal routing layers and methods of manufacturing the same
US10396145B2 (en) 2017-01-12 2019-08-27 Micron Technology, Inc. Memory cells comprising ferroelectric material and including current leakage paths having different total resistances
CN110832641B (zh) 2017-05-16 2023-05-30 阿托梅拉公司 包括作为吸收层的超晶格的半导体装置和方法
TWI685109B (zh) 2017-06-13 2020-02-11 美商安托梅拉公司 具有含超晶格之凹槽通道陣列電晶體(rcat)之半導體元件及其相關方法
US10109479B1 (en) 2017-07-31 2018-10-23 Atomera Incorporated Method of making a semiconductor device with a buried insulating layer formed by annealing a superlattice
WO2019036572A1 (en) 2017-08-18 2019-02-21 Atomera Incorporated SEMICONDUCTOR DEVICE AND METHOD COMPRISING NON-MONOCRYSTALLINE OCCLUSIONS ADJACENT TO AN ITS SUPER-NETWORK INTERFACE
US10835627B2 (en) 2017-12-01 2020-11-17 Vital Vio, Inc. Devices using flexible light emitting layer for creating disinfecting illuminated surface, and related method
US10309614B1 (en) 2017-12-05 2019-06-04 Vital Vivo, Inc. Light directing element
US10276625B1 (en) 2017-12-15 2019-04-30 Atomera Incorporated CMOS image sensor including superlattice to enhance infrared light absorption
CN111542925B (zh) * 2017-12-15 2023-11-03 阿托梅拉公司 包括堆叠的半导体芯片的cmos图像传感器和包括超晶格的读出电路系统及相关方法
US10396223B2 (en) 2017-12-15 2019-08-27 Atomera Incorporated Method for making CMOS image sensor with buried superlattice layer to reduce crosstalk
US10367028B2 (en) 2017-12-15 2019-07-30 Atomera Incorporated CMOS image sensor including stacked semiconductor chips and image processing circuitry including a superlattice
US10608027B2 (en) 2017-12-15 2020-03-31 Atomera Incorporated Method for making CMOS image sensor including stacked semiconductor chips and image processing circuitry including a superlattice
US10529768B2 (en) 2017-12-15 2020-01-07 Atomera Incorporated Method for making CMOS image sensor including pixels with read circuitry having a superlattice
US10461118B2 (en) 2017-12-15 2019-10-29 Atomera Incorporated Method for making CMOS image sensor including photodiodes with overlying superlattices to reduce crosstalk
US10608043B2 (en) 2017-12-15 2020-03-31 Atomera Incorporation Method for making CMOS image sensor including stacked semiconductor chips and readout circuitry including a superlattice
US10355151B2 (en) 2017-12-15 2019-07-16 Atomera Incorporated CMOS image sensor including photodiodes with overlying superlattices to reduce crosstalk
US10304881B1 (en) 2017-12-15 2019-05-28 Atomera Incorporated CMOS image sensor with buried superlattice layer to reduce crosstalk
US10361243B2 (en) 2017-12-15 2019-07-23 Atomera Incorporated Method for making CMOS image sensor including superlattice to enhance infrared light absorption
US10615209B2 (en) 2017-12-15 2020-04-07 Atomera Incorporated CMOS image sensor including stacked semiconductor chips and readout circuitry including a superlattice
US10529757B2 (en) 2017-12-15 2020-01-07 Atomera Incorporated CMOS image sensor including pixels with read circuitry having a superlattice
EP3762959B1 (de) 2018-03-08 2024-04-10 Atomera Incorporated Halbleiterbauelement mit verbesserten kontaktstrukturen mit einem übergitter und zugehörige verfahren
US10468245B2 (en) 2018-03-09 2019-11-05 Atomera Incorporated Semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlattice
US10727049B2 (en) 2018-03-09 2020-07-28 Atomera Incorporated Method for making a semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlattice
US10413626B1 (en) 2018-03-29 2019-09-17 Vital Vio, Inc. Multiple light emitter for inactivating microorganisms
US10884185B2 (en) 2018-04-12 2021-01-05 Atomera Incorporated Semiconductor device including vertically integrated optical and electronic devices and comprising a superlattice
US10763370B2 (en) 2018-04-12 2020-09-01 Atomera Incorporated Inverted T channel field effect transistor (ITFET) including a superlattice
US10811498B2 (en) 2018-08-30 2020-10-20 Atomera Incorporated Method for making superlattice structures with reduced defect densities
US10566191B1 (en) 2018-08-30 2020-02-18 Atomera Incorporated Semiconductor device including superlattice structures with reduced defect densities
US10580866B1 (en) 2018-11-16 2020-03-03 Atomera Incorporated Semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance
US10854717B2 (en) 2018-11-16 2020-12-01 Atomera Incorporated Method for making a FINFET including source and drain dopant diffusion blocking superlattices to reduce contact resistance
US10840337B2 (en) 2018-11-16 2020-11-17 Atomera Incorporated Method for making a FINFET having reduced contact resistance
US10840335B2 (en) 2018-11-16 2020-11-17 Atomera Incorporated Method for making semiconductor device including body contact dopant diffusion blocking superlattice to reduce contact resistance
US10847618B2 (en) 2018-11-16 2020-11-24 Atomera Incorporated Semiconductor device including body contact dopant diffusion blocking superlattice having reduced contact resistance
US10840336B2 (en) 2018-11-16 2020-11-17 Atomera Incorporated Semiconductor device with metal-semiconductor contacts including oxygen insertion layer to constrain dopants and related methods
US10580867B1 (en) 2018-11-16 2020-03-03 Atomera Incorporated FINFET including source and drain regions with dopant diffusion blocking superlattice layers to reduce contact resistance
US10593761B1 (en) 2018-11-16 2020-03-17 Atomera Incorporated Method for making a semiconductor device having reduced contact resistance
US10818755B2 (en) 2018-11-16 2020-10-27 Atomera Incorporated Method for making semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance
US11639897B2 (en) 2019-03-29 2023-05-02 Vyv, Inc. Contamination load sensing device
US11094818B2 (en) 2019-04-23 2021-08-17 Atomera Incorporated Method for making a semiconductor device including a superlattice and an asymmetric channel and related methods
US11541135B2 (en) 2019-06-28 2023-01-03 Vyv, Inc. Multiple band visible light disinfection
US11170834B2 (en) 2019-07-10 2021-11-09 Micron Technology, Inc. Memory cells and methods of forming a capacitor including current leakage paths having different total resistances
US10937888B2 (en) 2019-07-17 2021-03-02 Atomera Incorporated Method for making a varactor with a hyper-abrupt junction region including spaced-apart superlattices
US10879357B1 (en) 2019-07-17 2020-12-29 Atomera Incorporated Method for making a semiconductor device having a hyper-abrupt junction region including a superlattice
US10825901B1 (en) 2019-07-17 2020-11-03 Atomera Incorporated Semiconductor devices including hyper-abrupt junction region including a superlattice
US10840388B1 (en) 2019-07-17 2020-11-17 Atomera Incorporated Varactor with hyper-abrupt junction region including a superlattice
US10937868B2 (en) 2019-07-17 2021-03-02 Atomera Incorporated Method for making semiconductor devices with hyper-abrupt junction region including spaced-apart superlattices
US10825902B1 (en) 2019-07-17 2020-11-03 Atomera Incorporated Varactor with hyper-abrupt junction region including spaced-apart superlattices
US11183565B2 (en) 2019-07-17 2021-11-23 Atomera Incorporated Semiconductor devices including hyper-abrupt junction region including spaced-apart superlattices and related methods
US10868120B1 (en) 2019-07-17 2020-12-15 Atomera Incorporated Method for making a varactor with hyper-abrupt junction region including a superlattice
US11369704B2 (en) 2019-08-15 2022-06-28 Vyv, Inc. Devices configured to disinfect interiors
US11878084B2 (en) 2019-09-20 2024-01-23 Vyv, Inc. Disinfecting light emitting subcomponent
US11437487B2 (en) 2020-01-14 2022-09-06 Atomera Incorporated Bipolar junction transistors including emitter-base and base-collector superlattices
US11177351B2 (en) 2020-02-26 2021-11-16 Atomera Incorporated Semiconductor device including a superlattice with different non-semiconductor material monolayers
US11302823B2 (en) 2020-02-26 2022-04-12 Atomera Incorporated Method for making semiconductor device including a superlattice with different non-semiconductor material monolayers
TWI760113B (zh) * 2020-02-26 2022-04-01 美商安托梅拉公司 包含具有不同非半導體材料單層的超晶格之半導體元件及其相關方法
US11075078B1 (en) 2020-03-06 2021-07-27 Atomera Incorporated Method for making a semiconductor device including a superlattice within a recessed etch
US11569368B2 (en) 2020-06-11 2023-01-31 Atomera Incorporated Method for making semiconductor device including a superlattice and providing reduced gate leakage
US11469302B2 (en) 2020-06-11 2022-10-11 Atomera Incorporated Semiconductor device including a superlattice and providing reduced gate leakage
US11837634B2 (en) 2020-07-02 2023-12-05 Atomera Incorporated Semiconductor device including superlattice with oxygen and carbon monolayers
US11804531B2 (en) 2020-07-23 2023-10-31 Taiwan Semiconductor Manufacturing Co., Ltd. Thin film transfer using substrate with etch stop layer and diffusion barrier layer
EP4295409A1 (de) 2021-03-03 2023-12-27 Atomera Incorporated Hochfrequenz (hf)-halbleiterbauelemente mit einer masseflächenschicht mit einem übergitter und zugehörige verfahren
US11923418B2 (en) 2021-04-21 2024-03-05 Atomera Incorporated Semiconductor device including a superlattice and enriched silicon 28 epitaxial layer
US11810784B2 (en) 2021-04-21 2023-11-07 Atomera Incorporated Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer
US11728385B2 (en) 2021-05-26 2023-08-15 Atomera Incorporated Semiconductor device including superlattice with O18 enriched monolayers
US11682712B2 (en) 2021-05-26 2023-06-20 Atomera Incorporated Method for making semiconductor device including superlattice with O18 enriched monolayers
US11631584B1 (en) 2021-10-28 2023-04-18 Atomera Incorporated Method for making semiconductor device with selective etching of superlattice to define etch stop layer
US11721546B2 (en) 2021-10-28 2023-08-08 Atomera Incorporated Method for making semiconductor device with selective etching of superlattice to accumulate non-semiconductor atoms
US20230363150A1 (en) 2022-05-04 2023-11-09 Atomera Incorporated Dram sense amplifier architecture with reduced power consumption and related methods

Family Cites Families (67)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US34529A (en) * 1862-02-25 Improvement in oil-cans
US505887A (en) * 1893-10-03 Drawing-rolls
US4485128A (en) 1981-11-20 1984-11-27 Chronar Corporation Bandgap control in amorphous semiconductors
JPH0656887B2 (ja) 1982-02-03 1994-07-27 株式会社日立製作所 半導体装置およびその製法
US4594603A (en) 1982-04-22 1986-06-10 Board Of Trustees Of The University Of Illinois Semiconductor device with disordered active region
JPS6127681A (ja) 1984-07-17 1986-02-07 Res Dev Corp Of Japan 超格子構造のチヤネル部をもつ電界効果トランジスタ
US4882609A (en) 1984-11-19 1989-11-21 Max-Planck Gesellschaft Zur Forderung Der Wissenschafter E.V. Semiconductor devices with at least one monoatomic layer of doping atoms
JPS61145820A (ja) 1984-12-20 1986-07-03 Seiko Epson Corp 半導体薄膜材料
JPS61210679A (ja) 1985-03-15 1986-09-18 Sony Corp 半導体装置
JPS61220339A (ja) 1985-03-26 1986-09-30 Nippon Telegr & Teleph Corp <Ntt> 半導体材料特性の制御方法
EP0214047B1 (de) * 1985-08-20 1993-12-22 Fujitsu Limited Feldeffekttransistor
JPH06101559B2 (ja) * 1985-10-04 1994-12-12 日本電信電話株式会社 超格子電子素子
JPS62219665A (ja) 1986-03-20 1987-09-26 Fujitsu Ltd 超格子薄膜トランジスタ
JPS62256478A (ja) * 1986-04-30 1987-11-09 Sumitomo Electric Ind Ltd 化合物半導体装置
JPS6394682A (ja) * 1986-10-08 1988-04-25 Semiconductor Energy Lab Co Ltd 絶縁ゲイト型電界効果半導体装置
JP2709374B2 (ja) * 1986-10-08 1998-02-04 株式会社 半導体エネルギー研究所 絶縁ゲイト型電界効果半導体装置
US4908678A (en) 1986-10-08 1990-03-13 Semiconductor Energy Laboratory Co., Ltd. FET with a super lattice channel
US5005887A (en) * 1990-04-09 1991-04-09 Davidson Textron Inc. Energy absorbing bumper fastener system
US5081513A (en) 1991-02-28 1992-01-14 Xerox Corporation Electronic device with recovery layer proximate to active layer
US5270247A (en) * 1991-07-12 1993-12-14 Fujitsu Limited Atomic layer epitaxy of compound semiconductor
US5216262A (en) 1992-03-02 1993-06-01 Raphael Tsu Quantum well structures useful for semiconductor devices
JPH0643482A (ja) * 1992-07-24 1994-02-18 Matsushita Electric Ind Co Ltd 空間光変調素子およびその製造方法
US5357119A (en) 1993-02-19 1994-10-18 Board Of Regents Of The University Of California Field effect devices having short period superlattice structures using Si and Ge
US5606177A (en) 1993-10-29 1997-02-25 Texas Instruments Incorporated Silicon oxide resonant tunneling diode structure
US5796119A (en) * 1993-10-29 1998-08-18 Texas Instruments Incorporated Silicon resonant tunneling
US5466949A (en) 1994-08-04 1995-11-14 Texas Instruments Incorporated Silicon oxide germanium resonant tunneling
US5627386A (en) 1994-08-11 1997-05-06 The United States Of America As Represented By The Secretary Of The Army Silicon nanostructure light-emitting diode
US5561302A (en) 1994-09-26 1996-10-01 Motorola, Inc. Enhanced mobility MOSFET device and method
US5577061A (en) * 1994-12-16 1996-11-19 Hughes Aircraft Company Superlattice cladding layers for mid-infrared lasers
FR2734097B1 (fr) 1995-05-12 1997-06-06 Thomson Csf Laser a semiconducteurs
US6326650B1 (en) 1995-08-03 2001-12-04 Jeremy Allam Method of forming a semiconductor structure
JP3529938B2 (ja) * 1996-04-19 2004-05-24 富士通株式会社 半導体集積回路装置及び半導体装置の製造方法
US6344271B1 (en) 1998-11-06 2002-02-05 Nanoenergy Corporation Materials and products using nanostructured non-stoichiometric substances
EP0843361A1 (de) 1996-11-15 1998-05-20 Hitachi Europe Limited Speicheranordnung
JPH10173177A (ja) 1996-12-10 1998-06-26 Mitsubishi Electric Corp Misトランジスタの製造方法
US6058127A (en) 1996-12-13 2000-05-02 Massachusetts Institute Of Technology Tunable microcavity and method of using nonlinear materials in a photonic crystal
US5994164A (en) 1997-03-18 1999-11-30 The Penn State Research Foundation Nanostructure tailoring of material properties using controlled crystallization
US6255150B1 (en) 1997-10-23 2001-07-03 Texas Instruments Incorporated Use of crystalline SiOx barriers for Si-based resonant tunneling diodes
US6376337B1 (en) 1997-11-10 2002-04-23 Nanodynamics, Inc. Epitaxial SiOx barrier/insulation layer
JP3443343B2 (ja) 1997-12-03 2003-09-02 松下電器産業株式会社 半導体装置
JP3547037B2 (ja) 1997-12-04 2004-07-28 株式会社リコー 半導体積層構造及び半導体発光素子
US6154475A (en) * 1997-12-04 2000-11-28 The United States Of America As Represented By The Secretary Of The Air Force Silicon-based strain-symmetrized GE-SI quantum lasers
US6608327B1 (en) 1998-02-27 2003-08-19 North Carolina State University Gallium nitride semiconductor structure including laterally offset patterned layers
JP3854731B2 (ja) 1998-03-30 2006-12-06 シャープ株式会社 微細構造の製造方法
US6888175B1 (en) 1998-05-29 2005-05-03 Massachusetts Institute Of Technology Compound semiconductor structure with lattice and polarity matched heteroepitaxial layers
RU2142665C1 (ru) * 1998-08-10 1999-12-10 Швейкин Василий Иванович Инжекционный лазер
US6586835B1 (en) 1998-08-31 2003-07-01 Micron Technology, Inc. Compact system module with built-in thermoelectric cooling
DE60042666D1 (de) 1999-01-14 2009-09-17 Panasonic Corp Halbleiterbauelement und Verfahren zu dessen Herstellung
EP1168539B1 (de) * 1999-03-04 2009-12-16 Nichia Corporation Nitridhalbleiterlaserelement
GB9905196D0 (en) 1999-03-05 1999-04-28 Fujitsu Telecommunications Eur Aperiodic gratings
US6350993B1 (en) 1999-03-12 2002-02-26 International Business Machines Corporation High speed composite p-channel Si/SiGe heterostructure for field effect devices
US6281532B1 (en) 1999-06-28 2001-08-28 Intel Corporation Technique to obtain increased channel mobilities in NMOS transistors by gate electrode engineering
US6570898B2 (en) 1999-09-29 2003-05-27 Xerox Corporation Structure and method for index-guided buried heterostructure AlGalnN laser diodes
US7225393B2 (en) * 1999-10-01 2007-05-29 Matsushita Electric Industrial Co., Ltd. Viterbi decoder and Viterbi decoding method
US6501092B1 (en) 1999-10-25 2002-12-31 Intel Corporation Integrated semiconductor superlattice optical modulator
RU2173003C2 (ru) 1999-11-25 2001-08-27 Септре Электроникс Лимитед Способ образования кремниевой наноструктуры, решетки кремниевых квантовых проводков и основанных на них устройств
US6562678B1 (en) * 2000-03-07 2003-05-13 Symetrix Corporation Chemical vapor deposition process for fabricating layered superlattice materials
US6582972B1 (en) * 2000-04-07 2003-06-24 Symetrix Corporation Low temperature oxidizing method of making a layered superlattice material
DE10025264A1 (de) 2000-05-22 2001-11-29 Max Planck Gesellschaft Feldeffekt-Transistor auf der Basis von eingebetteten Clusterstrukturen und Verfahren zu seiner Herstellung
US7301199B2 (en) 2000-08-22 2007-11-27 President And Fellows Of Harvard College Nanoscale wires and related devices
TW459394B (en) * 2000-11-02 2001-10-11 Integrated Crystal Technology Superlattice infrared photodetector
US6521549B1 (en) 2000-11-28 2003-02-18 Lsi Logic Corporation Method of reducing silicon oxynitride gate insulator thickness in some transistors of a hybrid integrated circuit to obtain increased differential in gate insulator thickness with other transistors of the hybrid circuit
US20020100942A1 (en) 2000-12-04 2002-08-01 Fitzgerald Eugene A. CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs
US6559471B2 (en) * 2000-12-08 2003-05-06 Motorola, Inc. Quantum well infrared photodetector and method for fabricating same
AU2002349881A1 (en) 2001-09-21 2003-04-01 Amberwave Systems Corporation Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
WO2003079415A2 (en) 2002-03-14 2003-09-25 Amberwave Systems Corporation Methods for fabricating strained layers on semiconductor substrates
US7023010B2 (en) * 2003-04-21 2006-04-04 Nanodynamics, Inc. Si/C superlattice useful for semiconductor devices

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