DE602004012235D1 - Halbleiterbauelement, halbleiterkörper und verfahren zu seiner herstellung - Google Patents

Halbleiterbauelement, halbleiterkörper und verfahren zu seiner herstellung

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Publication number
DE602004012235D1
DE602004012235D1 DE602004012235T DE602004012235T DE602004012235D1 DE 602004012235 D1 DE602004012235 D1 DE 602004012235D1 DE 602004012235 T DE602004012235 T DE 602004012235T DE 602004012235 T DE602004012235 T DE 602004012235T DE 602004012235 D1 DE602004012235 D1 DE 602004012235D1
Authority
DE
Germany
Prior art keywords
connection
semiconductor body
semiconductor
connection regions
regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004012235T
Other languages
English (en)
Other versions
DE602004012235T2 (de
Inventor
Ouden Josephus A Den
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seong Capital Ltd Us LLC
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Publication of DE602004012235D1 publication Critical patent/DE602004012235D1/de
Application granted granted Critical
Publication of DE602004012235T2 publication Critical patent/DE602004012235T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H01L23/495—Lead-frames or other flat leads
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    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
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DE602004012235T 2003-03-07 2004-02-27 Halbleiterbauelement, halbleiterkörper und verfahren zu seiner herstellung Expired - Lifetime DE602004012235T2 (de)

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US9175400B2 (en) * 2009-10-28 2015-11-03 Enthone Inc. Immersion tin silver plating in electronics manufacture
TWI411051B (zh) * 2009-12-02 2013-10-01 Mstar Semiconductor Inc 封裝層疊方法與結構及其電路板系統

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JPS5498580A (en) * 1978-01-20 1979-08-03 Nec Corp Field effect transistor
JPS57211771A (en) * 1981-06-23 1982-12-25 Nec Corp Semiconductor element
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JP3599813B2 (ja) * 1995-03-15 2004-12-08 三洋電機株式会社 半導体装置
EP0904602B1 (de) * 1996-06-14 2002-01-30 Infineon Technologies AG Verfahren zur herstellung eines trägerelements für halbleiterchips
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TW200501383A (en) 2005-01-01
JP2006520102A (ja) 2006-08-31
ATE388488T1 (de) 2008-03-15
US7196409B2 (en) 2007-03-27
WO2004079822A1 (en) 2004-09-16
CN100401510C (zh) 2008-07-09
CN1757110A (zh) 2006-04-05
US20060202327A1 (en) 2006-09-14
EP1604401A1 (de) 2005-12-14
EP1604401B1 (de) 2008-03-05
DE602004012235T2 (de) 2009-03-19

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