DE60023404D1 - Magnetische Direktzugriffsspeicheranordnung - Google Patents

Magnetische Direktzugriffsspeicheranordnung

Info

Publication number
DE60023404D1
DE60023404D1 DE60023404T DE60023404T DE60023404D1 DE 60023404 D1 DE60023404 D1 DE 60023404D1 DE 60023404 T DE60023404 T DE 60023404T DE 60023404 T DE60023404 T DE 60023404T DE 60023404 D1 DE60023404 D1 DE 60023404D1
Authority
DE
Germany
Prior art keywords
memory device
random access
access memory
magnetic random
magnetic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60023404T
Other languages
English (en)
Other versions
DE60023404T2 (de
Inventor
James A Brug
Manoj K Bhattacharyya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of DE60023404D1 publication Critical patent/DE60023404D1/de
Application granted granted Critical
Publication of DE60023404T2 publication Critical patent/DE60023404T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1675Writing or programming circuits or methods
DE60023404T 1999-07-28 2000-07-27 Magnetische Direktzugriffsspeicheranordnung Expired - Lifetime DE60023404T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/363,082 US6097626A (en) 1999-07-28 1999-07-28 MRAM device using magnetic field bias to suppress inadvertent switching of half-selected memory cells

Publications (2)

Publication Number Publication Date
DE60023404D1 true DE60023404D1 (de) 2005-12-01
DE60023404T2 DE60023404T2 (de) 2006-06-14

Family

ID=23428714

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60023404T Expired - Lifetime DE60023404T2 (de) 1999-07-28 2000-07-27 Magnetische Direktzugriffsspeicheranordnung

Country Status (4)

Country Link
US (1) US6097626A (de)
EP (1) EP1073062B1 (de)
JP (1) JP4469067B2 (de)
DE (1) DE60023404T2 (de)

Families Citing this family (44)

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US6259644B1 (en) * 1997-11-20 2001-07-10 Hewlett-Packard Co Equipotential sense methods for resistive cross point memory cell arrays
US6611405B1 (en) * 1999-09-16 2003-08-26 Kabushiki Kaisha Toshiba Magnetoresistive element and magnetic memory device
US6236611B1 (en) * 1999-12-20 2001-05-22 Motorola, Inc. Peak program current reduction apparatus and method
US6215707B1 (en) * 2000-04-10 2001-04-10 Motorola Inc. Charge conserving write method and system for an MRAM
DE10032278C1 (de) * 2000-07-03 2001-11-29 Infineon Technologies Ag Verfahren zur Verhinderung von Elektromigration in einem MRAM
JP2002170377A (ja) * 2000-09-22 2002-06-14 Mitsubishi Electric Corp 薄膜磁性体記憶装置
US7035138B2 (en) * 2000-09-27 2006-04-25 Canon Kabushiki Kaisha Magnetic random access memory having perpendicular magnetic films switched by magnetic fields from a plurality of directions
US6314020B1 (en) * 2000-09-29 2001-11-06 Motorola, Inc. Analog functional module using magnetoresistive memory technology
DE10053965A1 (de) * 2000-10-31 2002-06-20 Infineon Technologies Ag Verfahren zur Verhinderung unerwünschter Programmierungen in einer MRAM-Anordnung
DE10102351B4 (de) * 2001-01-19 2007-08-02 Infineon Technologies Ag Integrierter Speicher
US6618295B2 (en) * 2001-03-21 2003-09-09 Matrix Semiconductor, Inc. Method and apparatus for biasing selected and unselected array lines when writing a memory array
US6538920B2 (en) 2001-04-02 2003-03-25 Manish Sharma Cladded read conductor for a pinned-on-the-fly soft reference layer
US6404674B1 (en) 2001-04-02 2002-06-11 Hewlett Packard Company Intellectual Property Administrator Cladded read-write conductor for a pinned-on-the-fly soft reference layer
DE10123593C2 (de) * 2001-05-15 2003-03-27 Infineon Technologies Ag Magnetische Speicheranordnung
US6466471B1 (en) 2001-05-29 2002-10-15 Hewlett-Packard Company Low power MRAM memory array
US6510080B1 (en) * 2001-08-28 2003-01-21 Micron Technology Inc. Three terminal magnetic random access memory
US6570783B1 (en) 2001-11-15 2003-05-27 Micron Technology, Inc. Asymmetric MRAM cell and bit design for improving bit yield
US6781578B2 (en) * 2002-01-02 2004-08-24 Hewlett-Packard Development Company, L.P. Stylus based input devices utilizing a magnetic random access momory array
US6798404B2 (en) * 2002-01-02 2004-09-28 Hewlett-Packard Development Company, L.P. Integrated digitizing tablet and display apparatus and method of operation
US6646910B2 (en) 2002-03-04 2003-11-11 Hewlett-Packard Development Company, L.P. Magnetic memory using reverse magnetic field to improve half-select margin
US6724652B2 (en) * 2002-05-02 2004-04-20 Micron Technology, Inc. Low remanence flux concentrator for MRAM devices
JP3808799B2 (ja) * 2002-05-15 2006-08-16 株式会社東芝 磁気ランダムアクセスメモリ
US6781910B2 (en) * 2002-05-17 2004-08-24 Hewlett-Packard Development Company, L.P. Small area magnetic memory devices
JP3808802B2 (ja) * 2002-06-20 2006-08-16 株式会社東芝 磁気ランダムアクセスメモリ
JP4208500B2 (ja) * 2002-06-27 2009-01-14 株式会社ルネサステクノロジ 薄膜磁性体記憶装置
US6882553B2 (en) * 2002-08-08 2005-04-19 Micron Technology Inc. Stacked columnar resistive memory structure and its method of formation and operation
US7209378B2 (en) 2002-08-08 2007-04-24 Micron Technology, Inc. Columnar 1T-N memory cell structure
US6809958B2 (en) 2002-09-13 2004-10-26 Hewlett-Packard Development Company, L.P. MRAM parallel conductor orientation for improved write performance
US6806127B2 (en) 2002-12-03 2004-10-19 Freescale Semiconductor, Inc. Method and structure for contacting an overlying electrode for a magnetoelectronics element
US6888743B2 (en) * 2002-12-27 2005-05-03 Freescale Semiconductor, Inc. MRAM architecture
US6909631B2 (en) * 2003-10-02 2005-06-21 Freescale Semiconductor, Inc. MRAM and methods for reading the MRAM
US7173846B2 (en) * 2003-02-13 2007-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Magnetic RAM and array architecture using a two transistor, one MTJ cell
US7002228B2 (en) * 2003-02-18 2006-02-21 Micron Technology, Inc. Diffusion barrier for improving the thermal stability of MRAM devices
JP3908685B2 (ja) * 2003-04-04 2007-04-25 株式会社東芝 磁気ランダムアクセスメモリおよびその書き込み方法
US6813181B1 (en) * 2003-05-27 2004-11-02 Infineon Technologies Ag Circuit configuration for a current switch of a bit/word line of a MRAM device
US6859388B1 (en) 2003-09-05 2005-02-22 Freescale Semiconductor, Inc. Circuit for write field disturbance cancellation in an MRAM and method of operation
US7177183B2 (en) 2003-09-30 2007-02-13 Sandisk 3D Llc Multiple twin cell non-volatile memory array and logic block structure and method therefor
ATE361529T1 (de) * 2003-11-24 2007-05-15 Koninkl Philips Electronics Nv Verfahren und einrichtung zur durchführung einer aktiven feldkompensation während der programmierung eines magnetoresistiven speicherbausteins
US7072209B2 (en) * 2003-12-29 2006-07-04 Micron Technology, Inc. Magnetic memory having synthetic antiferromagnetic pinned layer
JP4819316B2 (ja) * 2004-02-23 2011-11-24 ルネサスエレクトロニクス株式会社 半導体装置
US7532203B2 (en) * 2004-04-26 2009-05-12 Samsung Electronic Co., Ltd. Data input device that utilizes a layer of magnetic particles to store non-volatile input data that is magnetically coupled to an underlying MRAM array
US7285836B2 (en) * 2005-03-09 2007-10-23 Maglabs, Inc. Magnetic random access memory with stacked memory cells having oppositely-directed hard-axis biasing
US7508702B2 (en) * 2007-04-17 2009-03-24 Macronix International Co., Ltd. Programming method of magnetic random access memory
US7852662B2 (en) 2007-04-24 2010-12-14 Magic Technologies, Inc. Spin-torque MRAM: spin-RAM, array

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5654566A (en) * 1995-04-21 1997-08-05 Johnson; Mark B. Magnetic spin injected field effect transistor and method of operation
US5640343A (en) * 1996-03-18 1997-06-17 International Business Machines Corporation Magnetic memory array using magnetic tunnel junction devices in the memory cells
US5734605A (en) * 1996-09-10 1998-03-31 Motorola, Inc. Multi-layer magnetic tunneling junction memory cells
US5748524A (en) * 1996-09-23 1998-05-05 Motorola, Inc. MRAM with pinned ends
US5946228A (en) * 1998-02-10 1999-08-31 International Business Machines Corporation Limiting magnetic writing fields to a preferred portion of a changeable magnetic region in magnetic devices
US6081445A (en) * 1998-07-27 2000-06-27 Motorola, Inc. Method to write/read MRAM arrays

Also Published As

Publication number Publication date
EP1073062A1 (de) 2001-01-31
US6097626A (en) 2000-08-01
JP4469067B2 (ja) 2010-05-26
DE60023404T2 (de) 2006-06-14
EP1073062B1 (de) 2005-10-26
JP2001126468A (ja) 2001-05-11

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P., HOUSTON

8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: SAMSUNG ELECTRONICS CO., LTD., SUWON, GYEONGGI, KR