DE502005010406D1 - Decoder und Verfahren zum Durchführen eines Viterbi-Algorithmus - Google Patents

Decoder und Verfahren zum Durchführen eines Viterbi-Algorithmus

Info

Publication number
DE502005010406D1
DE502005010406D1 DE502005010406T DE502005010406T DE502005010406D1 DE 502005010406 D1 DE502005010406 D1 DE 502005010406D1 DE 502005010406 T DE502005010406 T DE 502005010406T DE 502005010406 T DE502005010406 T DE 502005010406T DE 502005010406 D1 DE502005010406 D1 DE 502005010406D1
Authority
DE
Germany
Prior art keywords
decoder
viterbi algorithm
viterbi
algorithm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE502005010406T
Other languages
English (en)
Inventor
Felix Kiefer
Miodrag Temerinac
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Entropic Communications LLC
Original Assignee
Trident Microsystems Far East Ltd Cayman Islands
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Trident Microsystems Far East Ltd Cayman Islands filed Critical Trident Microsystems Far East Ltd Cayman Islands
Publication of DE502005010406D1 publication Critical patent/DE502005010406D1/de
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4161—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
    • H03M13/4184—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management using register-exchange
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
    • H03M13/6583—Normalization other than scaling, e.g. by subtraction
DE502005010406T 2004-08-09 2005-06-10 Decoder und Verfahren zum Durchführen eines Viterbi-Algorithmus Expired - Fee Related DE502005010406D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102004038754A DE102004038754A1 (de) 2004-08-09 2004-08-09 Decoder und Verfahren zum Durchführen eines Viterbi-Algorithmus

Publications (1)

Publication Number Publication Date
DE502005010406D1 true DE502005010406D1 (de) 2010-12-02

Family

ID=34937356

Family Applications (2)

Application Number Title Priority Date Filing Date
DE102004038754A Ceased DE102004038754A1 (de) 2004-08-09 2004-08-09 Decoder und Verfahren zum Durchführen eines Viterbi-Algorithmus
DE502005010406T Expired - Fee Related DE502005010406D1 (de) 2004-08-09 2005-06-10 Decoder und Verfahren zum Durchführen eines Viterbi-Algorithmus

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE102004038754A Ceased DE102004038754A1 (de) 2004-08-09 2004-08-09 Decoder und Verfahren zum Durchführen eines Viterbi-Algorithmus

Country Status (3)

Country Link
US (1) US7613989B2 (de)
EP (1) EP1626507B1 (de)
DE (2) DE102004038754A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2946480B1 (fr) * 2009-06-09 2011-06-17 Thales Sa Recepteur equipe d'un decodeur de viterbi a treillis

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60173930A (ja) * 1984-02-20 1985-09-07 Fujitsu Ltd パイプライン処理ビタビ復号器
DE3600905A1 (de) * 1986-01-15 1987-07-16 Ant Nachrichtentech Verfahren zum dekodieren von binaersignalen sowie viterbi-dekoder und anwendungen
US4802174A (en) * 1986-02-19 1989-01-31 Sony Corporation Viterbi decoder with detection of synchronous or asynchronous states
US5095392A (en) * 1988-01-27 1992-03-10 Matsushita Electric Industrial Co., Ltd. Digital signal magnetic recording/reproducing apparatus using multi-level QAM modulation and maximum likelihood decoding
US5448583A (en) * 1989-08-28 1995-09-05 Fujitsu Limited Apparatus and method using analog viterbi decoding techniques
US5220570A (en) * 1990-11-30 1993-06-15 The Board Of Trustees Of The Leland Stanford Junior University Programmable viterbi signal processor
JP3259297B2 (ja) * 1991-11-15 2002-02-25 ソニー株式会社 ビタビ復号装置
JP3120511B2 (ja) * 1991-11-21 2000-12-25 ソニー株式会社 ビタビ復号装置
US5291499A (en) * 1992-03-16 1994-03-01 Cirrus Logic, Inc. Method and apparatus for reduced-complexity viterbi-type sequence detectors
US5432803A (en) * 1992-04-30 1995-07-11 Novatel Communications, Ltd. Maximum likelihood convolutional decoder
JPH05335972A (ja) * 1992-05-27 1993-12-17 Nec Corp ビタビ復号器
US5408502A (en) * 1992-07-13 1995-04-18 General Instrument Corporation Apparatus and method for communicating digital data using trellis coded QAM with punctured convolutional codes
KR940010435B1 (ko) * 1992-08-31 1994-10-22 삼성전자 주식회사 비터비 복호기의 경로기억장치
JPH07245635A (ja) * 1994-03-04 1995-09-19 Sony Corp 信号点マッピング方法および信号点検出方法
JP3241210B2 (ja) * 1994-06-23 2001-12-25 沖電気工業株式会社 ビタビ復号方法及びビタビ復号回路
JPH0837467A (ja) * 1994-07-26 1996-02-06 Sony Corp ビタビ復号器およびビタビ復号方法
JP3280834B2 (ja) * 1995-09-04 2002-05-13 沖電気工業株式会社 符号化通信方式における信号判定装置および受信装置ならびに信号判定方法および通信路状態推定方法
DE59509663D1 (de) * 1995-10-21 2001-11-08 Micronas Gmbh Logischer Block für einen Viterbi-Decoder
JPH09266448A (ja) * 1996-03-28 1997-10-07 Sony Corp ビタビ復号化装置およびビタビ復号化方法
US5970104A (en) * 1997-03-19 1999-10-19 Cadence Design Systems, Inc. Method and apparatus for generating branch metrics and branch indices for convolutional code Viterbi decoders
KR100484127B1 (ko) * 1997-08-07 2005-06-16 삼성전자주식회사 비터비디코더
US6094739A (en) * 1997-09-24 2000-07-25 Lucent Technologies, Inc. Trellis decoder for real-time video rate decoding and de-interleaving
JP2000138595A (ja) * 1998-10-29 2000-05-16 Nec Corp ビタビ復号器
US6272661B1 (en) * 1998-12-29 2001-08-07 Texas Instruments Incorporated Minimum memory implementation of high speed viterbi decoder
US6405342B1 (en) * 1999-09-10 2002-06-11 Western Digital Technologies, Inc. Disk drive employing a multiple-input sequence detector responsive to reliability metrics to improve a retry operation
JP3501725B2 (ja) * 2000-05-12 2004-03-02 日本電気株式会社 ビタビ復号器
KR100605359B1 (ko) * 2000-11-01 2006-07-28 삼성전자주식회사 광디스크용 고배속 비터비 검출기

Also Published As

Publication number Publication date
EP1626507B1 (de) 2010-10-20
EP1626507A1 (de) 2006-02-15
DE102004038754A1 (de) 2006-02-23
US20060209996A1 (en) 2006-09-21
US7613989B2 (en) 2009-11-03

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