DE3882989D1 - Verfahren und anordnung zur verwaltung von mehrverriegelungsanzeigen in einem multiprozessordatenverarbeitungssystem. - Google Patents
Verfahren und anordnung zur verwaltung von mehrverriegelungsanzeigen in einem multiprozessordatenverarbeitungssystem.Info
- Publication number
- DE3882989D1 DE3882989D1 DE8888904801T DE3882989T DE3882989D1 DE 3882989 D1 DE3882989 D1 DE 3882989D1 DE 8888904801 T DE8888904801 T DE 8888904801T DE 3882989 T DE3882989 T DE 3882989T DE 3882989 D1 DE3882989 D1 DE 3882989D1
- Authority
- DE
- Germany
- Prior art keywords
- arrangement
- data processing
- processing system
- multiprocessor data
- managing multi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
- G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30087—Synchronisation or serialisation instructions
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/044,954 US4858116A (en) | 1987-05-01 | 1987-05-01 | Method and apparatus for managing multiple lock indicators in a multiprocessor computer system |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3882989D1 true DE3882989D1 (de) | 1993-09-09 |
DE3882989T2 DE3882989T2 (de) | 1994-01-13 |
Family
ID=21935220
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE88904801T Expired - Fee Related DE3882989T2 (de) | 1987-05-01 | 1988-04-27 | Verfahren und anordnung zur verwaltung von mehrverriegelungsanzeigen in einem multiprozessordatenverarbeitungssystem. |
Country Status (8)
Country | Link |
---|---|
US (2) | US4858116A (de) |
EP (1) | EP0358703B1 (de) |
JP (1) | JPH02500550A (de) |
KR (1) | KR920010915B1 (de) |
AU (1) | AU601590B2 (de) |
CA (1) | CA1304167C (de) |
DE (1) | DE3882989T2 (de) |
WO (1) | WO1988008569A1 (de) |
Families Citing this family (69)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5202971A (en) * | 1987-02-13 | 1993-04-13 | International Business Machines Corporation | System for file and record locking between nodes in a distributed data processing environment maintaining one copy of each file lock |
US5006982A (en) * | 1988-10-21 | 1991-04-09 | Siemens Ak. | Method of increasing the bandwidth of a packet bus by reordering reply packets |
US5081572A (en) * | 1988-10-28 | 1992-01-14 | Arnold Michael E | Manipulation of time-ordered lists and instructions therefor |
IT1227711B (it) * | 1988-11-18 | 1991-05-06 | Caluso Torino | Sistema multiprocessore di elaborazione dati a risorse distribuite condivise e prevenzione di stallo. |
US5142676A (en) * | 1988-12-28 | 1992-08-25 | Gte Laboratories Incorporated | Separate content addressable memories for storing locked segment addresses and locking processor identifications for controlling access to shared memory |
JP3038781B2 (ja) * | 1989-04-21 | 2000-05-08 | 日本電気株式会社 | メモリアクセス制御回路 |
US5276847A (en) * | 1990-02-14 | 1994-01-04 | Intel Corporation | Method for locking and unlocking a computer address |
US5669002A (en) * | 1990-06-28 | 1997-09-16 | Digital Equipment Corp. | Multi-processor resource locking mechanism with a lock register corresponding to each resource stored in common memory |
US5404483A (en) * | 1990-06-29 | 1995-04-04 | Digital Equipment Corporation | Processor and method for delaying the processing of cache coherency transactions during outstanding cache fills |
US5404482A (en) * | 1990-06-29 | 1995-04-04 | Digital Equipment Corporation | Processor and method for preventing access to a locked memory block by recording a lock in a content addressable memory with outstanding cache fills |
US5471591A (en) * | 1990-06-29 | 1995-11-28 | Digital Equipment Corporation | Combined write-operand queue and read-after-write dependency scoreboard |
AU633724B2 (en) * | 1990-06-29 | 1993-02-04 | Digital Equipment Corporation | Interlock queueing |
GB9019023D0 (en) * | 1990-08-31 | 1990-10-17 | Ncr Co | Work station having multiplexing and burst mode capabilities |
US5493687A (en) | 1991-07-08 | 1996-02-20 | Seiko Epson Corporation | RISC microprocessor architecture implementing multiple typed register sets |
US5539911A (en) | 1991-07-08 | 1996-07-23 | Seiko Epson Corporation | High-performance, superscalar-based computer system with out-of-order instruction execution |
US5359715A (en) * | 1991-09-16 | 1994-10-25 | Ncr Corporation | Architectures for computer systems having multiple processors, multiple system buses and multiple I/O buses interfaced via multiple ported interfaces |
US5269005A (en) * | 1991-09-17 | 1993-12-07 | Ncr Corporation | Method and apparatus for transferring data within a computer system |
US5430860A (en) * | 1991-09-17 | 1995-07-04 | International Business Machines Inc. | Mechanism for efficiently releasing memory lock, after allowing completion of current atomic sequence |
JPH05210640A (ja) * | 1992-01-31 | 1993-08-20 | Hitachi Ltd | マルチプロセッサシステム |
CA2086691C (en) * | 1992-03-30 | 1997-04-08 | David A. Elko | Communicating messages between processors and a coupling facility |
WO1993020505A2 (en) | 1992-03-31 | 1993-10-14 | Seiko Epson Corporation | Superscalar risc instruction scheduling |
US5412788A (en) * | 1992-04-16 | 1995-05-02 | Digital Equipment Corporation | Memory bank management and arbitration in multiprocessor computer system |
DE69308548T2 (de) | 1992-05-01 | 1997-06-12 | Seiko Epson Corp | Vorrichtung und verfahren zum befehlsabschluss in einem superskalaren prozessor. |
JPH05324544A (ja) * | 1992-05-15 | 1993-12-07 | Hitachi Ltd | バス制御方法 |
US5485594A (en) * | 1992-07-17 | 1996-01-16 | International Business Machines Corporation | Apparatus and method using an atomic fetch and add for establishing temporary ownership of a common system resource in a multiprocessor data processing system |
US5469575A (en) * | 1992-10-16 | 1995-11-21 | International Business Machines Corporation | Determining a winner of a race in a data processing system |
US5301332A (en) * | 1992-12-23 | 1994-04-05 | Ncr Corporation | Method and apparatus for a dynamic, timed-loop arbitration |
US5506968A (en) * | 1992-12-28 | 1996-04-09 | At&T Global Information Solutions Company | Terminating access of an agent to a shared resource when a timer, started after a low latency agent requests access, reaches a predetermined value |
EP0682789B1 (de) | 1992-12-31 | 1998-09-09 | Seiko Epson Corporation | System und verfahren zur änderung der namen von registern |
US5628021A (en) | 1992-12-31 | 1997-05-06 | Seiko Epson Corporation | System and method for assigning tags to control instruction processing in a superscalar processor |
US5666515A (en) * | 1993-02-18 | 1997-09-09 | Unisys Corporation | Information processing system having multiple modules and a memory on a bus, where any module can lock an addressable portion of the memory by sending retry signals to other modules that try to read at the locked address |
US5574862A (en) * | 1993-04-14 | 1996-11-12 | Radius Inc. | Multiprocessing system with distributed input/output management |
US5471590A (en) * | 1994-01-28 | 1995-11-28 | Compaq Computer Corp. | Bus master arbitration circuitry having improved prioritization |
EP0665501A1 (de) * | 1994-01-28 | 1995-08-02 | Compaq Computer Corporation | Bus-Master-Arbitrierungsschaltung mit Wiederholungsmechanismus |
US5550988A (en) * | 1994-03-01 | 1996-08-27 | Intel Corporation | Apparatus and method for performing error correction in a multi-processor system |
JPH07262140A (ja) * | 1994-03-16 | 1995-10-13 | Nec Corp | 排他制御装置 |
US5764995A (en) * | 1994-03-25 | 1998-06-09 | Packard Bell Nec | Write once read only registers |
DE19510068A1 (de) * | 1995-03-20 | 1996-10-02 | Siemens Ag | Flüssigmetall-Gleitlager |
US6173306B1 (en) | 1995-07-21 | 2001-01-09 | Emc Corporation | Dynamic load balancing |
US5860137A (en) * | 1995-07-21 | 1999-01-12 | Emc Corporation | Dynamic load balancing |
US5701422A (en) * | 1995-12-13 | 1997-12-23 | Ncr Corporation | Method for ensuring cycle ordering requirements within a hierarchical bus system including split-transaction buses |
US5780828A (en) * | 1996-02-15 | 1998-07-14 | Dh Technology, Inc. | Interactive video systems |
US5732226A (en) * | 1996-04-08 | 1998-03-24 | Vlsi Technology, Inc. | Apparatus for granting either a CPU data bus or a memory data bus or a memory data bus access to a PCI bus |
US5894562A (en) * | 1996-10-28 | 1999-04-13 | Motorola, Inc. | Method and apparatus for controlling bus arbitration in a data processing system |
JPH10134008A (ja) * | 1996-11-05 | 1998-05-22 | Mitsubishi Electric Corp | 半導体装置およびコンピュータシステム |
US5735219A (en) * | 1996-11-27 | 1998-04-07 | Odawara Automation, Inc. | Open base adjustable pallet for supporting work pieces |
US5968157A (en) | 1997-01-23 | 1999-10-19 | Sun Microsystems, Inc. | Locking of computer resources |
DE69733011T2 (de) * | 1997-06-27 | 2005-09-29 | Bull S.A. | Schnittstellenbrücke zwischen einem Systembus und einem lokalen Bus zur Steuerung wenigstens eines Slave-Gerätes, wie ein ROM-Speicher |
US6209073B1 (en) | 1998-04-27 | 2001-03-27 | International Business Machines Corp. | System and method for interlocking barrier operations in load and store queues |
US6374285B1 (en) * | 1998-05-15 | 2002-04-16 | Compaq Computer Corporation | Method for mutual exclusion of locks in a remote-write globally ordered network of processors |
US7013305B2 (en) | 2001-10-01 | 2006-03-14 | International Business Machines Corporation | Managing the state of coupling facility structures, detecting by one or more systems coupled to the coupling facility, the suspended state of the duplexed command, detecting being independent of message exchange |
US6611891B1 (en) | 1998-11-23 | 2003-08-26 | Advanced Micro Devices, Inc. | Computer resource configuration mechanism across a multi-pipe communication link |
US6421751B1 (en) * | 1998-11-23 | 2002-07-16 | Advanced Micro Devices, Inc. | Detecting a no-tags-free condition in a computer system having multiple outstanding transactions |
US6230230B1 (en) * | 1998-12-03 | 2001-05-08 | Sun Microsystems, Inc. | Elimination of traps and atomics in thread synchronization |
US6745273B1 (en) * | 2001-01-12 | 2004-06-01 | Lsi Logic Corporation | Automatic deadlock prevention via arbitration switching |
US8219762B1 (en) | 2004-08-13 | 2012-07-10 | Oracle America, Inc. | Computer system and method for leasing memory location to allow predictable access to memory location |
US7412572B1 (en) * | 2004-03-17 | 2008-08-12 | Sun Microsystems, Inc. | Multiple-location read, single-location write operations using transient blocking synchronization support |
US8516035B2 (en) * | 2006-06-21 | 2013-08-20 | Apple Inc. | Browsing and searching of podcasts |
US8412763B2 (en) * | 2006-06-21 | 2013-04-02 | Apple Inc. | Podcast organization and usage at a computing device |
JP4336613B2 (ja) * | 2004-04-28 | 2009-09-30 | キヤノン株式会社 | 画像形成装置およびデータ処理方法およびコンピュータが読み取り可能なプログラムを格納した記憶媒体およびプログラム |
US7496726B1 (en) * | 2005-04-18 | 2009-02-24 | Sun Microsystems, Inc. | Controlling contention via transactional timers among conflicting transactions issued by processors operating in insistent or polite mode |
US8285784B2 (en) * | 2005-11-08 | 2012-10-09 | Alcatel Lucent | Service creation via presence messaging |
US7966362B2 (en) * | 2006-06-21 | 2011-06-21 | Apple Inc. | Management of podcasts |
US7836372B2 (en) * | 2007-06-08 | 2010-11-16 | Apple Inc. | Memory controller with loopback test interface |
US8001328B2 (en) * | 2008-01-29 | 2011-08-16 | International Business Machines Corporation | Method and process for expediting the return of line exclusivity to a given processor through enhanced inter-node communications |
US8479166B2 (en) * | 2008-08-25 | 2013-07-02 | International Business Machines Corporation | Detecting locking discipline violations on shared resources |
US8589603B2 (en) * | 2010-08-30 | 2013-11-19 | International Business Machines Corporation | Delaying acknowledgment of an operation until operation completion confirmed by local adapter read operation |
US9032163B2 (en) * | 2010-09-22 | 2015-05-12 | Novell, Inc. | Data access management |
US9560134B1 (en) * | 2012-06-27 | 2017-01-31 | Netapp, Inc. | Storage array side write locking |
Family Cites Families (40)
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US3398405A (en) * | 1965-06-07 | 1968-08-20 | Burroughs Corp | Digital computer with memory lock operation |
US3528061A (en) * | 1968-07-05 | 1970-09-08 | Ibm | Interlock arrangement |
GB1273794A (en) * | 1969-07-30 | 1972-05-10 | Int Computers Ltd | Improvements in or relating to magnetic recording systems |
FR2056894A1 (de) * | 1969-07-31 | 1971-05-07 | Cii | |
US3761883A (en) * | 1972-01-20 | 1973-09-25 | Ibm | Storage protect key array for a multiprocessing system |
US3997875A (en) * | 1973-01-08 | 1976-12-14 | U.S. Philips Corporation | Computer configuration with claim cycles |
US3916384A (en) * | 1973-06-15 | 1975-10-28 | Gte Automatic Electric Lab Inc | Communication switching system computer memory control arrangement |
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GB1536853A (en) * | 1975-05-01 | 1978-12-20 | Plessey Co Ltd | Data processing read and hold facility |
US3993981A (en) * | 1975-06-30 | 1976-11-23 | Honeywell Information Systems, Inc. | Apparatus for processing data transfer requests in a data processing system |
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JPS596415B2 (ja) * | 1977-10-28 | 1984-02-10 | 株式会社日立製作所 | 多重情報処理システム |
US4296466A (en) * | 1978-01-23 | 1981-10-20 | Data General Corporation | Data processing system including a separate input/output processor with micro-interrupt request apparatus |
US4384322A (en) * | 1978-10-31 | 1983-05-17 | Honeywell Information Systems Inc. | Asynchronous multi-communication bus sequence |
CA1143854A (en) * | 1979-03-12 | 1983-03-29 | Paul Binder | Apparatus for interconnecting the units of a data processing system |
US4315310A (en) * | 1979-09-28 | 1982-02-09 | Intel Corporation | Input/output data processing system |
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US4481573A (en) * | 1980-11-17 | 1984-11-06 | Hitachi, Ltd. | Shared virtual address translation unit for a multiprocessor system |
US4407016A (en) * | 1981-02-18 | 1983-09-27 | Intel Corporation | Microprocessor providing an interface between a peripheral subsystem and an object-oriented data processor |
JPS58107977A (ja) * | 1981-12-22 | 1983-06-27 | Toshiba Corp | 記憶装置へのアクセス方式 |
US4480307A (en) * | 1982-01-04 | 1984-10-30 | Intel Corporation | Interface for use between a memory and components of a module switching apparatus |
JPS58140862A (ja) * | 1982-02-16 | 1983-08-20 | Toshiba Corp | 相互排他方式 |
US4490785A (en) * | 1982-05-07 | 1984-12-25 | Digital Equipment Corporation | Dual path bus structure for computer interconnection |
US4574350A (en) * | 1982-05-19 | 1986-03-04 | At&T Bell Laboratories | Shared resource locking apparatus |
US4698753A (en) * | 1982-11-09 | 1987-10-06 | Texas Instruments Incorporated | Multiprocessor interface device |
JPS59106021A (ja) * | 1982-12-10 | 1984-06-19 | Oki Electric Ind Co Ltd | バス構成方式 |
US4543628A (en) * | 1983-01-28 | 1985-09-24 | Digital Equipment Corporation | Bus for data processing system with fault cycle operation |
US4891749A (en) * | 1983-03-28 | 1990-01-02 | International Business Machines Corporation | Multiprocessor storage serialization apparatus |
JPS6010384A (ja) * | 1983-06-29 | 1985-01-19 | Nec Corp | デ−タ処理装置 |
US4587609A (en) * | 1983-07-01 | 1986-05-06 | Honeywell Information Systems Inc. | Lockout operation among asynchronous accessers of a shared computer system resource |
AU564271B2 (en) * | 1983-09-22 | 1987-08-06 | Digital Equipment Corporation | Retry mechanism for releasing control of a communications path in a digital computer system |
US4706190A (en) * | 1983-09-22 | 1987-11-10 | Digital Equipment Corporation | Retry mechanism for releasing control of a communications path in digital computer system |
JPS60107170A (ja) * | 1983-11-15 | 1985-06-12 | Nec Corp | マルチプロセッサ制御方式 |
US4709326A (en) * | 1984-06-29 | 1987-11-24 | International Business Machines Corporation | General locking/synchronization facility with canonical states and mapping of processors |
-
1987
- 1987-05-01 US US07/044,954 patent/US4858116A/en not_active Expired - Lifetime
-
1988
- 1988-04-27 JP JP63504366A patent/JPH02500550A/ja active Granted
- 1988-04-27 AU AU17285/88A patent/AU601590B2/en not_active Ceased
- 1988-04-27 DE DE88904801T patent/DE3882989T2/de not_active Expired - Fee Related
- 1988-04-27 KR KR1019880701742A patent/KR920010915B1/ko not_active IP Right Cessation
- 1988-04-27 WO PCT/US1988/001297 patent/WO1988008569A1/en active IP Right Grant
- 1988-04-27 EP EP88904801A patent/EP0358703B1/de not_active Expired - Lifetime
- 1988-04-29 CA CA000565473A patent/CA1304167C/en not_active Expired - Fee Related
-
1989
- 1989-06-28 US US07/372,565 patent/US5068781A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR890702116A (ko) | 1989-12-22 |
KR920010915B1 (ko) | 1992-12-24 |
DE3882989T2 (de) | 1994-01-13 |
AU601590B2 (en) | 1990-09-13 |
EP0358703A1 (de) | 1990-03-21 |
CA1304167C (en) | 1992-06-23 |
JPH02500550A (ja) | 1990-02-22 |
WO1988008569A1 (en) | 1988-11-03 |
US5068781A (en) | 1991-11-26 |
US4858116A (en) | 1989-08-15 |
EP0358703B1 (de) | 1993-08-04 |
AU1728588A (en) | 1988-12-02 |
JPH0587855B2 (de) | 1993-12-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |