DE3789361T2 - Verfahren zur Herstellung eines Artikels, der eine hetero-epitaxische Struktur besitzt. - Google Patents
Verfahren zur Herstellung eines Artikels, der eine hetero-epitaxische Struktur besitzt.Info
- Publication number
- DE3789361T2 DE3789361T2 DE3789361T DE3789361T DE3789361T2 DE 3789361 T2 DE3789361 T2 DE 3789361T2 DE 3789361 T DE3789361 T DE 3789361T DE 3789361 T DE3789361 T DE 3789361T DE 3789361 T2 DE3789361 T2 DE 3789361T2
- Authority
- DE
- Germany
- Prior art keywords
- hetero
- article
- producing
- epitaxial structure
- epitaxial
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C03—GLASS; MINERAL OR SLAG WOOL
- C03B—MANUFACTURE, SHAPING, OR SUPPLEMENTARY PROCESSES
- C03B25/00—Annealing glass products
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/934,160 US4816421A (en) | 1986-11-24 | 1986-11-24 | Method of making a heteroepitaxial structure by mesotaxy induced by buried implantation |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3789361D1 DE3789361D1 (de) | 1994-04-21 |
DE3789361T2 true DE3789361T2 (de) | 1994-06-23 |
Family
ID=25465066
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3789361T Expired - Fee Related DE3789361T2 (de) | 1986-11-24 | 1987-11-16 | Verfahren zur Herstellung eines Artikels, der eine hetero-epitaxische Struktur besitzt. |
Country Status (7)
Country | Link |
---|---|
US (1) | US4816421A (de) |
EP (1) | EP0271232B1 (de) |
JP (1) | JPH0654770B2 (de) |
KR (1) | KR920007822B1 (de) |
CA (1) | CA1332695C (de) |
DE (1) | DE3789361T2 (de) |
HK (1) | HK100594A (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4982263A (en) * | 1987-12-21 | 1991-01-01 | Texas Instruments Incorporated | Anodizable strain layer for SOI semiconductor structures |
US5459346A (en) * | 1988-06-28 | 1995-10-17 | Ricoh Co., Ltd. | Semiconductor substrate with electrical contact in groove |
JPH02170528A (ja) * | 1988-12-23 | 1990-07-02 | Toshiba Corp | 半導体装置の製造方法 |
US5075243A (en) * | 1989-08-10 | 1991-12-24 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Fabrication of nanometer single crystal metallic CoSi2 structures on Si |
US5077228A (en) * | 1989-12-01 | 1991-12-31 | Texas Instruments Incorporated | Process for simultaneous formation of trench contact and vertical transistor gate and structure |
IT1248789B (it) * | 1990-05-02 | 1995-01-30 | Nippon Sheet Glass Co Ltd | Metodo per la produzione di una pellicola di semiconduttore policristallino |
US5236872A (en) * | 1991-03-21 | 1993-08-17 | U.S. Philips Corp. | Method of manufacturing a semiconductor device having a semiconductor body with a buried silicide layer |
US5122479A (en) * | 1991-04-11 | 1992-06-16 | At&T Bell Laboratories | Semiconductor device comprising a silicide layer, and method of making the device |
US5379712A (en) * | 1991-08-20 | 1995-01-10 | Implant Sciences Corporation | Method of epitaxially growing thin films using ion implantation |
JP2914798B2 (ja) * | 1991-10-09 | 1999-07-05 | 株式会社東芝 | 半導体装置 |
DE4136511C2 (de) * | 1991-11-06 | 1995-06-08 | Forschungszentrum Juelich Gmbh | Verfahren zur Herstellung einer Si/FeSi¶2¶-Heterostruktur |
US5290715A (en) * | 1991-12-31 | 1994-03-01 | U.S. Philips Corporation | Method of making dielectrically isolated metal base transistors and permeable base transistors |
EP0603461A3 (de) * | 1992-10-30 | 1996-09-25 | Ibm | Herstellung von 3-D Siliziumsilizid-Strukturen. |
US5666002A (en) * | 1993-06-22 | 1997-09-09 | Kabushiki Kaisha Toshiba | Semiconductor device with wiring layer in tunnel in semiconductor substrate |
US5792679A (en) * | 1993-08-30 | 1998-08-11 | Sharp Microelectronics Technology, Inc. | Method for forming silicon-germanium/Si/silicon dioxide heterostructure using germanium implant |
US5563428A (en) * | 1995-01-30 | 1996-10-08 | Ek; Bruce A. | Layered structure of a substrate, a dielectric layer and a single crystal layer |
WO2000017939A1 (fr) * | 1998-09-22 | 2000-03-30 | Hitachi, Ltd. | Dispositif a semi-conducteur et son procede de production |
TW541598B (en) * | 2002-05-30 | 2003-07-11 | Jiun-Hua Chen | Integrated chip diode |
US7052939B2 (en) | 2002-11-26 | 2006-05-30 | Freescale Semiconductor, Inc. | Structure to reduce signal cross-talk through semiconductor substrate for system on chip applications |
FR2922360A1 (fr) * | 2007-10-12 | 2009-04-17 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat de type semi- conducteur sur isolant a plan de masse integre. |
FR2980636B1 (fr) | 2011-09-22 | 2016-01-08 | St Microelectronics Rousset | Protection d'un dispositif electronique contre une attaque laser en face arriere, et support semiconducteur correspondant |
US8889541B1 (en) | 2013-05-07 | 2014-11-18 | International Business Machines Corporation | Reduced short channel effect of III-V field effect transistor via oxidizing aluminum-rich underlayer |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3855009A (en) * | 1973-09-20 | 1974-12-17 | Texas Instruments Inc | Ion-implantation and conventional epitaxy to produce dielectrically isolated silicon layers |
US4554045A (en) * | 1980-06-05 | 1985-11-19 | At&T Bell Laboratories | Method for producing metal silicide-silicon heterostructures |
GB2078441A (en) * | 1980-06-17 | 1982-01-06 | Westinghouse Electric Corp | Forming impurity regions in semiconductor bodies by high energy ion irradiation |
JPS59150419A (ja) * | 1983-01-31 | 1984-08-28 | Toshiba Corp | 化合物半導体装置の製造方法 |
JPS59210642A (ja) * | 1983-05-16 | 1984-11-29 | Hitachi Ltd | 半導体装置の製造方法 |
JPS60114122A (ja) * | 1983-11-28 | 1985-06-20 | 松下精工株式会社 | 観葉植物等の陳列装置 |
JPS63114122A (ja) * | 1986-10-27 | 1988-05-19 | Yokogawa Hewlett Packard Ltd | 半導体基板内に導電性領域を製造する方法 |
-
1986
- 1986-11-24 US US06/934,160 patent/US4816421A/en not_active Expired - Lifetime
-
1987
- 1987-11-16 EP EP87310087A patent/EP0271232B1/de not_active Expired - Lifetime
- 1987-11-16 DE DE3789361T patent/DE3789361T2/de not_active Expired - Fee Related
- 1987-11-23 KR KR1019870013173A patent/KR920007822B1/ko not_active IP Right Cessation
- 1987-11-24 CA CA000552552A patent/CA1332695C/en not_active Expired - Fee Related
- 1987-11-24 JP JP62294293A patent/JPH0654770B2/ja not_active Expired - Fee Related
-
1994
- 1994-09-22 HK HK100594A patent/HK100594A/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
HK100594A (en) | 1994-09-30 |
JPS63142631A (ja) | 1988-06-15 |
US4816421A (en) | 1989-03-28 |
EP0271232A1 (de) | 1988-06-15 |
KR880006132A (ko) | 1988-07-21 |
KR920007822B1 (ko) | 1992-09-17 |
JPH0654770B2 (ja) | 1994-07-20 |
CA1332695C (en) | 1994-10-25 |
DE3789361D1 (de) | 1994-04-21 |
EP0271232B1 (de) | 1994-03-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Free format text: BLUMBACH, KRAMER & PARTNER, 65193 WIESBADEN |
|
8339 | Ceased/non-payment of the annual fee |