DE3768417D1 - Keramische mehrschichtplatte fuer kupferschaltung. - Google Patents

Keramische mehrschichtplatte fuer kupferschaltung.

Info

Publication number
DE3768417D1
DE3768417D1 DE8787402347T DE3768417T DE3768417D1 DE 3768417 D1 DE3768417 D1 DE 3768417D1 DE 8787402347 T DE8787402347 T DE 8787402347T DE 3768417 T DE3768417 T DE 3768417T DE 3768417 D1 DE3768417 D1 DE 3768417D1
Authority
DE
Germany
Prior art keywords
coupling
ceramic multilayer
multilayer plate
plate
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787402347T
Other languages
English (en)
Inventor
Shigenori Aoki
Yoshihiko Imanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3768417D1 publication Critical patent/DE3768417D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857Multilayer substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00Stock material or miscellaneous articles
    • Y10S428/901Printed circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/31504Composite [nonstructural laminate]
    • Y10T428/31678Of metal
DE8787402347T 1986-10-23 1987-10-20 Keramische mehrschichtplatte fuer kupferschaltung. Expired - Fee Related DE3768417D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61250755A JPS63107095A (ja) 1986-10-23 1986-10-23 多層セラミツク回路基板

Publications (1)

Publication Number Publication Date
DE3768417D1 true DE3768417D1 (de) 1991-04-11

Family

ID=17212556

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787402347T Expired - Fee Related DE3768417D1 (de) 1986-10-23 1987-10-20 Keramische mehrschichtplatte fuer kupferschaltung.

Country Status (5)

Country Link
US (1) US4939021A (de)
EP (1) EP0265340B1 (de)
JP (1) JPS63107095A (de)
KR (1) KR900005315B1 (de)
DE (1) DE3768417D1 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02239168A (ja) * 1989-03-13 1990-09-21 Shoei Chem Ind Co 回路基板の製造方法
AU6345990A (en) * 1989-08-04 1991-03-11 Ferro Corporation Porous dielectric compositions
US5071794A (en) * 1989-08-04 1991-12-10 Ferro Corporation Porous dielectric compositions
DE3935471A1 (de) * 1989-10-25 1991-05-02 Hoechst Ag Keramische stoffzusammensetzung und ihre verwendung
US5071793A (en) * 1990-08-23 1991-12-10 Aluminum Company Of America Low dielectric inorganic composition for multilayer ceramic package
JP3021586B2 (ja) * 1990-09-17 2000-03-15 富士通株式会社 低誘電率セラミック基板とグリーンシートの製造方法
JP2906282B2 (ja) * 1990-09-20 1999-06-14 富士通株式会社 ガラスセラミック・グリーンシートと多層基板、及び、その製造方法
US5073180A (en) * 1991-03-20 1991-12-17 International Business Machines Corporation Method for forming sealed co-fired glass ceramic structures
JPH0723252B2 (ja) * 1991-07-31 1995-03-15 日本電気株式会社 低温焼結性低誘電率無機組成物
US5316985A (en) * 1991-12-09 1994-05-31 Aluminum Company Of America Suppression of crystal growth in low dielectric inorganic composition using ultrafine alumina
US5242867A (en) * 1992-03-04 1993-09-07 Industrial Technology Research Institute Composition for making multilayer ceramic substrates and dielectric materials with low firing temperature
JPH05254923A (ja) * 1992-03-10 1993-10-05 Hitachi Ltd セラミック組成物及びセラミック回路基板
GB2310314A (en) * 1996-02-14 1997-08-20 Gec Alsthom Ltd Glass or glass ceramic substrates
JP3042441B2 (ja) * 1997-03-12 2000-05-15 日本電気株式会社 低温焼成ガラスセラミックス基板とその製造方法
US6120906A (en) * 1997-03-31 2000-09-19 Kyocera Corporation Insulated board for a wiring board
JP3860336B2 (ja) * 1998-04-28 2006-12-20 日本特殊陶業株式会社 ガラスセラミック複合体
US6592696B1 (en) * 1998-10-09 2003-07-15 Motorola, Inc. Method for fabricating a multilayered structure and the structures formed by the method
US6572830B1 (en) 1998-10-09 2003-06-03 Motorola, Inc. Integrated multilayered microfludic devices and methods for making the same
US6309993B1 (en) * 1999-04-28 2001-10-30 National Science Council Of Republic Of China Low-fire microwave dielectric compositions
DE19961842B4 (de) * 1999-12-21 2008-01-31 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Mehrschichtleiterplatte
CN101027257B (zh) * 2004-09-24 2011-08-17 纳幕尔杜邦公司 密封组合物
DE102005050515A1 (de) 2005-10-21 2007-04-26 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Flächensubstrat mit elektrisch leitender Struktur
KR101555379B1 (ko) * 2008-06-30 2015-09-23 니혼도꾸슈도교 가부시키가이샤 전기검사용 기판 및 그 제조방법
US9232645B2 (en) * 2013-11-22 2016-01-05 International Business Machines Corporation High speed differential wiring in glass ceramic MCMS

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5817651A (ja) * 1981-07-24 1983-02-01 Hitachi Ltd 多層回路板とその製造方法
JPS58156552A (ja) * 1982-03-11 1983-09-17 Nec Corp 絶縁性セラミツクペ−スト用無機組成物
JPS59178752A (ja) * 1983-03-30 1984-10-11 Hitachi Ltd 多層配線基板
JPS59217392A (ja) * 1983-05-25 1984-12-07 株式会社日立製作所 多層配線回路板
JPS6014494A (ja) * 1983-07-04 1985-01-25 株式会社日立製作所 セラミツク多層配線基板およびその製造方法
JPS60240135A (ja) * 1984-05-14 1985-11-29 Fujitsu Ltd 半導体装置実装用多層基板
JPS60254697A (ja) * 1984-05-31 1985-12-16 富士通株式会社 多層セラミック回路基板および製法
US4662215A (en) * 1984-08-20 1987-05-05 Aluminum Company Of America Apparatus and method for ultrasonic detection of inclusions in a molten body
JPS61155243A (ja) * 1984-12-28 1986-07-14 富士通株式会社 グリ−ンシ−ト組成物
US4654095A (en) * 1985-03-25 1987-03-31 E. I. Du Pont De Nemours And Company Dielectric composition
US4655864A (en) * 1985-03-25 1987-04-07 E. I. Du Pont De Nemours And Company Dielectric compositions and method of forming a multilayer interconnection using same

Also Published As

Publication number Publication date
JPS63107095A (ja) 1988-05-12
KR900005315B1 (ko) 1990-07-27
JPH0458198B2 (de) 1992-09-16
EP0265340B1 (de) 1991-03-06
EP0265340A2 (de) 1988-04-27
EP0265340A3 (en) 1989-01-11
US4939021A (en) 1990-07-03
KR880005846A (ko) 1988-06-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee