DE3486347D1 - Verbundrechnersystem. - Google Patents

Verbundrechnersystem.

Info

Publication number: DE3486347D1
Authority: DE; Germany
Prior art keywords: computer system; network computer; network; computer
Prior art date: 1983-12-28
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE3486347T

Other languages

English (en)

Other versions

DE3486347T2 (de

Inventor

Kinji Mori Kinji Mori

Shoji Miyamoto

Hirokazu Ihara

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Hitachi Ltd

Original Assignee

Hitachi Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1983-12-28

Filing date

1984-12-27

Publication date

1994-10-13

1984-12-27 Application filed by Hitachi Ltd filed Critical Hitachi Ltd

1994-10-13 Application granted granted Critical

1994-10-13 Publication of DE3486347D1 publication Critical patent/DE3486347D1/de

1995-01-19 Publication of DE3486347T2 publication Critical patent/DE3486347T2/de

2004-12-28 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
- G06F15/8023—Two dimensional arrays, e.g. mesh, torus
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/46—Interconnection of networks
- H04L12/4637—Interconnected ring systems

DE3486347T 1983-12-28 1984-12-27 Verbundrechnersystem. Expired - Fee Related DE3486347T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP58246294A JP2644718B2 (ja)	1983-12-28	1983-12-28	コンピュータシステム

Publications (2)

Publication Number	Publication Date
DE3486347D1 true DE3486347D1 (de)	1994-10-13
DE3486347T2 DE3486347T2 (de)	1995-01-19

Family

ID=17146407

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE3486347T Expired - Fee Related DE3486347T2 (de)	1983-12-28	1984-12-27	Verbundrechnersystem.

Country Status (4)

Country	Link
US (1)	US5341504A (de)
EP (1)	EP0146966B1 (de)
JP (1)	JP2644718B2 (de)
DE (1)	DE3486347T2 (de)

Families Citing this family (53)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4797882A (en) *	1985-10-02	1989-01-10	American Telephone And Telegraph Company, At&T Bell Laboratories	Mesh-based switching network
JPS62206660A (ja) *	1986-03-07	1987-09-11	Agency Of Ind Science & Technol	プロセツサ結合装置
DE3855338T2 (de) *	1987-03-11	1997-01-02	Toyo Communication Equip	Rechnersystem
DE3851005T2 (de) *	1987-06-01	1995-04-20	Applied Intelligent Syst Inc	Paralleles Nachbarverarbeitungssystem und -Verfahren.
JP2743994B2 (ja) *	1987-06-29	1998-04-28	株式会社東芝	並列処理システム
JPH03174648A (ja) *	1989-09-12	1991-07-29	Nec Corp	並列処理システム構成集積回路
US6453406B1 (en) *	1990-10-17	2002-09-17	Compaq Computer Corporation	Multiprocessor system with fiber optic bus interconnect for interprocessor communications
US5689719A (en) *	1991-06-28	1997-11-18	Sanyo Electric O., Ltd.	Parallel computer system including processing elements
US5583990A (en) *	1993-12-10	1996-12-10	Cray Research, Inc.	System for allocating messages between virtual channels to avoid deadlock and to optimize the amount of message traffic on each type of virtual channel
US5560027A (en) *	1993-12-15	1996-09-24	Convex Computer Corporation	Scalable parallel processing systems wherein each hypernode has plural processing modules interconnected by crossbar and each processing module has SCI circuitry for forming multi-dimensional network with other hypernodes
US5644714A (en)	1994-01-14	1997-07-01	Elonex Plc, Ltd.	Video collection and distribution system with interested item notification and download on demand
US5515510A (en) *	1994-01-14	1996-05-07	Consilium Overseas Limited	Communications internetwork system connecting a client node array to a resource array
US5557734A (en) *	1994-06-17	1996-09-17	Applied Intelligent Systems, Inc.	Cache burst architecture for parallel processing, such as for image processing
US5701416A (en) *	1995-04-13	1997-12-23	Cray Research, Inc.	Adaptive routing mechanism for torus interconnection network
US5659796A (en) *	1995-04-13	1997-08-19	Cray Research, Inc.	System for randomly modifying virtual channel allocation and accepting the random modification based on the cost function
US6055618A (en) *	1995-10-31	2000-04-25	Cray Research, Inc.	Virtual maintenance network in multiprocessing system having a non-flow controlled virtual maintenance channel
US5835925A (en) *	1996-03-13	1998-11-10	Cray Research, Inc.	Using external registers to extend memory reference capabilities of a microprocessor
US5864738A (en) *	1996-03-13	1999-01-26	Cray Research, Inc.	Massively parallel processing system using two data paths: one connecting router circuit to the interconnect network and the other connecting router circuit to I/O controller
US5898827A (en) *	1996-09-27	1999-04-27	Hewlett-Packard Co.	Routing methods for a multinode SCI computer system
US6085303A (en) *	1997-11-17	2000-07-04	Cray Research, Inc.	Seralized race-free virtual barrier network
US6230252B1 (en)	1997-11-17	2001-05-08	Silicon Graphics, Inc.	Hybrid hypercube/torus architecture
US6101181A (en) *	1997-11-17	2000-08-08	Cray Research Inc.	Virtual channel assignment in large torus systems
US5970232A (en) *	1997-11-17	1999-10-19	Cray Research, Inc.	Router table lookup mechanism
US6314110B1 (en) *	1998-03-06	2001-11-06	Cisco Technology, Inc.	Method and apparatus for distributed bandwidth allocation for a bi-directional ring media with spatial and local reuse
US6216174B1 (en)	1998-09-29	2001-04-10	Silicon Graphics, Inc.	System and method for fast barrier synchronization
US6320501B1 (en)	1999-05-25	2001-11-20	Pittway Corporation	Multiple sensor system for alarm determination with device-to-device communications
US6674720B1 (en)	1999-09-29	2004-01-06	Silicon Graphics, Inc.	Age-based network arbitration system and method
US6751698B1 (en)	1999-09-29	2004-06-15	Silicon Graphics, Inc.	Multiprocessor node controller circuit and method
CN100338598C (zh) *	2001-03-13	2007-09-19	伊强德斯股份有限公司	视觉装置、联动式计数器及图象检测器
US6783498B2 (en) *	2002-03-26	2004-08-31	Vivometrics, Inc.	Method and system for extracting cardiac parameters from plethysmographic signals
AU2003252157A1 (en) *	2002-07-23	2004-02-09	Gatechange Technologies, Inc.	Interconnect structure for electrical devices
US20040019765A1 (en) *	2002-07-23	2004-01-29	Klein Robert C.	Pipelined reconfigurable dynamic instruction set processor
US20040062196A1 (en) *	2002-10-01	2004-04-01	Avici Systems, Inc.	Single shelf router
TW200416522A (en)	2003-02-25	2004-09-01	Asustek Comp Inc	Portable computer carrying desktop computer processor and power management method thereof
US7421565B1 (en) *	2003-08-18	2008-09-02	Cray Inc.	Method and apparatus for indirectly addressed vector load-add -store across multi-processors
US7543133B1 (en)	2003-08-18	2009-06-02	Cray Inc.	Latency tolerant distributed shared memory multiprocessor computer
US7503048B1 (en)	2003-08-18	2009-03-10	Cray Incorporated	Scheduling synchronization of programs running as streams on multiple processors
US7519771B1 (en)	2003-08-18	2009-04-14	Cray Inc.	System and method for processing memory instructions using a forced order queue
US7735088B1 (en)	2003-08-18	2010-06-08	Cray Inc.	Scheduling synchronization of programs running as streams on multiple processors
US8307194B1 (en)	2003-08-18	2012-11-06	Cray Inc.	Relaxed memory consistency model
US7334110B1 (en)	2003-08-18	2008-02-19	Cray Inc.	Decoupled scalar/vector computer architecture system and method
US7366873B1 (en)	2003-08-18	2008-04-29	Cray, Inc.	Indirectly addressed vector load-operate-store method and apparatus
US7437521B1 (en)	2003-08-18	2008-10-14	Cray Inc.	Multistream processing memory-and barrier-synchronization method and apparatus
US7185138B1 (en)	2004-05-14	2007-02-27	Peter Galicki	Multi-dimensional data routing fabric
US7478769B1 (en)	2005-03-09	2009-01-20	Cray Inc.	Method and apparatus for cooling electronic components
US7380102B2 (en) *	2005-09-27	2008-05-27	International Business Machines Corporation	Communication link control among inter-coupled multiple processing units in a node to respective units in another node for request broadcasting and combined response
TW200712898A (en) *	2005-09-30	2007-04-01	Tyan Computer Corp	Multi-processor module
US7818388B2 (en) *	2005-10-07	2010-10-19	International Business Machines Corporation	Data processing system, method and interconnect fabric supporting multiple planes of processing nodes
US8441942B1 (en) *	2008-12-03	2013-05-14	Tellabs Operations Inc.	Method and apparatus for link level loop detection
JP6946955B2 (ja) *	2017-11-10	2021-10-13	富士通株式会社	情報処理装置、演算処理装置及び情報処理装置の制御方法
GB201904266D0 (en) *	2019-03-27	2019-05-08	Graphcore Ltd	A networked computer with embedded rings
GB201904267D0 (en) *	2019-03-27	2019-05-08	Graphcore Ltd	A networked computer with multiple embedded rings
CN113424198B (zh) *	2019-11-15	2023-08-29	昆仑芯(北京)科技有限公司	基于柔性电缆连接的分布式ai训练拓扑

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3473160A (en) *	1966-10-10	1969-10-14	Stanford Research Inst	Electronically controlled microelectronic cellular logic array
US3731002A (en) *	1970-10-08	1973-05-01	Bell Telephone Labor Inc	Interconnected loop data block transmission system
JPS5015521A (de) *	1973-06-08	1975-02-19
CH584492A5 (de) *	1974-12-10	1977-01-31	Hasler Ag
JPS51138360A (en) *	1975-05-26	1976-11-29	Hitachi Ltd	Intra-premiss information control and transmission system
JPS5248416A (en) *	1975-07-23	1977-04-18	Johnson Controls Inc	Data communication system
US4177514A (en) *	1976-11-12	1979-12-04	General Electric Company	Graph architecture information processing system
JPS5439503A (en) *	1977-09-05	1979-03-27	Hitachi Ltd	Priority selection system in ring transmission line
US4195351A (en) *	1978-01-27	1980-03-25	International Business Machines Corporation	Loop configured data transmission system
FR2420254A1 (fr) *	1978-03-17	1979-10-12	Anvar	Procede de routage d'informations dans un reseau de transmission de donnees numeriques et dispositif et reseau pour la mise en oeuvre de ce procede
US4247892A (en) *	1978-10-12	1981-01-27	Lawrence Patrick N	Arrays of machines such as computers
US4271511A (en) *	1979-04-25	1981-06-02	Solomon Manber	Communications network
US4287592A (en) *	1979-05-23	1981-09-01	Burroughs Corporation	Method and apparatus for interfacing stations in a multiloop communications system
JPS5847111B2 (ja) *	1979-09-10	1983-10-20	株式会社日立製作所	ル−プ伝送システム
JPS5947905B2 (ja) *	1980-02-08	1984-11-22	株式会社日立製作所	共通伝送路を用いた情報の伝送方法
JPS5947906B2 (ja) *	1980-07-11	1984-11-22	株式会社日立製作所	ル−プ伝送システム
JPS5943862B2 (ja) *	1980-09-12	1984-10-25	株式会社日立製作所	ル−プ伝送システムの情報伝送方法
US4399531A (en) *	1980-09-29	1983-08-16	Rockwell International Corporation	Distributed digital data communications network
JPS57164636A (en) *	1981-04-03	1982-10-09	Hitachi Ltd	Control method for transmission system
US4622632A (en) *	1982-08-18	1986-11-11	Board Of Regents, University Of Washington	Data processing system having a pyramidal array of processors
DE3382005D1 (de) *	1982-08-25	1991-01-03	Nec Corp	Datenuebertragungsgeraet fuer ringuebertragungssystem.
FR2538662B1 (fr) *	1982-12-22	1988-04-29	Trt Telecom Radio Electr	Systeme de commutation telephonique
US4644496A (en) *	1983-01-11	1987-02-17	Iowa State University Research Foundation, Inc.	Apparatus, methods, and systems for computer information transfer
US4538264A (en) *	1983-02-14	1985-08-27	Prime Computer, Inc.	Self-repairing ring communications network
US4527270A (en) *	1983-05-04	1985-07-02	Allen-Bradley Company	Communications network with stations that detect and automatically bypass faults
US4709327A (en) *	1983-05-31	1987-11-24	Hillis W Daniel	Parallel processor/memory circuit
JPH0618377B2 (ja) *	1983-09-08	1994-03-09	株式会社日立製作所	伝送系
JPH0767112B2 (ja) *	1983-12-23	1995-07-19	株式会社日立製作所	通信ネツトワ−クシステム
US4561088A (en) *	1984-02-13	1985-12-24	Fmc Corporation	Communication system bypass architecture

1983
- 1983-12-28 JP JP58246294A patent/JP2644718B2/ja not_active Expired - Lifetime
1984
- 1984-12-27 DE DE3486347T patent/DE3486347T2/de not_active Expired - Fee Related
- 1984-12-27 EP EP84116339A patent/EP0146966B1/de not_active Expired - Lifetime
1990
- 1990-03-01 US US07/490,520 patent/US5341504A/en not_active Expired - Fee Related

Also Published As

Publication number	Publication date
JP2644718B2 (ja)	1997-08-25
DE3486347T2 (de)	1995-01-19
US5341504A (en)	1994-08-23
JPS60140457A (ja)	1985-07-25
EP0146966A2 (de)	1985-07-03
EP0146966A3 (en)	1986-09-10
EP0146966B1 (de)	1994-09-07

Legal Events

Date	Code	Title	Description
1995-10-05	8364	No opposition during term of opposition
2004-10-21	8339	Ceased/non-payment of the annual fee

Publication	Publication Date	Title
DE3486347D1 (de)	1994-10-13	Verbundrechnersystem.
DE3382691T2 (de)	1993-12-23	Bildschirmverwaltungssystem.
DE3779694T2 (de)	1993-01-28	Rechnernetzwerksystem.
DK393887D0 (da)	1987-07-28	Datamatnetsystem
DE3486199T2 (de)	1994-01-20	Werkführungssystem.
DE3280448D1 (de)	1994-02-03	Datenkomprimierungssystem.
DE3483029D1 (de)	1990-09-27	Multiprozessor-system.
DE3787396D1 (de)	1993-10-21	Paralleles Rechnernetzwerk.
DE3486204D1 (de)	1993-09-30	Nachrichtennetzsystem.
DE3484762D1 (de)	1991-08-08	Vermittlungssystem.
DE3484147D1 (de)	1991-04-04	Rechnersystem.
NO167831C (no)	1991-12-11	Hierarkistyring for databehandlingssystem.
DE3682401D1 (de)	1991-12-12	Lokales netzwerksystem.
DE3485159D1 (de)	1991-11-21	Lageuebermittlungssystem.
FI841290A (fi)	1984-10-01	Automatiskt system foer behandling av mineralullsrullar.
DE3486250D1 (de)	1994-01-13	Dateisystem.
FI843713A0 (fi)	1984-09-21	Meddelandeorienterad avbrytningsmekanism foer multiprocessor system.
DE3585462D1 (de)	1992-04-09	Rechnernetzwerk.
NO151754C (no)	1985-05-29	Systemforskaling.
DE3481735D1 (de)	1990-04-26	Rechnersysteme.
FI844086L (fi)	1985-04-19	System foer textdisplay.
FI843445A (fi)	1984-09-03	System foer foerhindring av butiksstoelder.
NL191015C (nl)	1994-12-16	Weeginrichting.
NL191342C (nl)	1995-06-01	Computersysteem.
DE3687800D1 (de)	1993-04-01	Netzwerksystem.