DE29807323U1 - Circuit arrangement for generating a 3D image signal - Google Patents

Circuit arrangement for generating a 3D image signal

Info

Publication number
DE29807323U1
DE29807323U1 DE29807323U DE29807323U DE29807323U1 DE 29807323 U1 DE29807323 U1 DE 29807323U1 DE 29807323 U DE29807323 U DE 29807323U DE 29807323 U DE29807323 U DE 29807323U DE 29807323 U1 DE29807323 U1 DE 29807323U1
Authority
DE
Germany
Prior art keywords
circuit arrangement
data processing
supplied
image
processing device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE29807323U
Other languages
German (de)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PIXALITY COMPUTERSYSTEME GmbH
Original Assignee
PIXALITY COMPUTERSYSTEME GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PIXALITY COMPUTERSYSTEME GmbH filed Critical PIXALITY COMPUTERSYSTEME GmbH
Priority to DE29807323U priority Critical patent/DE29807323U1/en
Publication of DE29807323U1 publication Critical patent/DE29807323U1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/30—Image reproducers
    • H04N13/398—Synchronisation thereof; Control thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/10—Processing, recording or transmission of stereoscopic or multi-view image signals
    • H04N13/106—Processing image signals
    • H04N13/167—Synchronising or controlling image signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/10—Processing, recording or transmission of stereoscopic or multi-view image signals
    • H04N13/189—Recording image signals; Reproducing recorded image signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/10—Processing, recording or transmission of stereoscopic or multi-view image signals
    • H04N13/194—Transmission of image signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/20—Image signal generators
    • H04N13/275—Image signal generators from 3D object models, e.g. computer-generated stereoscopic image signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/20—Image signal generators
    • H04N13/296—Synchronisation thereof; Control thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/30—Image reproducers
    • H04N13/332—Displays for viewing with the aid of special glasses or head-mounted displays [HMD]
    • H04N13/341—Displays for viewing with the aid of special glasses or head-mounted displays [HMD] using temporal multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/20—Image signal generators
    • H04N13/286—Image signal generators having separate monoscopic and stereoscopic modes

Description

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßt The description text was not recorded electronically  

Der Beschreibungstext wurde nicht elektronisch erfaßtThe description text was not recorded electronically

Claims (5)

1. Schaltungsanordnung als Zusatz zu einer Datenverarbei­ tungseinrichtung (20) zur Erzeugung eines einem Bildanzeige­ gerät zuführbaren Videosignals aufgrund der vom Hauptprozes­ sor (21) der Datenverarbeitungseinrichtung zugeführten 3D- Koordinaten,
dadurch gekennzeichnet, daß die Schaltungsanordnung
einen lokalen Prozessor (11), der aus den zugeführ­ ten 3D-Koordinaten zwei unterschiedlich transformierte Koordinatensätze errechnet, die sich um einer stereosko­ pischen Versetzung entsprechende Werte voneinander un­ terscheiden, sowie
zwei 3D-Beschleunigerstufen (12a, 12b) enthält, die anhand jeweils eines der beiden Koordinatensätze Video­ signale für das rechte bzw. das linke Auge aufbauen.1. A circuit arrangement as an addition to a data processing device ( 20 ) for generating a video signal which can be supplied to an image display device on the basis of the 3D coordinates supplied by the main processor ( 21 ) to the data processing device,
characterized in that the circuit arrangement
a local processor ( 11 ), which calculates two differently transformed coordinate sets from the supplied 3D coordinates, which differ from one another by values corresponding to a stereoscopic displacement, and
contains two 3D accelerator stages ( 12 a, 12 b), which build up video signals for the right and left eye using one of the two coordinate sets. 2. Schaltungsanordnung nach Anspruch 1, dadurch gekenn­ zeichnet, daß der lokale Prozessor (11) ein alternierendes Umschaltsignal für eine abwechselnd links/rechts abschaltbare Stereobrille erzeugt und die Ausgangssignale der beiden 3D- Beschleunigerstufen (12a, 12b) synchron mit dem Umschaltsi­ gnal abwechselnd an einem gemeinsamen, an das Bildanzeigege­ rät anschließbaren Digital/Analog-Umsetzer (13a) liegen.2. Circuit arrangement according to claim 1, characterized in that the local processor ( 11 ) generates an alternating switch signal for an alternately left / right switchable stereo glasses and the output signals of the two 3D accelerator stages ( 12 a, 12 b) synchronously with the Umschaltsi signal alternately lie on a common digital / analog converter ( 13 a) that can be connected to the image display unit. 3. Schaltungsanordnung nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß die übrigen, vom Hauptprozessor (21) der Datenverarbeitungseinheit (20) zugeführten Bildinformationen an beiden 3D-Beschleunigerstufen (12a, 12b) unverändert anliegen.3. Circuit arrangement according to claim 1 or 2, characterized in that the remaining, from the main processor ( 21 ) of the data processing unit ( 20 ) supplied image information unchanged at both 3D accelerator stages ( 12 a, 12 b). 4. Schaltungsanordnung nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß ihre sämtlichen Schaltungsteile auf einer Steckkarte (10) zusammengefaßt sind.4. Circuit arrangement according to one of claims 1 to 3, characterized in that all of its circuit parts are combined on a plug-in card ( 10 ). 5. Schaltungsanordnung als Zusatz zu einer Datenverarbei­ tungseinrichtung (20) zur Erzeugung eines einem Bildanzeige­ gerät zuführbaren Videosignals aufgrund der vom Hauptprozes­ sor (21) der Datenverarbeitungseinrichtung zugeführten 3D- Koordinaten, dadurch gekennzeichnet, daß die Schaltungsanordnung eine 3D-Beschleunigerstufe (12a, 12b) mit mehreren Bildspeicher­ bänken (32) enthält, die über eine Schalteinheit (31) so an­ steuerbar sind, daß sich gleichzeitig und über vollständig getrennte Kanäle ein Bild aus einer Bildspeicherbank (32) ausgeben und ein anderes Bild in einer anderen Bildspeicher­ bank aufbauen läßt.5. Circuit arrangement as an addition to a data processing device ( 20 ) for generating an image display device feedable video signal due to the main processor ( 21 ) supplied to the data processing device 3D coordinates, characterized in that the circuit arrangement comprises a 3D accelerator stage ( 12 a, 12 b) with several image memory banks ( 32 ), which can be controlled via a switching unit ( 31 ) in such a way that an image from an image memory bank ( 32 ) can be output simultaneously and via completely separate channels and build up another image in another image memory bank leaves.
DE29807323U 1998-04-22 1998-04-22 Circuit arrangement for generating a 3D image signal Expired - Lifetime DE29807323U1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE29807323U DE29807323U1 (en) 1998-04-22 1998-04-22 Circuit arrangement for generating a 3D image signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE29807323U DE29807323U1 (en) 1998-04-22 1998-04-22 Circuit arrangement for generating a 3D image signal

Publications (1)

Publication Number Publication Date
DE29807323U1 true DE29807323U1 (en) 1999-09-23

Family

ID=8056163

Family Applications (1)

Application Number Title Priority Date Filing Date
DE29807323U Expired - Lifetime DE29807323U1 (en) 1998-04-22 1998-04-22 Circuit arrangement for generating a 3D image signal

Country Status (1)

Country Link
DE (1) DE29807323U1 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4769701A (en) * 1986-07-09 1988-09-06 Siemens Aktiengesellschaft Stereo X-ray installation
US5287437A (en) * 1992-06-02 1994-02-15 Sun Microsystems, Inc. Method and apparatus for head tracked display of precomputed stereo images
EP0751689A2 (en) * 1995-06-29 1997-01-02 Matsushita Electric Industrial Co., Ltd. Stereoscopic image generating apparatus and display therefor
WO1997047142A2 (en) * 1996-06-07 1997-12-11 Philips Electronics N.V. Stereoscopic image display driver apparatus
EP0817125A2 (en) * 1996-06-26 1998-01-07 Matsushita Electric Industrial Co., Ltd. Stereoscopic CG moving image generating apparatus

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4769701A (en) * 1986-07-09 1988-09-06 Siemens Aktiengesellschaft Stereo X-ray installation
US5287437A (en) * 1992-06-02 1994-02-15 Sun Microsystems, Inc. Method and apparatus for head tracked display of precomputed stereo images
EP0751689A2 (en) * 1995-06-29 1997-01-02 Matsushita Electric Industrial Co., Ltd. Stereoscopic image generating apparatus and display therefor
WO1997047142A2 (en) * 1996-06-07 1997-12-11 Philips Electronics N.V. Stereoscopic image display driver apparatus
EP0817125A2 (en) * 1996-06-26 1998-01-07 Matsushita Electric Industrial Co., Ltd. Stereoscopic CG moving image generating apparatus

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Legal Events

Date Code Title Description
R163 Identified publications notified
R207 Utility model specification

Effective date: 19991028

R156 Lapse of ip right after 3 years

Effective date: 20020201