DE2937929C2 - - Google Patents

Info

Publication number
DE2937929C2
DE2937929C2 DE2937929A DE2937929A DE2937929C2 DE 2937929 C2 DE2937929 C2 DE 2937929C2 DE 2937929 A DE2937929 A DE 2937929A DE 2937929 A DE2937929 A DE 2937929A DE 2937929 C2 DE2937929 C2 DE 2937929C2
Authority
DE
Germany
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2937929A
Other versions
DE2937929A1 (de
Inventor
Koichi Hadano Jp Karasaki
Yasuhiko Yokohama Jp Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE2937929A1 publication Critical patent/DE2937929A1/de
Application granted granted Critical
Publication of DE2937929C2 publication Critical patent/DE2937929C2/de
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2806Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/95Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956Inspecting patterns on the surface of objects
    • G01N21/95607Inspecting patterns on the surface of objects using a comparative method
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/302Contactless testing
    • G01R31/308Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
    • G01R31/309Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation of printed or hybrid circuits or circuit substrates
DE19792937929 1979-04-25 1979-09-19 Verfahren und vorrichtung zum pruefen von leiterplatten fuer gedruckte schaltungen Granted DE2937929A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5030679A JPS55142254A (en) 1979-04-25 1979-04-25 Inspecting method for pattern of printed wiring board

Publications (2)

Publication Number Publication Date
DE2937929A1 DE2937929A1 (de) 1980-11-06
DE2937929C2 true DE2937929C2 (de) 1987-03-12

Family

ID=12855204

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19792937929 Granted DE2937929A1 (de) 1979-04-25 1979-09-19 Verfahren und vorrichtung zum pruefen von leiterplatten fuer gedruckte schaltungen

Country Status (5)

Country Link
US (1) US4277175A (de)
JP (1) JPS55142254A (de)
DE (1) DE2937929A1 (de)
FR (1) FR2455423A1 (de)
GB (1) GB2047879B (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10337350B3 (de) * 2003-08-14 2005-11-24 Aleksej Limonow Verfahren und Einrichtung zur Entdeckung und Lokalisierung eines Defektes in einer logischen elektronischen Leiterplatte

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6017044B2 (ja) * 1979-07-23 1985-04-30 株式会社日立製作所 印刷配線板のパタ−ン検査装置
US4343553A (en) * 1979-09-03 1982-08-10 Hitachi, Ltd. Shape testing apparatus
US4405233A (en) * 1980-06-05 1983-09-20 Bell Telephone Laboratories, Incorporated Photo-electric apparatus for testing electrical connector contacts
JPS5788796A (en) * 1980-11-21 1982-06-02 Hitachi Ltd Method of inspecting pattern of printed circuit board
DE3070721D1 (en) * 1980-12-18 1985-07-04 Ibm Process for inspecting and automatically classifying objects presenting configurations with dimensional tolerances and variable rejecting criteria depending on placement, apparatus and circuits therefor
EP0070017B1 (de) * 1981-07-14 1986-10-29 Hitachi, Ltd. Mustererkennungssystem
JPS5867093A (ja) * 1981-10-19 1983-04-21 株式会社東芝 印刷回路基板検査方法及びその装置
JPS59150328A (ja) * 1983-01-28 1984-08-28 Fujitsu Ltd スル−ホ−ル検査装置
US4538909A (en) * 1983-05-24 1985-09-03 Automation Engineering, Inc. Circuit board inspection apparatus and method
DE3422395A1 (de) * 1983-06-16 1985-01-17 Hitachi, Ltd., Tokio/Tokyo Verfahren und vorrichtung zum ermitteln von verdrahtungsmustern
US4666303A (en) * 1983-07-11 1987-05-19 Diffracto Ltd. Electro-optical gap and flushness sensors
JPH0617777B2 (ja) * 1984-06-02 1994-03-09 大日本スクリーン製造株式会社 プリント配線板の撮像方法
EP0195161B1 (de) * 1985-03-14 1993-09-15 Nikon Corporation Gerät und Verfahren zum selbsttätigen Inspizieren von Objekten und zum Identifizieren oder Erkennen bekannter und unbekannter Teile davon, einschliesslich Fehler und dergleichen
US4697142A (en) * 1985-04-01 1987-09-29 Ibm Corporation Printed circuit conductor test system
KR900007548B1 (ko) * 1985-10-04 1990-10-15 다이닛뽕스쿠링세이소오 가부시키가이샤 패턴 마스킹 방법 및 그 장치
US4949390A (en) * 1987-04-16 1990-08-14 Applied Vision Systems, Inc. Interconnect verification using serial neighborhood processors
DE4014149A1 (de) * 1990-05-02 1991-11-07 Grundig Emv Verfahren und vorrichtung zum pruefen von leiterplatten
JP2500961B2 (ja) * 1990-11-27 1996-05-29 大日本スクリーン製造株式会社 プリント基板の座残り検査方法
US6568073B1 (en) * 1991-11-29 2003-05-27 Hitachi Chemical Company, Ltd. Process for the fabrication of wiring board for electrical tests
US6133534A (en) * 1991-11-29 2000-10-17 Hitachi Chemical Company, Ltd. Wiring board for electrical tests with bumps having polymeric coating
JP2795044B2 (ja) * 1992-03-26 1998-09-10 住友電装株式会社 圧着端子画像処理検査における照明方法及び画像処理方法
JP2870379B2 (ja) * 1993-10-18 1999-03-17 住友電装株式会社 連結素子検査方法およびその装置
JP3350477B2 (ja) * 1999-04-02 2002-11-25 セイコーインスツルメンツ株式会社 ウエハ検査装置
EP1559304A4 (de) * 2002-10-01 2007-08-01 Mirtec Co Ltd Sichtprüfvorrichtung unter verwendung eines vollreflexionsspiegels
JP6455029B2 (ja) * 2014-09-01 2019-01-23 大日本印刷株式会社 検査方法及び検査装置
USD967325S1 (en) * 2019-05-27 2022-10-18 Aimpoint Ab Backup sight
US11112351B2 (en) 2019-09-16 2021-09-07 International Business Machines Corporation Partial submersion testing for plating defects
US11162889B2 (en) 2019-09-16 2021-11-02 International Business Machines Corporation Non-destructive testing for plating defects

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2321229A1 (fr) * 1975-08-13 1977-03-11 Cit Alcatel Procede et appareillage pour controle automatique de graphisme
JPS5416668A (en) * 1977-07-08 1979-02-07 Hitachi Ltd Method of detecting excessivee or lackingg holes in print wire board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10337350B3 (de) * 2003-08-14 2005-11-24 Aleksej Limonow Verfahren und Einrichtung zur Entdeckung und Lokalisierung eines Defektes in einer logischen elektronischen Leiterplatte

Also Published As

Publication number Publication date
JPS55142254A (en) 1980-11-06
GB2047879B (en) 1983-08-03
US4277175A (en) 1981-07-07
FR2455423A1 (fr) 1980-11-21
JPS6229737B2 (de) 1987-06-27
FR2455423B1 (de) 1984-06-15
DE2937929A1 (de) 1980-11-06
GB2047879A (en) 1980-12-03

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Legal Events

Date Code Title Description
OAP Request for examination filed
OD Request for examination
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee