DE10335978A1 - Hub-Baustein zum Anschließen von einem oder mehreren Speicherbausteinen - Google Patents
Hub-Baustein zum Anschließen von einem oder mehreren Speicherbausteinen Download PDFInfo
- Publication number
- DE10335978A1 DE10335978A1 DE10335978A DE10335978A DE10335978A1 DE 10335978 A1 DE10335978 A1 DE 10335978A1 DE 10335978 A DE10335978 A DE 10335978A DE 10335978 A DE10335978 A DE 10335978A DE 10335978 A1 DE10335978 A1 DE 10335978A1
- Authority
- DE
- Germany
- Prior art keywords
- address
- memory modules
- hub module
- memory
- module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Debugging And Monitoring (AREA)
Abstract
Die Erfindung betrifft einen Hub-Baustein zum Anschließen von einem oder mehreren Speicherbausteinen über eine jeweilige Speicherbausteinschnittstelle mit einem Adresseingang zum Anschließen des Hub-Bausteins an einen Adressbus und mit einem Adressausgang zum Anschließen an einen weiteren Adressbus, mit einer Adressdecodereinheit, um mit einer an dem Adresseingang anliegenden Adresse einen der angeschlossenen Speicherbausteine zu adressieren oder die anliegende Adresse an den Adressausgang anzulegen, gekennzeichnet durch eine Fehlererkennungseinheit, um mithilfe von bereitgestellten Überprüfungsdaten einen Fehler in einem Speicherbereich des einen oder der mehreren Speicherbausteine zu detektieren.
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10335978A DE10335978B4 (de) | 2003-08-06 | 2003-08-06 | Hub-Baustein zum Anschließen von einem oder mehreren Speicherbausteinen |
EP04763824A EP1652190A1 (de) | 2003-08-06 | 2004-08-05 | Hub-baustein zum anschliessen von einem oder mehreren speich erbausteinen |
PCT/EP2004/008783 WO2005017903A1 (de) | 2003-08-06 | 2004-08-05 | HUB-BAUSTEIN ZUM ANSCHLIEßEN VON EINEM ODER MEHREREN SPEICHERBAUSTEINEN |
KR1020067002526A KR100741044B1 (ko) | 2003-08-06 | 2004-08-05 | 1이상의 메모리 모듈들을 연결하는 허브 구성요소 |
CNA2004800225118A CN1833289A (zh) | 2003-08-06 | 2004-08-05 | 用于连接一个或多个存储器芯片的集线器模块 |
JP2006522318A JP2007501460A (ja) | 2003-08-06 | 2004-08-05 | 1つまたは複数のメモリモジュールを接続するハブコンポーネント |
US11/348,297 US20060190674A1 (en) | 2003-08-06 | 2006-02-06 | Hub chip for connecting one or more memory chips |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10335978A DE10335978B4 (de) | 2003-08-06 | 2003-08-06 | Hub-Baustein zum Anschließen von einem oder mehreren Speicherbausteinen |
Publications (2)
Publication Number | Publication Date |
---|---|
DE10335978A1 true DE10335978A1 (de) | 2005-03-10 |
DE10335978B4 DE10335978B4 (de) | 2006-02-16 |
Family
ID=34177321
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10335978A Expired - Fee Related DE10335978B4 (de) | 2003-08-06 | 2003-08-06 | Hub-Baustein zum Anschließen von einem oder mehreren Speicherbausteinen |
Country Status (7)
Country | Link |
---|---|
US (1) | US20060190674A1 (de) |
EP (1) | EP1652190A1 (de) |
JP (1) | JP2007501460A (de) |
KR (1) | KR100741044B1 (de) |
CN (1) | CN1833289A (de) |
DE (1) | DE10335978B4 (de) |
WO (1) | WO2005017903A1 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8051343B2 (en) | 2004-06-11 | 2011-11-01 | Samsung Electronics Co., Ltd. | Method of testing a memory module and hub of the memory module |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7296129B2 (en) | 2004-07-30 | 2007-11-13 | International Business Machines Corporation | System, method and storage medium for providing a serialized memory interface with a bus repeater |
US7512762B2 (en) | 2004-10-29 | 2009-03-31 | International Business Machines Corporation | System, method and storage medium for a memory subsystem with positional read data latency |
US7331010B2 (en) | 2004-10-29 | 2008-02-12 | International Business Machines Corporation | System, method and storage medium for providing fault detection and correction in a memory subsystem |
US7299313B2 (en) | 2004-10-29 | 2007-11-20 | International Business Machines Corporation | System, method and storage medium for a memory subsystem command interface |
US7478259B2 (en) | 2005-10-31 | 2009-01-13 | International Business Machines Corporation | System, method and storage medium for deriving clocks in a memory system |
US7685392B2 (en) | 2005-11-28 | 2010-03-23 | International Business Machines Corporation | Providing indeterminate read data latency in a memory system |
JP5065618B2 (ja) * | 2006-05-16 | 2012-11-07 | 株式会社日立製作所 | メモリモジュール |
US7594055B2 (en) * | 2006-05-24 | 2009-09-22 | International Business Machines Corporation | Systems and methods for providing distributed technology independent memory controllers |
US7584336B2 (en) * | 2006-06-08 | 2009-09-01 | International Business Machines Corporation | Systems and methods for providing data modification operations in memory subsystems |
US7669086B2 (en) | 2006-08-02 | 2010-02-23 | International Business Machines Corporation | Systems and methods for providing collision detection in a memory system |
US7870459B2 (en) | 2006-10-23 | 2011-01-11 | International Business Machines Corporation | High density high reliability memory module with power gating and a fault tolerant address and command bus |
US7721140B2 (en) | 2007-01-02 | 2010-05-18 | International Business Machines Corporation | Systems and methods for improving serviceability of a memory system |
US8145985B2 (en) * | 2008-09-05 | 2012-03-27 | Freescale Semiconductor, Inc. | Error detection schemes for a unified cache in a data processing system |
CN102257573B (zh) * | 2008-12-18 | 2014-11-05 | 考文森智财管理公司 | 错误检测方法和包括一个或多个存储器设备的系统 |
US9389940B2 (en) | 2013-02-28 | 2016-07-12 | Silicon Graphics International Corp. | System and method for error logging |
CN110442298B (zh) * | 2018-05-02 | 2021-01-12 | 杭州海康威视系统技术有限公司 | 存储设备异常检测方法及装置、分布式存储系统 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020038405A1 (en) * | 1998-09-30 | 2002-03-28 | Michael W. Leddige | Method and apparatus for implementing multiple memory buses on a memory module |
WO2004017162A2 (en) * | 2002-08-16 | 2004-02-26 | Micron Technology, Inc. | System and method for self-testing and repair of memory modules |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4730320A (en) * | 1985-02-07 | 1988-03-08 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device |
US5237566A (en) * | 1989-03-30 | 1993-08-17 | Ungermann-Bass, Inc. | Network hub for maintaining node bandwidth in a single-node network |
US5974058A (en) * | 1998-03-16 | 1999-10-26 | Storage Technology Corporation | System and method for multiplexing serial links |
US6920519B1 (en) * | 2000-05-10 | 2005-07-19 | International Business Machines Corporation | System and method for supporting access to multiple I/O hub nodes in a host bridge |
US6618831B2 (en) * | 2000-12-21 | 2003-09-09 | Intel Corporation | Increasing performance with memory compression |
US7636804B2 (en) * | 2003-04-28 | 2009-12-22 | Quantum Corporation | Data storage and protection apparatus and methods of data storage and protection |
DE112004000821B4 (de) * | 2003-05-13 | 2016-12-01 | Advanced Micro Devices, Inc. | System mit einem Hauptrechner, der mit mehreren Speichermodulen über eine serielle Speicherverbindung verbunden ist |
-
2003
- 2003-08-06 DE DE10335978A patent/DE10335978B4/de not_active Expired - Fee Related
-
2004
- 2004-08-05 KR KR1020067002526A patent/KR100741044B1/ko not_active IP Right Cessation
- 2004-08-05 WO PCT/EP2004/008783 patent/WO2005017903A1/de active Application Filing
- 2004-08-05 CN CNA2004800225118A patent/CN1833289A/zh active Pending
- 2004-08-05 JP JP2006522318A patent/JP2007501460A/ja not_active Abandoned
- 2004-08-05 EP EP04763824A patent/EP1652190A1/de not_active Withdrawn
-
2006
- 2006-02-06 US US11/348,297 patent/US20060190674A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020038405A1 (en) * | 1998-09-30 | 2002-03-28 | Michael W. Leddige | Method and apparatus for implementing multiple memory buses on a memory module |
US6477614B1 (en) * | 1998-09-30 | 2002-11-05 | Intel Corporation | Method for implementing multiple memory buses on a memory module |
US6587912B2 (en) * | 1998-09-30 | 2003-07-01 | Intel Corporation | Method and apparatus for implementing multiple memory buses on a memory module |
WO2004017162A2 (en) * | 2002-08-16 | 2004-02-26 | Micron Technology, Inc. | System and method for self-testing and repair of memory modules |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8051343B2 (en) | 2004-06-11 | 2011-11-01 | Samsung Electronics Co., Ltd. | Method of testing a memory module and hub of the memory module |
Also Published As
Publication number | Publication date |
---|---|
KR20060087505A (ko) | 2006-08-02 |
US20060190674A1 (en) | 2006-08-24 |
EP1652190A1 (de) | 2006-05-03 |
WO2005017903A1 (de) | 2005-02-24 |
KR100741044B1 (ko) | 2007-07-20 |
CN1833289A (zh) | 2006-09-13 |
JP2007501460A (ja) | 2007-01-25 |
DE10335978B4 (de) | 2006-02-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: QIMONDA AG, 81739 MUENCHEN, DE |
|
R081 | Change of applicant/patentee |
Owner name: INFINEON TECHNOLOGIES AG, DE Free format text: FORMER OWNER: QIMONDA AG, 81739 MUENCHEN, DE Owner name: POLARIS INNOVATIONS LTD., IE Free format text: FORMER OWNER: QIMONDA AG, 81739 MUENCHEN, DE |
|
R081 | Change of applicant/patentee |
Owner name: POLARIS INNOVATIONS LTD., IE Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG, 85579 NEUBIBERG, DE |
|
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |