DE10215328A1 - Isolation method for semiconductor devices used in microelectronics comprises a first switch, a second switch and a screen consisting of metal screening element for screening impurity signals between the two switches - Google Patents

Abstract

Semiconductor device comprises a first switch (3), a second switch (5) and a screen for screening impurity signals between the two switches. The screen comprises a screening element (7) made from a metal. An Independent claim is also included for a process for the production of the semiconductor device, comprising growing a silicon crystal in an inert protective atmosphere containing a carbon-containing gas, forming a substrate suitable for the production of semiconductor components, forming a recess in the substrate, filling the trench with an aluminum-containing metal filling, and producing a first switch and a second switch on different sides of the recess. Preferred Features: The screen element extends in the lateral direction and/or vertically. The screening element is formed as a grate.

Description

The invention relates to a semiconductor device with a first and a second circuit in which the one circuit against an interference signal other circuit is shielded.

The progressive integration in microelectronics enables one Reduction of the component dimensions and the novel integration of different Functions in a semiconductor device. By just recently rapid development of technologies in microelectronics, such as the BiCMOS Process and in particular the SiGe: C technology (use of a carbon-containing silicon-germanium alloy in the manufacture of Semiconductor device), it is possible, for example, simultaneously highly complex digital Circuits and less complex but very sensitive analog Unite circuits on a substrate. So far, the analog circuits for high-frequency signal processing in receivers and transmitters, for example in the middle and upper GHz range, implemented in GaAs technology, whereas the corresponding digital signal processors in the cheaper Silicon technology were realized.

The development of higher frequency ranges in silicon technology, especially through the SiGe: C technology, it has now made it digital and analog circuits in a single semiconductor device, particularly one SiGe: C technology based chip to integrate. Integration in one single chip leads to a reduction in the required area and thus to shorter conduction paths, which in turn increases the Working speed of the chip allows. Another advantage of integration is that the expensive GaAs technology can be avoided, which also Reduced power consumption. Due to the integration mentioned therefore increases due to the short distances and reduced power consumption the functionality of the integrated semiconductor device considerably.

However, the benefits of this integration are currently in the state of the art Technology still unsolved problems, such as mutual problems in particular Crosstalk of the signals of the two circuit parts (also called cross talk), in not yet usable in practice. Under crosstalk here is the capacitive or inductive coupling of signals from one circuit as interference signals into the other circuit, where the interference signal is superimposed on the actual signal, Roger that. For example, alternating fields arise in digital circuits Frequency corresponds to the clock frequency of the digital processor. This Alternating fields are generated by the highly sensitive amplifier (Low Noise Amplifier - LNA) of the analog circuit part and amplified so that it too unwanted overlaps with the actual signal of the analog Circuit part comes. Such overlays degrade the signal quality or completely prevent the function of the analog circuit. As a source for Interference signals that are generated in digital circuits come for example voltage controlled oscillators and generators, for example to generate a clock. The crosstalk works especially with small distances between two integrated in one chip Circuits and therefore acts to downsize the structures on the Chip counter.

Approaches to reduce crosstalk are that of each other interfering circuits (e.g. analog and digital circuits) separate, d. H. in two different chips, or in that Keep the distances between the two circuits as large as possible. Another Approach is to isolate the interfering signal between the layers Suppress circuits. Semiconductor devices in which such approaches Find use are z. B. described in EP 0 817 268.

It is an object of the present invention to provide an alternative semiconductor device to provide a digital and an analog circuit part, in which reduces the effects of interference signals.

The object is achieved by a semiconductor device according to claim 1 and a Semiconductor device according to claim 14 solved.

According to the invention, the interference signal according to claim 1 is suppressed by that in a semiconductor device, a shield for shielding from Interference signals are present, which has a shielding element which is a metal includes. The metal of the shielding element suppresses the penetration of the the interference signal generated in one circuit into the other circuit. metal also offers the advantage of high conductivity compared to semiconductor material, without the need to implant foreign atoms. A higher one Conductivity enables due to the associated larger Carrier mobility shields against higher frequencies. Are accordingly the structuring steps involved in an implantation are superfluous. ever after metal, however, the metal atoms must also diffuse into the surrounding semiconductor layers are preserved. It is therefore appropriate to use a metal to choose that is used in the technology used. In the Silicon technology come for example aluminum (Al), aluminum-copper Alloys, tungsten (W) or titanium (Ti) as well as TiW and titanium nitride (TiN) in Question. The high conductivity of metals also allows through With appropriate wiring, currents generated by interference signals can be reliably derived.

The shielding element, and thus also the metal, can be both laterally and also extend in depth in the semiconductor device. It can be done like this implement an "all-round shielding" of a circuit part. The in depth outgoing shielding elements can be in the semiconductor device in the trench Technology, that is, as with metal-filled trenches, what the Integration into existing manufacturing processes easier.

If the shielding element is designed as a grid, a shielding can be made in Realize kind of a Faraday cage. This enables it to be electrically conductive or insulating parts of the circuits between the grid elements pass therethrough. The spacings of the grid elements are advantageously chosen so that the relevant wavelengths of the interference signal do not pass the grating can.

The shielding element can have a floating potential or on a fixed potential, for example ground or supply potential his. The fixed potential enables charges and polarizations of the Influence or avoid the shielding element and its surroundings.

In addition to the metal shielding element, the shielding can also be used accordingly configured parts of the contact and conductor track system and / or Trenches (trenches that are typically used for field isolation between active Areas in a semiconductor substrate) of the circuits and Circuit elements of the circuits include. Circuit elements such as Capacitors and / or coils can act as filters between the circuit parts serve. This allows the spectrum of the interference signal to be limited or it at least certain frequencies can be damped.

In a further embodiment of the invention, the shielding element comprises also an isolator for damping the interference signal. This is particularly so advantageous for interference signals with a high intensity.

In a further embodiment of the invention, the shield is in accordance with Claim 14 as an active shield, that is to say as a controllable component, educated. Active shielding is understood here to mean that the shielding not only based on an absorption of the interference signal, but that one Counter signal circuit is present, which generates a counter signal, with the help of which Interference signal at least at selected locations of the semiconductor device can be suppressed, especially in the shield itself Embodiment, for example, a sensor can be provided that a Detected interference signal, whereupon a reaction to the interference signal is triggered, the leads to suppression of the interference signal. This is the targeted suppression of the Interference signal up to its extinction in sensitive areas Switching the semiconductor device possible. The interference signal is suppressed for example by destructive interference with the counter signal or by a reduction in the conductivity of certain areas of the Semiconductor device, in particular the shield, due to the counter signal.

In a simple embodiment of the active shielding element Frequency of the counter signal given by the clock of the interference source. This lasts the design of the counter signal circuit is low and suitable especially if the interference source is a clock generator in a digital circuit.

To keep the number of additional elements in the semiconductor device small hold, can be configured accordingly parts of the contact and Conductor system as well as circuit elements such as an input capacitor or an oscillating circuit of one or more circuits of the semiconductor device be integrated in the counter signal circuit.

A better adaptation of the counter signal to the interference signal is possible if before generating the counter signal, the interference signal from an evaluation circuit is analyzed. Elements of one or two can also be used in the evaluation circuit several circuits, which are to be protected from the interference signal, integrated his.

The counter signal circuit can be used to generate the counter signal Control circuit and one or more oscillators, one or more clock generators or comprise one or more output stages. To detect the interference signal the counter signal circuit comprises a sensor, for example, in a metal shielding element can be integrated.

The invention can be used both to shield analog circuits Interference signals from digital or analog circuits as well as for shielding of digital circuits against interference signals from digital or analog Circuits are used.

According to a further inventive idea with independent The technical problem underlying the invention is worthy of protection through a semiconductor component with a silicon-containing semiconducting Substrate area in a substrate, the first circuit, a second circuit and one for shielding noise between the first and second Circuit has trained shielding. With this semiconductor device the shield has a shielding element in the form of a trench-shaped Recess with aluminum-containing filling in the substrate area. At the same time it is Substrate area doped with carbon at least in the vicinity of the depression.

For the purposes of the present invention, the terms semiconductor device and Semiconductor component synonymous and are used next to each other.

The present invention has the advantage of undesirable interactions between the first and the second circuit, especially the spread of surface waves between the first and second circuits through the Shielding in the form of the trench-shaped depression prevented or at least is reduced. Such surface waves with high frequencies can from of a first digital source to be considered as a source of interference in this context Circuit are emitted and by their spread to disrupt the Operation of a second, located on the same substrate area lead analog circuit.

This is due to the shielding in the form of a trench-shaped depression metallic, aluminum-containing filling prevented. Under a trench-shaped A depression in the substrate area in the sense of the invention is a depression understand their extension in a first lateral direction (longitudinal direction of the Trench) is larger than in a second, perpendicular to the first Lateral direction (transverse direction of the trench).

For the metallic filling of the trench-shaped depression The semiconductor device according to the invention is according to the invention because of its specific Resistance and the high speed of reaction to high-frequency Influences aluminum provided at least as an alloy component.

There are also possible disadvantages with the use of aluminum connected. As is well known, aluminum diffuses particularly quickly in silicon into it. Aluminum as a Group III element forms an acceptor in silicon. Accordingly, undesired diffusion can affect the electrical properties of the semiconductor change near the aluminum-containing metallic area, beyond also lead to the formation of structural defects. As a result of a reaction from Aluminum and silicon can create so-called spikes, which are crystals that are made from grow out of the aluminum area. This can have undesirable consequences for the Have properties of a silicon-containing semiconductor that is connected to one aluminum-containing metallic area adjacent and required in the prior art either avoiding the use of aluminum or larger ones technological effort to prevent diffusion, which the Manufacturing costs drive to economically unattractive heights. So high-melting, Silicide-forming metals (W, Ti, Ta, Mo) are used or suitable additional layers, for example made of TiN to prevent diffusion. For the Avoiding spikes is identifying and limiting the process to a suitable growth temperature.

However, if this problem were eliminated or increased Effort aluminum predestined for use in shielding electromagnetic interference, especially because of its specific resistance in the contact and trace system of CMOS technology is already a long way off Applies and is particularly well understood technologically.

The present invention resolves this conflict. The substrate area of the semiconductor device according to the invention is at least in the vicinity of Well doped with carbon. Carbon reduces the diffusion of aluminum in silicon or semiconducting silicon-containing materials such as silicon Germanium.

A required doping step in the manufacture of the Semiconductor component can be made in a simple manner before the formation of the recess become. Alternatively, it can also be a substrate already doped with carbon be used.

In the semiconductor component according to the invention, aluminum can also in "lower" metal levels can be used without additional barriers.

However, the invention excludes the use of other functional ones Intermediate layers between the metal-filled depression and the semiconducting one Substrate area not out. Such intermediate layers can be made in a known manner additionally inhibit metal diffusion, for example the diffusion of a metal other metal than aluminum. You can alternatively or additionally one have electronic function, for example act as an isolator. such Intermediate layers can also not contain silicon.

The semiconductor component according to the invention can also be a different one shielding described or already known in this application or a have another shielding element.

The semiconducting substrate region of the invention Semiconductor component that has the trench-shaped depression, however, is fundamental siliceous. That means it consists of either silicon or a semiconducting, silicon-containing alloy such as silicon germanium. The Substrate area can additionally silicon-free sections or sections of different Contain alloy composition and / or doping concentration.

The silicon-containing substrate area of the invention Semiconductor component with the first and the second circuit and the shield can form part of a substrate. A typical example of this case is one SOI structure (silicone-on-insulator). In one embodiment of such Structure is a silicon layer arranged above an insulator layer. The In this example, the circuit is implemented in or on the silicon layer. But also other known SOI structures can be used in the context of the invention come. Laterally, the substrate can also have a greater extent than the silicon-containing substrate area. Other substrate areas with further Known circuits can in the semiconductor device according to the invention be realized on the same substrate.

However, the term substrate area in the sense of the invention is not restrictive to understand that additional on the substrate laterally or in depth Areas with additional circuits or made of other materials must necessarily be provided. Rather, the invention also includes Embodiment that the substrate area is identical to the substrate.

In a preferred embodiment of the invention, the substrate area is in a barrier layer surrounding the depression with a predetermined one Layer thickness doped with carbon. The barrier layer preferably has a layer thickness of between 0.5 and 5 µm, in another Embodiment up to 10 microns.

The layer thickness and the concentration of the carbon introduced are predeterminable parameters which can be varied in the manufacture of the semiconductor component according to the invention in order to optimize the diffusion-inhibiting properties. The concentration of carbon in the layer is in the order of 10 ¹⁹ cm ^-3 in one embodiment.

An embodiment that is particularly simple to manufacture is distinguished characterized in that the entire substrate area is doped with carbon. Nice carbon can be introduced when growing the substrate material. Also when growing the substrate area from the gas phase can by targeted addition of carbon-containing gases to the gas atmosphere of the reactor desired carbon doping can be achieved.

The carbon concentration in the part of the substrate region doped with carbon is, depending on the layer thickness, preferably between 10 ¹⁷ cm ^-3 and 10 ²¹ cm ^-3 . Concentrations up to a maximum of 10 ²⁰ cm ^-3 , for example between 10 ¹⁹ cm ^-3 and 10 ²⁰ cm ^-3 , are particularly preferred.

For effective shielding of surface waves, the trench-shaped Deepening a depth of between 4 and 6 µm. However, such a depth is small compared to the penetration of the fields. In another An exemplary embodiment is therefore a depth between 4 and 10 μm, with a special one Embodiment even provided up to 50 microns. The maximum possible depth is limited by the required stability of the substrate.

In one embodiment of the invention, trenches are formed before the layer build-up formed in the substrate and preserved in the layer structure, so that the depth of the Trenches increases due to the layer structure. In alternative embodiments the trenches are provided only in the substrate or only in the layer structure.

In one embodiment, the width of the trench-shaped depression is particularly effective shielding preferably on the substrate surface 1 µm. Of course, it can also be chosen wider.

The width of the trench can become narrower towards the depth. in principle there are no restrictions on the shape of the cross-sectional profile of the trench-shaped depression. For shielding, it is particularly advantageous if the depression on the substrate surface is sharp. Therefore, the Depression preferably a purely U-shaped or a U-shaped rectangular profile. Alternatively, inclined side walls of the cross-sectional profile are also shown in FIG Deepening, possible in a V-shape. This is less technologically complex. Also a broadening of the cross-sectional profile towards the trench floor is conceivable.

In a preferred embodiment, the profile of the trench is regarding its reflection properties optimized. It can be designed in this way, for example be that the trench for the frequency at which the spurious radiation occurs has maximum intensity, a maximum achievable reflection coefficient having.

The trench-shaped depression surrounds in further exemplary embodiments alternatively, the first or the second circuit in all lateral directions.

Another embodiment provides for improved Shielding a source of interference to arrange a metal layer below the trench. The Metal layer extends in the lateral direction at least over the lateral one Expansion of the first and / or the second circuit. It preferably extends laterally over the extent of the circuit generating the interference radiation.

According to the invention, the substrate is also in the vicinity of the metal layer Carbon doped.

In a preferred exemplary embodiment, the metal layer also exists made of aluminium. However, the same materials can be used here as in the trenches described in more detail above.

In one embodiment, the metal layer can be from the bottom of the or the Trenches must be spaced apart in the depth direction. This embodiment also provides a building between the bottom of the trench and the metal layer electrical field in the substrate material for shielding against interference. An important advantage of the metal-filled trenches is not only in this Connection that they have inductive and capacitive contact also to the conductor track level have and so for a particularly good, if not complete shielding to care.

The filling of the trenches and the metal layer described last can be in have a layer structure in the depth direction. Aluminum is because of its good shielding effect at least in one or more layers the substrate surface included.

The invention particularly enables embodiments in which Aluminum in one or more layers near the bottom of the trench-shaped Deepening is included. This shows the shielding effect of the trench improved.

In a currently particularly preferred embodiment, there is the metallic one Filling made entirely of aluminum. This way it becomes a particularly good one Shielding achieved.

The use of one or more carbon-doped silicon-containing Areas to prevent the diffusion of aluminum is not on the above structures described limited. These are semiconductor devices Characteristics of an overarching and independent protection worthy inventive idea, a semiconductor component with an aluminum-containing first structural element and an adjacent second structural element, which consists of a semiconducting, silicon-containing material, in particular silicon or silicon germanium consists of training so that the second structural element at least in Border area to the first structural element is doped with carbon. The first and second Structural element can in principle have any external shape, in particular each in the form of a layer or line or, as described above, in the form of a trench be trained.

• - Züchten eines Silizium oder Silizium-Germaniumkristalls in einer inerten Schutzatmosphäre, die ein kohlenstoffhaltiges Gas enthält,
• - Herstellen eines für die Produktion von Halbleiterbauelementen geeigneten Substrats aus dem Silizium- oder Silizium-Germanium- Kristall,
• - Ausbilden mindestens einer grabenförmigen Vertiefung in dem Substrat
• - Füllen der Vertiefung mit einer aluminiumhaltigen Metallfüllung
• - Herstellen einer ersten Schaltung und einer zweiten Schaltung auf unterschiedlichen Seiten beiderseits der Vertiefung.

With regard to its method aspect, the technical problem on which the invention is based is solved by a method for producing a semiconductor component described above, with the steps:

• Growing a silicon or silicon germanium crystal in an inert protective atmosphere containing a carbon-containing gas,
• Producing a substrate suitable for the production of semiconductor components from the silicon or silicon germanium crystal,
• - Forming at least one trench-shaped depression in the substrate
• - Fill the recess with an aluminum-containing metal filling
• - Establishing a first circuit and a second circuit on different sides on both sides of the recess.

• - Herstellen eines für die Produktion von Halbleiterbauelementen geeigneten Substrats,
• - Ausbilden mindestens einer grabenförmigen Vertiefung in dem Substrat
• - Beschichtung der Wände der Vertiefung mit einer kohlenstoffdotierten Siliziumschicht
• - Füllen der Vertiefung mit einer aluminiumhaltigen Metallfüllung
• - Herstellen einer ersten Schaltung und einer zweiten Schaltung auf unterschiedlichen Seiten beiderseits der Vertiefung.

An alternative, independently protected solution to the problem is provided by a method for producing a semiconductor component with the features of one of the preceding claims, comprising the steps:

• Manufacture of a substrate suitable for the production of semiconductor components,
• - Forming at least one trench-shaped depression in the substrate
• - Coating the walls of the recess with a carbon-doped silicon layer
• - Fill the recess with an aluminum-containing metal filling
• - Establishing a first circuit and a second circuit on different sides on both sides of the recess.

The step of coating the walls of the recess with one In a preferred embodiment, carbon-containing silicon layer comprises this Method of adding a carbon-containing gas to a source gas.

• - Herstellen eines für die Produktion von Halbleiterbauelementen geeigneten Substrats,
• - Dotierung des Substrats mit Kohlenstoff in mindestens einem vorbestimmten Abschnitt
• - Ausbilden mindestens einer grabenförmigen Vertiefung innerhalb des vorbestimmten Abschnitts
• - Füllen der Vertiefung mit einer Metallfüllung, vorzugsweise Aluminium enthaltend,
• - Herstellen einer ersten Schaltung und einer zweiten Schaltung auf unterschiedlichen Seiten beiderseits der Vertiefung.

Alternatively, the semiconductor component according to the invention can be produced using a method according to an independent, worthy of protection solution, with the steps:

• Manufacture of a substrate suitable for the production of semiconductor components,
• - Doping the substrate with carbon in at least one predetermined section
• - Forming at least one trench-shaped depression within the predetermined section
• Filling the depression with a metal filling, preferably containing aluminum,
• - Establishing a first circuit and a second circuit on different sides on both sides of the recess.

The predetermined portion doped with carbon may be for example around a layer or alternatively around a substrate section with U- or V or trough-shaped profile.

• - Herstellen eines für die Produktion von Halbleiterbauelementen geeigneten Substrats,
• - Herstellen einer ersten Schaltung und einer zweiten Schaltung,
• - Ausbilden mindestens einer grabenförmigen Vertiefung innerhalb des vorbestimmten Abschnitts,
• - Füllen der Vertiefung mit einer aluminiumhaltigen Metallfüllung.

Further alternatively, the semiconductor component according to the invention can be produced using a method comprising the steps

• Manufacture of a substrate suitable for the production of semiconductor components,
• Producing a first circuit and a second circuit,
• Forming at least one trench-shaped depression within the predetermined section,
• - Fill the recess with an aluminum-containing metal filling.

The step of manufacturing the first and second circuits includes in FIG the last-mentioned process including the complete layer structure at least one carbon-doped section (see above) to prevent the Diffusion of metal from the recess. In one embodiment first, a semiconductor layer doped with carbon on the substrate grew up and then the layer structure for the first and the second Circuit made. The carbon-doped semiconductor layer can in different embodiments Si: C or SiGe: C.

Alternatively, the recess can also be used in the production of the carbon-doped Semiconductor layer and / or the layer structure for the circuit become. Finally, the formation of the recess in both the substrate also in the layer structure including a possibly doped carbon doped Semiconductor layer can be made.

Exemplary embodiments with further details of the invention are as follows described in more detail with reference to the accompanying drawings.

Show it:

Fig. 1 shows a first embodiment of the inventive semiconductor device with a metal shield,

Fig. 2 shows a second embodiment of the inventive semiconductor device with a grid-shaped metal shielding member,

Fig. 3 shows a third embodiment of the inventive semiconductor device with a grid-shaped and grounded metallic shield,

Fig. 4 shows a fourth embodiment of the inventive semiconductor device with a shield, including circuit elements of the circuits of the semiconductor device,

Fig. 5 shows a fifth embodiment of the semiconductor device according to the invention with an active shield,

Fig. 6, the counter-signal circuit of Fig. 5,

Fig. 7a-d show various variants of the cross-sectional profile for a grave-shaped shield member,

Fig. 8a is a cross-sectional view of an embodiment of a grave-shaped shield member with a carbon-doped barrier layer in the area of the shielding member and

Fig. 8b is a cross-sectional view of another embodiment of a grave-shaped shielding member.

Fig. 1 shows a first embodiment of the inventive semiconductor device. The semiconductor device comprises a substrate 1 , in particular, but without being limited thereto, a silicon substrate. A first circuit 3 and a second circuit 5 are formed in the substrate 1 . The first circuit can be a digital or an analog circuit. The second circuit can also be a digital or analog circuit. Nor does it have to be two identical, that is two digital or two analog circuits. In the following, the first circuit 3 is intended to represent a circuit to be protected which receives an interference signal; it is therefore run after receiver 3 . In contrast, the second circuit 5 is intended to represent the circuit emitting the interference signal; it is therefore called disturbance 5 below.

According to the invention, there is a metal shielding element 7 in the substrate 1 between the receiver 3 and the interferer 5 , which shields the receiver 3 from the interfering signal emanating from the interferer 5 .

The shielding element 7 can be produced, for example, using trench technology. In other words, for the production of the shielding element 7 , a trench is first etched into the silicon substrate or into the layer structure, which is then filled with metal. If the selected metal tends to diffuse into the semiconductor material surrounding it, the walls of the trenches can be provided with a diffusion-inhibiting layer before the metal is introduced.

According to the invention, silicon can be used as a diffusion-inhibiting layer what carbon is introduced.

If the circuit is formed in an epitaxial semiconductor layer, for example a silicon layer on a semiconductor substrate or an insulator, the metal shielding element advantageously extends as far as the semiconductor substrate or the insulator. In addition, the area in which the receiver 3 is formed can additionally be shielded from interference signals by metallization of the underside of the area and the design of the entire contact and interconnect system as a shield.

A second embodiment of the present invention is shown in FIG. 2. The substrate is not shown. Reference numerals which correspond to those from FIG. 1 designate elements of the semiconductor device which are present in identical form in FIG. 1. This also applies to the other figures.

In the exemplary embodiment shown in FIG. 2, the receiver 3 is laterally completely surrounded by a grid-shaped shielding element 7 A. The grid-shaped shielding element 7 A protects the receiver 3 in the manner of a Faraday cage from the interference signal. The distances between the grating elements in the grating-shaped shielding element are selected such that all relevant wavelengths of the interference signal do not penetrate the shielding element 7 A, but electrically conductive and / or electrically insulating parts of the circuit can be passed through this grating. The shielding effect of the grating can be achieved by choosing the distances between the grating elements to be smaller than the relevant wavelengths of the interference signal. The distances between the grid elements need not be the same in each section of the grid-shaped shielding element 7 A. In each section of the grating, they can be individually adapted to the wavelengths of the interference signal present in the respective section.

FIG. 3 shows a modification of the exemplary embodiment shown in FIG. 2. In this embodiment too, the receiver 3 is surrounded by a grid-shaped shielding element 7 B. In contrast to the grid-shaped shielding element 7 A shown in FIG. 2, the shielding element 7 B shown here is connected to ground in order to avoid electrostatic charging. Instead of being grounded, the grid-shaped shielding element 7 B can be swept to any other potential, for example the supply potential, depending on the requirements. It is also possible to make the potential applied to the grid-shaped shielding element adjustable.

Fig. 4 shows another embodiment of the semiconductor device according to the invention. In this embodiment, in addition to metal shielding 7 C circuit elements 15, 17 of the receiver 3 and the interference source 5, which are grouped around the parts to be protected of the circuits 3, 5, used for the shield. In Fig. 4, on the side of the interferer 5, a capacitor 15 and on the side of the receiver 3, a coil 17 is shown as a shield, which serve as a frequency filter for filtering out a specific frequency or frequencies. The parameters of the circuit elements 15 , 17 can be adapted to the frequencies to be filtered within the scope of what their actual purpose allows in the circuit 3 , 5 .

An embodiment with an active shield is shown in FIG. 5. In addition to the receiver 3 and the interferer 5 , the semiconductor device comprises a counter signal circuit 11 which is connected to an active shielding element 13 . A counter signal to the interference signal is generated by means of the counter signal circuit 11 and is emitted by the active shielding element. The counter signal is such that it interferes destructively with the interference signal at the locations of the receiver 3 that are sensitive to the interference signal, thus reducing or even canceling the interference signal.

To generate the counter signal, the counter signal circuit 11 can use information about the interference signal, such as its frequency, phase and intensity. Such information can be acquired via at least one suitably positioned sensor 110 ( FIG. 6), for example an antenna. A metal shielding element from one of the three first exemplary embodiments can also serve as the sensor 110 or antenna. It is advantageously arranged in the vicinity of the part of the receiver 3 to be protected. The information detected by the sensor 110 is forwarded to a control circuit 112 , which controls a signal generator 114 on the basis of this information. Signal generator 114 may include an oscillator and / or a clock generator to generate oscillating or clocked counter signals. Clocked counter signals can e.g. B. be advantageous if the interference signal comes from the clock generator of a digital interferer. The counter signal is output to the active shielding element 13 , which emits the counter signal, via an output stage 116 (output stage).

The signal generator 114 can generate a static counter signal whose parameters have a fixed value regardless of those of the interference signal, or, if a control circuit 112 is present, a dynamic counter signal whose parameters are varied depending on those of the interference signal. A static counter signal requires less effort to generate than a dynamic counter signal and is suitable for static or only slightly varying interference signals. In contrast, a dynamic counter signal is advantageous in the case of strongly varying interference signals. If not all parameters of the interfering signal vary to the same extent, it is also possible to design the counter signal as a dynamic counter signal only with regard to the widely varying parameters and as a static counter signal with regard to the other parameters. As a result, good suppression of the interference signal can be achieved with relatively little effort when generating the counter signal. By optimizing, the effort for generating the counter signal can be minimized to the minimum necessary effort.

With the active shielding, it is possible to control the interference signal to zero or a value close to zero if the control circuit 112 , which is then a control circuit, is also supplied with the counter signal in addition to the interference signal.

A further possibility for shielding is a dissipative LC element Question, so a circuit that has a capacitor and a coil, for example in the form of a resonant circuit. With such a dissipative LC The energy can be extracted from the interference signal and thus this weaken. In particular, a dissipative LC element made up of components at least one of the circuits to be shielded must be built on it are adapted to attenuate the interference signal.

In Figs. 7a to 7d different embodiments of grave-shaped shielding elements are shown in simplified cross-sectional view. Such shielding elements can be used in a semiconductor component, as shown in FIG. 1. The representation of the entire semiconductor component has been omitted for the sake of simplicity. The profiles are also greatly simplified from other points of view and serve only to represent conceivable trench-shaped shielding elements in the sense of the invention. The shielding elements shown differ in their cross-sectional profile. The same reference numerals in these figures denote otherwise identical structural elements.

A trench 120 in the form of a U-shaped rectangular profile is formed in a silicon or silicon germanium substrate 118 shown in FIG. 7a. The trench 120 can be produced using known methods, in particular trench technology. The trench 120 is filled with a metal filling, in particular an aluminum filling 122, and adjoins the substrate surface 124 in a planar manner. Measures to prevent aluminum from diffusing out into the surrounding substrate areas are not shown in this simplified illustration. These are explained in more detail below with the aid of FIGS. 8a and 8b. The trench 120 has a maximum width of 2 μm. Its depth extension from the substrate surface 124 into the substrate is at least 5 μm.

The trench-shaped shielding element 126 shown in FIG. 7b has a U-shaped profile and is otherwise the same as that from FIG. 7.

Fig. 7c shows a grave-shaped shielding member 128 having a V-profile. The width of the V-profile on the substrate surface 124 is approximately 2 to 3 μm and, at a depth from 5 μm, calculated from the substrate surface at most 1 μm.

FIG. 7d shows a further cross-sectional view of a trench-shaped shielding element with a V-profile, which near the substrate surface is laterally rounded towards the surrounding substrate. The transition from the substrate to the shielding element is "softer" with this profile. This is disadvantageous when it comes to shielding particularly high frequency components from interference signals, but can be useful in applications in which this part of the frequency spectrum does not contribute to the interference. The profiles are for the screening of especially high disturbance frequencies according to Fig. 7a and Fig. 7b particularly suitable because of the sharply defined boundary between the shielding member and the substrate surface.

The absorption spectrum and / or the reflection spectrum of the shielding element for electromagnetic waves in certain limits can be influenced. The choice of the cross-sectional profile of the trench-shaped shielding element depends on the relevant one Interference frequencies from. The training can take place, for example, in such a way that the metal-filled structure reflected waves of interference with the interfere with the incident at least partially destructively. That way reflected rays are used to extinguish interfering radiation.

Figs. 8a and 8b show in the form of two further embodiments of possible measures to prevent the out-diffusion of aluminum from the metal-filled grave shaped recess in the surrounding substrate region. This is shown in both figures using the rectangular profile of FIG. 7a, but can easily be transferred to the profiles according to FIGS. 7b to 7d.

The substrate 118 has in the vicinity of the aluminum-filled trench 120 a barrier layer 132 made of substrate material which is doped with carbon. The carbon concentration in the barrier layer 132 is approximately 10 ²⁰ cm ^-3 . Its thickness from the inner edge of the trench 120 here is approximately 2 μm. A thinner layer of 50 nm thickness can also be used. The carbon doping can be introduced into the substrate 118 by implantation or other known techniques before the trench 120 is formed. The barrier layer 120 in its predetermined shape then arises when the trench is formed.

FIG. 8b shows as a further embodiment, another shielding member in the form of a filled trench 120 aluminum with a rectangular cross-sectional profile. In contrast to FIG. 8a, the trench 120 is here formed in a substrate region 134 which is homogeneously doped with carbon. This can be achieved, for example, by doping with carbon when the substrate material is being grown. Alternatively, the substrate region 134 can be produced in a subsequent epitaxial step with simultaneous or subsequent carbon doping on a non-carbon-doped starting substrate.

In addition to the shields described, the semiconductor device can be further Shields, for example against magnetic and / or optical Interference signals included.

Claims (53)

1. A semiconductor device with a first circuit ( 3 ), a second circuit ( 5 ) and a shield for shielding interference signals between the two circuits ( 3 , 5 ), characterized in that the shielding has at least one shielding element ( 7 ; 7 A; 7 B; 7 C), which comprises metal. 2. The semiconductor device according to claim 1, wherein the shielding element ( 7 ; 7 A; 7 B; 7 C) extends in the lateral direction and / or extends vertically in depth. 3. A semiconductor device according to claim 1 or 2, wherein the shielding element ( 7 ; 7 A; 7 B; 7 C) is implemented in trench technology. 4. A semiconductor device according to any one of claims 1 to 3, wherein the Shielding element is designed as a closed metal surface. 5. Semiconductor device according to one of claims 1 to 3, wherein the shielding element is designed as a grid ( 7 A; 7 B). 6. The semiconductor device according to claim 5, wherein the grating ( 7 A; 7 B) is configured such that the relevant wavelengths of the interference signals do not pass the grating. 7. Semiconductor device according to one of claims 1 to 6, wherein the shielding element ( 7 ; 7 A) has a freely floating potential. 8. Semiconductor device according to one of claims 1 to 6, in which a fixed potential is applied to the shielding element ( 7 B; 7 C). 9. The semiconductor device according to claim 8, wherein the fixed potential is the Is ground potential. 10. The semiconductor device according to claim 8, wherein the fixed potential is the Supply potential is. 11. Semiconductor device according to one of the preceding claims, in which there is at least one shielding element which has a correspondingly configured structure of the contact and / or conductor track system and / or of circuit elements ( 15 , 17 ) of at least one of the circuits ( 3 , 5 ) of the semiconductor device includes. 12. The semiconductor device according to claim 11, in which at least one capacitor ( 15 ) and / or at least one coil ( 17 ) of one of the two circuits ( 3 , 5 ) are used as a filter for filtering the interference signal. 13. The semiconductor device according to one of the preceding claims, in which the shielding element also an isolator for damping the Interference signal includes 14. Semiconductor device with a first circuit ( 3 ), a second circuit ( 5 ) and a shield for shielding interference signals between the two circuits, characterized in that the shield comprises a counter signal circuit ( 11 ) which generates a counter signal which is at least selected locations of the semiconductor device to suppress the interference signal. 15. The semiconductor device according to claim 14, wherein the counter signal circuit ( 11 ) comprises a correspondingly configured structure of the contact and interconnect system of at least one of the circuits ( 3 , 5 ) of the semiconductor device. 16. The semiconductor device according to claim 14 or 15, wherein the counter signal circuit ( 11 ) comprises at least one circuit element of one of the circuits ( 3 , 5 ) of the semiconductor device. 17. The semiconductor device according to claim 16, having a frequency-sensitive Input capacitor and / or a resonant circuit as a circuit element or circuit elements. 18. A semiconductor device according to any one of claims 14 to 17, wherein the Frequency of the counter signal is predetermined by the clock of the interference source. 19. The semiconductor device as claimed in one of claims 14 to 18, in which the counter signal circuit ( 112 ) comprises a signal generator ( 114 ) and / or an output stage ( 116 ) comprising at least one oscillator and / or at least one clock generator. 20. The semiconductor device according to claim 19, having a control circuit ( 112 ) for controlling the signal generator ( 114 ). 21. The semiconductor device according to claim 20 with a sensor ( 110 ) for detecting the frequency and / or phase and / or intensity of the interference signal. 22. The semiconductor device according to one of claims 14 to 21 with a Shielding element according to one of claims 1 to 13. 23. The semiconductor device according to claim 22, wherein the shielding element as Serves sensor. 24. Semiconductor component with a silicon-containing semiconducting Substrate area in a substrate, the first circuit, a second circuit and one for shielding noise between the first and the second circuit has trained shield, thereby characterized in that the shield has a trench-shaped depression has metallic, aluminum-containing filling in the substrate area and that the Substrate area at least in the vicinity of the depression with carbon is endowed. 25. The semiconductor component according to claim 24, characterized in that the substrate area in a barrier layer surrounding the depression is doped with carbon with a predetermined layer thickness. 26. The semiconductor component according to claim 25, characterized in that the barrier layer has a layer thickness of between 0.01 and 2 μm having. 27. The semiconductor component according to claim 26, characterized in that the barrier layer has a layer thickness of at least 0.05 μm. 28. Semiconductor component according to one of claims 24 to 27, characterized characterized in that the entire substrate area is doped with carbon. 29. Semiconductor component according to one of claims 24 to 28, characterized in that the carbon concentration in the part of the substrate region doped with carbon is between 10 ¹⁷ cm ^-3 and 10 ²¹ cm ^-3 . 30. The semiconductor component according to claim 29, characterized in that the carbon concentration in the part of the substrate region doped with carbon is between 10 ¹⁹ cm ^-3 and 10 ²¹ cm ^-3 . 31. The semiconductor component as claimed in claim 30, characterized in that the carbon concentration in the part of the substrate region doped with carbon is approximately 10 ²⁰ cm ^-3 . 32. Semiconductor component according to one of the preceding claims, characterized characterized in that the recess has a depth of at least 2 µm having 33. Semiconductor component according to claim 32, characterized in that the recess has a depth that the mechanical stability of the Guaranteed substrate. 34. Semiconductor component according to claim 32 and 33, characterized in that the recess has a maximum depth between 4 and 50 µm. 35. Semiconductor component according to claim 34, characterized in that the depression has a maximum depth of between 4 and 10 µm. 36. Semiconductor component according to claim 35, characterized in that the depression has a maximum depth of 5 µm. 37. Semiconductor component according to one of the preceding claims, characterized characterized in that the depression on the substrate surface has a width of more than 0.1 µm. 38. Semiconductor component according to claim 38, characterized in that the depression on the substrate surface has a width of 1 µm. 39. Semiconductor component according to one of the preceding claims, characterized characterized in that the recess is U-shaped in cross section. 40. Semiconductor component according to one of claims 24 to 38, characterized characterized in that the recess in cross section is a U-shaped Rectangular profile is. 41. Semiconductor component according to one of claims 24 to 38, characterized characterized in that the recess is V-shaped in cross section. 42. Semiconductor component according to one of the preceding claims, characterized characterized in that the filling in the depth direction is a layered structure has, wherein aluminum at least in one or more layers is contained near the substrate surface. 43. Semiconductor component according to claim 37, characterized in that Aluminum in one or more layers near the bottom of the trench-shaped depression is included. 44. Semiconductor component according to one of the preceding claims, characterized characterized that the filling consists of aluminum. 45. Semiconductor component according to one of claims 24 to 44, characterized characterized in that the substrate area made of silicon and / or silicon Germanium, in particular doped silicon or Silicon germanium. 46. Semiconductor component according to one of claims 24 to 45, characterized characterized in that the entire substrate made of silicon and / or silicon Germanium, in particular doped silicon and / or Silicon germanium. 47. A method for producing a semiconductor component having the features of one of the preceding claims, comprising the steps: Growing a silicon crystal in an inert protective atmosphere containing a carbon-containing gas, Production of a substrate suitable for the production of semiconductor components, - Forming at least one trench-shaped depression in the substrate - filling the recess with an aluminum-containing metal filling, - Production of a first circuit and a second circuit on different sides on both sides of the recess. 48. A method for producing a semiconductor component having the features of one of the preceding claims, comprising the steps: - growing a silicon crystal Production of a substrate suitable for the production of semiconductor components, - Forming at least one trench-shaped depression in the substrate Coating the walls of the recess with a carbon-doped silicon layer, - filling the recess with an aluminum-containing metal filling, - Production of a first circuit and a second circuit on different sides on both sides of the recess. 49. The method according to claim 48, characterized in that the step of Coating the walls of the recess adding a Carbon-containing gas to a source gas includes. 50. A method for producing a semiconductor component having the features of one of the preceding claims, comprising the steps: Manufacture of a substrate suitable for the production of semiconductor components, Doping the substrate with carbon in at least one predetermined section, Forming at least one trench-shaped depression within the predetermined section, Filling the depression with a metal filling, preferably containing aluminum, - Establishing a first circuit and a second circuit on different sides on both sides of the recess. 51. A method for producing a semiconductor component having the features of one of the preceding claims, comprising the steps: Manufacture of a substrate suitable for the production of semiconductor components, Producing a first circuit and a second circuit, a carbon-doped semiconductor layer also being grown, Forming at least one trench-shaped depression within the predetermined section during the production of the first and / or the second circuit, - Fill the recess with an aluminum-containing metal filling. 52. The method according to claim 51, characterized in that the carbon-doped semiconductor layer is grown on the substrate before the further layer structure for the first and / or the second circuit he follows. 53. Semiconductor component with an aluminum-containing first structural element and an adjacent second structural element, which consists of a semiconducting, silicon-containing material, in particular silicon or silicon Germanium exists, characterized in that the second Structural element at least in the border area with the first structural element Carbon is doped.