DE102004016145A1 - Semiconductor chip, has connection contacts electrically connected with its surfaces at back side or top side of redistribution layer utilizing press contacts, where layer is located on main side - Google Patents

Semiconductor chip, has connection contacts electrically connected with its surfaces at back side or top side of redistribution layer utilizing press contacts, where layer is located on main side Download PDF

Info

Publication number
DE102004016145A1
DE102004016145A1 DE200410016145 DE102004016145A DE102004016145A1 DE 102004016145 A1 DE102004016145 A1 DE 102004016145A1 DE 200410016145 DE200410016145 DE 200410016145 DE 102004016145 A DE102004016145 A DE 102004016145A DE 102004016145 A1 DE102004016145 A1 DE 102004016145A1
Authority
DE
Germany
Prior art keywords
layer
electrically connected
semiconductor chip
connection contacts
redistribution layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE200410016145
Other languages
German (de)
Inventor
Herbert Benzinger
Georg Erhard Eggers
Aurel Von Campenhausen
Stephan Schroeder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE200410016145 priority Critical patent/DE102004016145A1/en
Publication of DE102004016145A1 publication Critical patent/DE102004016145A1/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED

Abstract

The chip (1) has a component whose connection contacts (5) are located on a main side of a body of the chip. The connection contacts are electrically connected with its surfaces at a back side or a top side of a redistribution layer using a press contact, where the layer is located on the main side. A conducting strip is provided between one end of the press contact and the contact surfaces.
DE200410016145 2004-04-01 2004-04-01 Semiconductor chip, has connection contacts electrically connected with its surfaces at back side or top side of redistribution layer utilizing press contacts, where layer is located on main side Ceased DE102004016145A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE200410016145 DE102004016145A1 (en) 2004-04-01 2004-04-01 Semiconductor chip, has connection contacts electrically connected with its surfaces at back side or top side of redistribution layer utilizing press contacts, where layer is located on main side

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE200410016145 DE102004016145A1 (en) 2004-04-01 2004-04-01 Semiconductor chip, has connection contacts electrically connected with its surfaces at back side or top side of redistribution layer utilizing press contacts, where layer is located on main side

Publications (1)

Publication Number Publication Date
DE102004016145A1 true DE102004016145A1 (en) 2005-10-20

Family

ID=35034044

Family Applications (1)

Application Number Title Priority Date Filing Date
DE200410016145 Ceased DE102004016145A1 (en) 2004-04-01 2004-04-01 Semiconductor chip, has connection contacts electrically connected with its surfaces at back side or top side of redistribution layer utilizing press contacts, where layer is located on main side

Country Status (1)

Country Link
DE (1) DE102004016145A1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5426072A (en) * 1993-01-21 1995-06-20 Hughes Aircraft Company Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate
EP0860876A2 (en) * 1997-02-21 1998-08-26 Daimler-Benz Aktiengesellschaft Arrangement and method for manufacturing CSP-packages for electrical components
DE20208866U1 (en) * 2001-08-24 2003-01-09 Schott Glas Contacted and packaged integrated circuit
WO2003005143A2 (en) * 2001-07-06 2003-01-16 Koenig & Bauer Aktiengesellschaft Labeling of objects

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5426072A (en) * 1993-01-21 1995-06-20 Hughes Aircraft Company Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate
EP0860876A2 (en) * 1997-02-21 1998-08-26 Daimler-Benz Aktiengesellschaft Arrangement and method for manufacturing CSP-packages for electrical components
WO2003005143A2 (en) * 2001-07-06 2003-01-16 Koenig & Bauer Aktiengesellschaft Labeling of objects
DE20208866U1 (en) * 2001-08-24 2003-01-09 Schott Glas Contacted and packaged integrated circuit

Similar Documents

Publication Publication Date Title
TW200739941A (en) Nitride semiconductor device
TW200620657A (en) Recessed semiconductor device
TW200608588A (en) Structures and methods for heat dissipation of semiconductor integrated circuits
WO2006094025A3 (en) Fabricated adhesive microstructures for making an electrical connection
WO2007011544A3 (en) Electronically connecting substrate with electrical device
WO2007109492A3 (en) Low profile semiconductor package-on-package
MY122959A (en) Stacked microelectronic packages
DK1772900T3 (en) Manufacturing method for a device with power semiconductor components comprising a pressure sintering step
TW200711065A (en) Semiconductor device and manufacturing method thereof
WO2004071700A3 (en) Room temperature metal direct bonding
TW200627563A (en) Bump-less chip package
TW200627561A (en) Chip package
TW200608851A (en) Substrate, semiconductor device, substrate fabricating method, and semiconductor device fabricating method
TW200610458A (en) Circuit board and method for the production of such a circuit board
TW200616169A (en) Wiring board and semiconductor device
FR2865073B1 (en) ELECTRICAL CONNECTION DEVICE FOR MAKING A METALLIZATION POINT, SUPPORT EQUIPPED WITH SUCH A CONNECTION DEVICE, AND AIRCRAFT EQUIPPED WITH SUCH A SUPPORT
WO2009008416A1 (en) Semiconductor light-emitting device
WO2009013826A1 (en) Semiconductor device
TW200625561A (en) Semiconductor device
TW200723482A (en) Integrated circuit having bond pad with improved thermal and mechanical properties
TW200746330A (en) Microelectronic assembly with back side metallization and method for forming the same
WO2006083383A3 (en) Low temperature grown insulated gate phemt device
SG128597A1 (en) Semiconductor device and manufacturing method of the same
TW200715424A (en) Semiconductor device and method of manufacturing the same
WO2006050449A3 (en) Low cost power mosfet with current monitoring

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8131 Rejection