CN201146536Y

CN201146536Y - MVB-WORLDFIP gateway based on ARM7CPU nucleus

Info

Publication number: CN201146536Y
Application number: CNU2007200157111U
Authority: CN
Inventors: 宁寿辉; 吴涛
Original assignee: China CNR Corp Ltd
Current assignee: CRRC Dalian R&D Co Ltd
Priority date: 2007-11-06
Filing date: 2007-11-06
Publication date: 2008-11-05
Anticipated expiration: 2017-11-06

Abstract

The utility model discloses an MVB-WORLDFIP gateway based on an ARM7CPU nuclear. The utility model is characterized by comprising an MVB board, a WORLDFIP board and a peripheral circuit which are connected with each other by an internal parallel bus; the gateway is responsible for the conversion between MVB data stream and WORLDFIP data stream; the data stream of an MVB device in a locomotive field is transmitted to the MVB board of the gateway by an MVB bus interface and an MVB controller, is transmitted to the WORLDFIP board by the parallel bus of the gateway after a protocol transformation and then is sent to an WORLDFIP device in the locomotive field; otherwise, the data stream of the WORLDFIP device in the locomotive field is transmitted to the WORLDFIP board of the gateway by a WORLDFIP bus interface and a WORLDFIP controller, is transmitted to the MVB board by the parallel bus of the gateway after the protocol transformation and then is sent to the MVB device in the locomotive field.

Description

MVB-WORLDFIP gateway based on ARM7 CPU nuclear

Technical field

The utility model relates to the network control based on WORLDFIP fieldbus and MVB multifunction vehicle bus, is mainly concerned with a kind of novel MVB-WORLDFIP gateway that is used for carrying out between two kinds of different fieldbus exchanges data based on ARM7CPU nuclear.

Background technology

In recent years along with the fast development of railway systems, fieldbus is because its reliability height, cost is low, failure rate is low etc., and advantage makes it use more and more widely.As the network communication standard of Chinese Railway rail vehicle, the TCN bus is occupied very big proportion in field of track traffic, and especially in field of track traffic such as locomotive, motor-car, subways, the application of TCN bus is especially extensive.The WorldFIP network also is widely used in field of track traffic at present as a kind of network that designs for industrial field bus specially.Under the situation of multiple fieldbus product coexistence, realize that the exchanges data between various dissimilar fieldbus products becomes the current problem that we need urgently solve.The design is exactly at this application, has adopted ARM7CPU to design a kind of low cost, high performance MVB-WORLDFIP gateway.

TCN TCN connects vehicle-mounted programmable device on the rail vehicles, and it comprises the two-stage bus: WTB bus and MVB bus.Multifunction vehicle bus MVB is as connecting in-vehicle device, and the vehicle bus that connects each vehicle arrangement in the integral train group, because its reliability, flexibility and adopted by more and more countries in the world.The MVB bus adopts Manchester's code, and the MVB communication is supported three types data: process data, message data and monitoring data by a bus master system.

The WorldFIP network is a kind of network that designs for industrial field bus specially, since its real-time, synchronism, reliability, the present high reliability fieldbus networks that has become a kind of a large amount of uses.With the TCN network class seemingly, WorldFIP uses the transmission of Difference Manchester sign indicating number, and adopts master-slave mode.Network is made up of moderator and some subscriber stations.WorldFIP uses information producer and consumer's notion, and each subscriber station can have a plurality of producer/consumer variableses.Whenever, the producer can only have one, and the consumer can be one or more.

Summary of the invention

The utility model has been researched and developed a kind of compatible high, novel in design, strong MVB-WORLDFIP gateway that is used for carrying out exchanges data between different fieldbus products of flexibility at the problem of present existence.Technical solution of the present utility model is as follows:

A kind of MVB-WORLDFIP gateway that is used for exchanges data is characterized in that comprising MVB integrated circuit board, WORLDFIP integrated circuit board and peripheral circuit, and described MVB integrated circuit board is connected by inner parallel bus with the WORLDFIP integrated circuit board; Described MVB-WORLDFIP gateway is responsible for the conversion of MVB and WORLDFIP data flow, on the one hand, the MVB data flow of the on-the-spot MVB equipment of locomotive is sent to the MVB integrated circuit board of gateway by MVB bus network interface and MVB controller, through protocol translation, inside parallel bus by gateway is sent to the WORLDFIP integrated circuit board, is sent to the WORLDFIP equipment at locomotive scene again; On the other hand, the WORLDFIP data flow of the on-the-spot WORLDFIP equipment of locomotive is sent to the WORLDFIP integrated circuit board of gateway by WORLDFIP bus network interface and WORLDFIP controller, through protocol translation, inside parallel bus by gateway is sent to the MVB integrated circuit board, is sent to the MVB equipment at locomotive scene again.

Described MVB integrated circuit board comprises MVB unit and CPU, is the hardware platform of operation real-time protocol (RTP) stack software and MVB link software.Described CPU comprises cpu central processing unit NET+50, memory cell, RS232 serial communication interface, ethernet communication mouth; Described MVB unit comprises MVB protocol controller MVBCS01, MVB bus network interface.

Described WORLDFIP integrated circuit board comprises WORLDFIP unit and CPU, is the hardware platform of operation WORLDFIP software.Described CPU comprises cpu central processing unit NET+50, memory cell, RS232 serial communication interface, ethernet communication mouth; Described WORLDFIP unit comprises communication controler FULLFIP2, medium Redundant Control device FIPDUAL, bus driver device FIELDRIVE and Signal Spacing transformer FIELDTR.

Compared with prior art, the beneficial effects of the utility model show for adapt to exchanges data between various dissimilar fieldbus products provide a kind of compatible good based on having of ARM7, flexibility is good and new network product cheaply.

Description of drawings

Fig. 1 MVB-WORLDFIP gateway structure chart;

Fig. 2 MVB integrated circuit board hardware structure diagram;

Fig. 3 WORLDFIP integrated circuit board hardware structure diagram;

In the drawings: 1, MVB-WORLDFIP gateway, 2, MVB integrated circuit board, 3, WORLDFIP integrated circuit board, 4, the NET+50CPU CPU, 5, the MVB protocol controller, 6, MVB bus network interface, 7, WORLDFIP protocol controller, 8, WORLDFIP bus network interface, 9, the RS-232 communication port, 10, memory cell, 11, the ethernet communication mouth.

Embodiment

MVB-WORLDFIP gateway of the present utility model is mainly used in the field control of track traffic and industry spot, below its working mechanism and relevant emphasis circuit is elaborated.

Gateway is finished the function of two aspects, on the one hand, the MVB-WORLDFIP gateway is image data from the MVB equipment at locomotive or scene, be sent to the MVB integrated circuit board through MVB bus network interface, through protocol translation, inside parallel bus by gateway is sent to the WORLDFIP integrated circuit board, is sent to the WORLDFIP equipment at locomotive scene again; On the other hand, the MVB-WORLDFIP gateway is image data from the WORLDFIP equipment at locomotive or scene, is sent to the WORLDFIP integrated circuit board through WORLDFIP bus network interface, through protocol translation, inside parallel bus by gateway is sent to the MVB integrated circuit board, is sent to the MVB equipment at locomotive scene again.Realized the exchanges data between MVB data flow and the WORLDFIP data flow like this.

As shown in Figure 1, MVB-WORLDFIP gateway 1 is made up of the two boards card, comprises MVB integrated circuit board 2 and WORLDFIP integrated circuit board 3.The MVB integrated circuit board comprises parts such as NET+50 CPU 4, MVB protocol controller 5, MVB bus network interface 6, and the WORLDFIP integrated circuit board comprises parts such as NET+50 CPU 4, WORLDFIP protocol controller 7, WORLDFIP bus network interface 8.

As shown in Figure 2, MVB integrated circuit board hardware comprises NET+50 CPU 4, MVB protocol controller 5, MVB bus network interface 6, RS-232 communication port 9, memory cell 10, ethernet communication mouth 11 compositions.

NET+50 CPU 4 be a based on the ARM7TDMI kernel pure 32 high-performance embedded risc processors, it supports 32,24,16 and 8 bit data bus.High primary frequency can reach 130MHz.Adopt 3 grades of instruction pipelines.Use single 32 bit data bus move instruction and data.Data access to memory is supported 8,16, and 32.This chip mainly contains following feature resource: the complete 10/100BaseT Ethernet MAC that has the MII interface; 10 passage dma controllers; 2 HDLC/UART/SPI serial ports fully independently; The P1284/ENI/GPIO interface is shared pin; 2 27 programmable timers independently; 5 independently programmable chip choosings; Support synchronous and asynchronous peripheral sequential; Support all SRAM, FD/ED0DRAM, SDRAM, FLASH, EEPROM; Support real time operating system widely, as Nucleus, VxWorks, pSOS etc.

MVB protocol controller 5 adopts the MVBCS01 communication controller, this controller is the special chip at rolling stock level network communication design, be responsible for the following function of link layer in the MVB agreement, major function is the MVB data stream format that process data, message data, monitoring data that controller will transmit is converted to the TCN network protocol specifies, deliver to the MAU transceiver unit or the signal resolution of sending here on the MAU transceiver unit is become the MVB data stream format of standard, and send the agreement upper strata to, for its use.

MVB bus network interface 6 is the redundant network interface, form by MVB transceiver and MVB connector, the task of MVB transceiver is that MVB external circuit signal is sent into the MVB protocol controller and/or the signal of MVB controller output is sent into the MVB network, and the MVB connector is realized and extraneous physical connection.

As shown in Figure 3, WORLDFIP integrated circuit board hardware comprises NET+50 CPU 4, WORLDFIP protocol controller 7, WORLDFIP bus network interface 8, memory cell 10 compositions.

WorldFIP communication protocol controller 7 is selected FULLFIP2 for use, it can realize the WorldFIP fieldbus overwhelming majority's connection and application protocol, comprise data link layer cycle and aperiodic buffering transmission and information service, have the bus arbitration function, comprise prompting, refresh and synchronization mechanism.In case this chip configuration successful, it can finish relevant network function alone, and deposit related data in own memory, call for the user, and CPU is responsible for moving application software.

WORLDFIP bus network interface 8 is the redundant network interface, be made up of FIP bus driver and FIP isolating transformer, the task of FIP isolating transformer is WorldFIP external circuit signal to be isolated through magnetic send into the FIP bus driver and/or the signal of FIP bus driver is sent into the WorldFIP network through high frequency transformer.

Claims

1, a kind of MVB-WORLDFIP gateway (1) based on ARM7CPU nuclear is characterized in that comprising MVB integrated circuit board (2), WORLDFIP integrated circuit board (3), and is connected by inner parallel bus; Wherein said MVB integrated circuit board (2) is made up of NET+50CPU CPU (4), MVB protocol controller (5) and MVB bus network interface (6), and described WORLDFIP integrated circuit board (3) is made up of NET+50CPU CPU (4), WORLDFIP protocol controller (7) and WORLDFIP bus network interface (8); NET+50CPU CPU (4) is the core of whole gateway, and its effect mainly is a work schedule of being responsible for control MVB protocol controller (5) and WORLDFIP protocol controller (7), and the generation of MVB, WORLDFIP data flow; Described MVB-WORLDFIP gateway (1) is responsible for the conversion of MVB and WORLDFIP data flow, on the one hand, the MVB data flow of the on-the-spot MVB equipment of locomotive is sent to the MVB integrated circuit board (2) of gateway by MVB bus network interface (6) and MVB controller (5), through protocol translation, inside parallel bus by gateway is sent to WORLDFIP integrated circuit board (3), is sent to the WORLDFIP equipment at locomotive scene again; On the other hand, the WORLDFIP data flow of the on-the-spot WORLDFIP equipment of locomotive is sent to the WORLDFIP integrated circuit board (3) of gateway by WORLDFIP bus network interface (8) and WORLDFIP controller (7), through protocol translation, inside parallel bus by gateway is sent to MVB integrated circuit board (2), is sent to the MVB equipment at locomotive scene again.

2, the MVB-WORLDFIP gateway based on ARM7CPU nuclear according to claim 1, it is characterized in that described MVB unit comprises MVB procotol controller (5) and redundant MVB interface circuit (6), described MVB procotol controller (5) is made of special chip, be used for the information of its reception is decoded the communication interface function of storage and realization and CPU element; Described MVB bus interface circuit (6) then is used to realize the transmission of data in link layer and/or physical layer.

3, the MVB-WORLDFIP gateway based on ARM7CPU nuclear according to claim 1, it is characterized in that described WORLDFIP unit comprises WORLDFIP procotol controller (7) and redundant WORLDFIP bus network interface circuit (8), described WORLDFIP procotol controller (7) is made of special chip, be used for the information of its reception is decoded the communication interface function of storage and realization and CPU element; Described redundant interface circuit (8) then is used to realize the transmission of data in link layer and/or physical layer.