CN1965298A - 用于管理奇偶raid数据重建的方法、系统和程序 - Google Patents

用于管理奇偶raid数据重建的方法、系统和程序 Download PDF

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CN1965298A
CN1965298A CNA2004800391368A CN200480039136A CN1965298A CN 1965298 A CN1965298 A CN 1965298A CN A2004800391368 A CNA2004800391368 A CN A2004800391368A CN 200480039136 A CN200480039136 A CN 200480039136A CN 1965298 A CN1965298 A CN 1965298A
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M·施米索伊尔
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Intel Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G06F11/1088—Reconstruction on already foreseen single or plurality of spare disks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00—Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/10—Indexing scheme relating to G06F11/10
    • G06F2211/1002—Indexing scheme relating to G06F11/1076
    • G06F2211/1009—Cache, i.e. caches used in RAID system with parity
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00—Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/10—Indexing scheme relating to G06F11/10
    • G06F2211/1002—Indexing scheme relating to G06F11/1076
    • G06F2211/1054—Parity-fast hardware, i.e. dedicated fast hardware for RAID systems with parity

Abstract

提供一种用于构建数据的方法、系统和程序，包括重建组织成允许数据重建的数据组织类型例如独立盘冗余阵列(RAID)组织的数据。在一个实施例中，将数据块从存储在存储单元例如RAID阵列中的盘驱动器上的数据条带传送到存储处理器的逻辑引擎，旁路存储处理器的高速缓存。在每个数据块从盘驱动器传送时，存储队列对该数据块执行逻辑操作，例如“异或”，以从条带重建数据块。重建的数据块随后可传送到RAID阵列的盘驱动器，以替代RAID阵列上数据条带中丢失的数据块，或替代老奇偶数据块。

Description

用于管理奇偶RAID数据重建的方法、系统和程序
技术领域
实施例涉及在数据组织系统例如RAID系统中管理数据的方法、系统和程序。
背景技术
已提出了许多技术用于组织存储在存储设备例如盘驱动器中的数据。一个这种数据存储组织称为独立(或廉价)盘冗余阵列或(RAID)。在RAID组织中，两个或更多个盘驱动器配合使用，以改进容错或性能，或二者。有不同类型的RAID数据存储组织，并且这些不同的类型常称为RAID 0级、1级、2级...。
例如，在RAID 0级数据组织中，使用户文件数据成“条带”状，即，用户数据块分布在多个盘上以改进性能。但是，在RAID 0级数据组织中，如果其中一个驱动器失效，则通常没有提供冗余作数据恢复。RAID 3级数据组织与RAID 0级类似，但通常保留有一个盘来存储纠错数据，常常称为“奇偶数据”。如果一个驱动器失效，则该奇偶数据就可用来重建丢失的用户数据。在RAID 5级数据组织中，为盘驱动器阵列上的每个条带提供有奇偶数据，且没有特定的盘驱动器专门用来存储奇偶数据。而是，用于用户数据条带的奇偶数据块分布在该阵列的所有盘上，以进一步改进性能。
在一个RAID-5组织中，有一个奇偶数据块用于盘驱动器阵列上的每个条带。如果一个驱动器失效，那么这种布置提供简便的数据重建。例如，如果一个数据条带包括四个数据块和一个奇偶数据块，如果由于驱动器故障、数据破坏或其它类型故障，条带的一个数据块丢失，则使用条带中仍保持完好的四个块就可重建丢失的块。
图1示出现有技术为重建丢失数据可执行的逻辑操作的一个实例。如果数据条带n有四个数据块和一个奇偶数据块，且条带n中一个块的数据丢失了，则使用条带n中三个好数据块的一个好数据子块以及好奇偶数据块的一个好奇偶数据子块就可重建丢失的数据。因此，在图1的实例中，对条带n中一个好数据块的第一好数据子块30和条带n中第二好数据块的第二好数据子块32执行“异或”操作。“异或”逻辑操作的结果可与条带n中第三好数据块的另一好数据子块33进行“异或”。这次“异或”逻辑操作的结果可与条带n的好奇偶数据块中的好奇偶数据子块34进行“异或”，以重建数据子块36，来替代丢失的数据子块。如果条带的整个数据块丢失了，则对于该块的每个子块重复图1的操作，就可重建整个块。
图2示出按照图1逻辑操作用于重建RAID存储单元丢失数据的RAID存储处理器的现有技术逻辑引擎50的实例。逻辑引擎50具有存储队列52，其可对存储队列52的内容执行“异或”逻辑操作，如箭头54所表示，并在其输入端给出数据，如箭头56表示。英特尔80303集成电路芯片具有类似的逻辑引擎，称为应用加速器单元(AAU)。
图3示出在重建数据中使用逻辑引擎50读出数据和处理所读数据的操作。在复位(过程框60)存储队列52后，在第一读出操作63(图2)中，可将好数据块从RAID阵列66中盘驱动器64a的条带n中读(过程框62)到存储处理器或控制器的局部内存68中。在第二读出操作70中，可将另一好数据块从RAID阵列66中盘驱动器64b的条带n中读(过程框62)到存储处理器或控制器的局部内存68中。在第三读出操作72中，可将第三好数据块从RAID阵列66中盘驱动器64c的条带n中读(过程框62)到局部内存68中。在第四读出操作74中，可将一个好奇偶数据块从RAID阵列66中盘驱动器64e的条带n中读(过程框62)到局部内存68中。
一旦所有好的数据块和奇偶数据块都已从条带读出(过程框80)，在一部分第五读出操作84中从盘驱动器64a读出的数据子块就可从局部内存68读出(过程框82)，并存储在存储队列52中。该数据例如可以是图1的数据子块30。由于存储队列52之前已复位，所以通过对从局部内存68读出的数据30和存储队列52的复位内容执行“异或”操作，源自驱动器64a的数据30就可存储在存储队列52中。从局部内存68到逻辑引擎50的读出操作的大小通常取决于存储队列52的容量。因此，如果例如存储队列52的容量是1K字节，则读出操作84会继续执行，直到存储队列52填满1K字节的数据30为止。
条带n中下一数据块的子块，即从盘驱动器64b读出的数据块的子块，可在一部分第六读出操作90中从局部内存68中读出(过程框86)。该数据例如可以是图1的数据子块32。从驱动器64b读出的数据块的数据子块32与以前存储在存储队列52中的数据子块30进行“异或”(过程框88)，并作为中间结果存储在存储队列52中。
条带n中下一数据块的子块33(图1)，即从盘驱动器64c读出的数据块的子块，可在一部分第七读出操作92中从局部内存68中读出(过程框86)。从驱动器64c读出的数据块的数据子块33与存储队列52的内容进行“异或”操作(过程框88)，并作为中间结果存储在存储队列52中。
条带n中数据的奇偶数据块的子块34(图1)，即从盘驱动器64e读出的数据块的子块，可在一部分第八读出操作94中从局部内存68中读出(过程框86)。从驱动器64e读出的奇偶块的奇偶数据子块34与存储队列52的内容进行“异或”操作(过程框88)，并作为中间结果存储在存储队列52中。
一旦条带n中好的数据块和奇偶数据块的所有对应子块都已被接收和处理(过程框95)，存储在存储队列52中的中间结果就是条带n的重建子块36，它可在一部分写入操作96中被写入(过程框96)局部内存68，要在随后的写入操作97中写入到盘驱动器64d，来替代丢失的子块。
可对条带n中数据块的每个子块重复图3的过程，直到所有子块都已被逻辑引擎50接收(过程框98)和处理，其中如果需要，条带n的整个块可被重建。而且，如果驱动器64d的所有数据例如都已丢失，则该过程可以对盘驱动器阵列66的每个条带重复，直到损坏的盘驱动器64d的每个块都已重建为止。当在RAID类型数据组织中用新数据更新老数据时，构建新奇偶数据的过程也类似。
尽管如此，业界一直有一种需要，要改进数据存储组织中处理器的性能。
附图说明
现参阅附图，所有附图中相同的参考编号表示对应的部件：
图1示出现有技术的RAID数据重建；
图2示出用于RAID数据重建的现有技术逻辑引擎；
图3示出使用图2现有技术逻辑引擎重建数据的现有技术操作；
图4示出实现数据构建方面的计算环境的一个实施例；
图5示出实现数据构建方面的存储处理器环境的一个实施例；
图6示出按照数据构建方面用于图5存储处理器的逻辑引擎的一个实施例；
图7示出重建数据所执行操作的一个实施例；
图8示出用于重建数据块的数据块；
图9示出重建数据所执行操作的另一实施例；
图10示出构建奇偶数据所执行操作的另一实施例；以及
图11示出可与所述实施例一起使用的体系结构。
具体实施方式
在以下说明中，参阅附图，其中附图形成本发明的一部分，并示出几个实施例。应理解，可使用其它实施例，并可作结构和操作改变。
图4示出可以实现数据构建方面的计算环境。计算机102包括一个或多个中央处理单元(CPU)104(仅示出一个)、内存106、非易失性存储器108、存储处理器109、操作系统110以及网络适配器112。应用程序114还在内存106中执行，并能够从存储器108中读出数据和向其写入数据。计算机102可包括业界已知的任何计算设备，例如：大型机、服务器、个人计算机、工作站、膝上型电脑、手持计算机、电话设备、网络设备、虚拟化设备、存储处理器、存储控制器等等。业界已知的任何CPU104和操作系统110都可使用。作为内存管理操作的一部分，内存106中的程序和数据可交换到存储器108中。计算机102可通过网络适配器112与网络118通信。
设备驱动程序120在内存106中执行，并包括存储处理器特定命令，以与存储处理器109以及操作系统110和存储处理器109之间的接口通信。存储器108包括多个盘存储单元，例如即盘驱动器150a、150b...150n，其中数据可存储为允许数据重建的组织类型。在图示的实施例中，盘驱动器150a、150b...150n组织成RAID阵列151。
在某些实现中，存储处理器109执行某些操作，以协助计算机102从存储器108中读出数据和向其写入数据。例如，存储处理器109可具有软件、固件或硬件或它们的组合，以将LBA地址从计算机102转换成盘驱动器150a、150b...150n的柱面、磁头和扇区规范。此外，存储处理器109包括数据构建管理器130，它在驱动器故障或其它数据丢失时管理数据的重建。另外，在用新数据更新老数据时，构建管理器130可管理新奇偶数据的构建。
图5示出适当存储处理器109的一个实例。存储处理器109便于在主机102和存储器108之间快速移动大量数据。存储处理器109包括电桥160，它在主机102的主总线162和连接到存储器108的存储控制器166的次总线164之间。电桥160允许例如可以是串行-高级技术附件(SATA)控制器的存储控制器166与主总线162物理隔离。控制器166还可将计算机信息转到将存储处理器109连接到存储器108的存储接口。虽然存储控制器166示为存储处理器109的一部分，但存储控制器166可以是存储器108的一部分，或是一个分离单元。
主地址转换单元168提供从主总线162通过局部总线174到处理器170和局部内存172的高通过量数据通路。连接到局部总线174的还有逻辑引擎176，它为RAID算法提供“异或”计算，以产生奇偶块。次地址转换单元178提供从处理器单元170和局部内存172到次总线164的高通过量数据通路。在所示实施例中，总线162、164是PCI总线，但也可使用其它类型的外围总线。
局部内存172具有内存控制器180。在所示实施例中，局部内存172是易失性RAM型存储器，并用于对传送到盘驱动器150a、150b...150e的数据或从这些盘驱动器接收的数据进行高速缓存。也可使用其它类型的存储器。例如，在数据传送期间存储处理器109或存储器108意外停止工作时，非易失性快闪存储器可用于存储标识不完整条带的恢复信息。直接存储器存取(DMA)控制器182、184允许从主机102向局部内存172以及从局部内存172向驱动器150a...150n的直接存储器传送。
如前所述，一些RAID数据重建过程利用至少8个读出操作来为具有5个数据块(包括一个奇偶块)的条带重建数据块。按照所示实施例的一个方面，构建管理器130包括存储处理器109的逻辑引擎176，它在一些应用中能显著便于丢失数据的有效重建或在数据更新时新奇偶数据的构建。例如在一个应用中，为具有5个数据块(包括一个奇偶块)的条带重建数据块的读出操作数可减到四个读出操作。另外，存储重建块的写入操作数可从两个写入操作减到一个写入操作。
图6以示意图形式示出包括存储队列200的逻辑引擎176的一个实例。存储队列200可对存储队列200的内容执行“异或”逻辑操作，如箭头202所示，并在其输入端给出数据，如箭头204所示。按照所示实施例的一个方面，在一个读出操作中，数据可直接从盘驱动器150a、150b...150n之一读出，并在逻辑引擎176中处理，不用先在局部内存172中高速缓冲。按照所示实施例的另一方面，存储队列200一次可容纳整个数据块。更详细解释的是，一个或多个这些和其它特征可便于数据构建，包括数据重建。
在所示实施例中，逻辑引擎176显示为包括存储队列。也可使用其它类型的电路，包括寄存器和其它类型的逻辑和存储器。
图7示出包括处理器单元170和逻辑引擎176的数据构建管理器130在数据重建中的操作实例。在此实例中，包括5个数据块，其中包括一个奇偶块的数据条带n(图8)分别存储在5个盘驱动器150a、150b、150c、150d和150e上，其中条带的每个数据块存储在盘驱动器150a、150b...150e中的一个上。而且，盘驱动器150a、150b...150e中之一，在此实例中，即盘驱动器150d，已失效，以致每个条带的数据块都已丢失或者被破坏，并需要重建。
在复位(过程框260)存储队列200后，可对特定条带的所有块启动读出操作(过程框286)。按照一方面，所有块或子块可以从存储器108中并行读出和处理，如下所述。因此，读出命令可由存储处理器109同时发给所有盘驱动器150a、150b...150e，以读出条带的相应块。一旦对发给盘驱动器的读出命令作出响应而从盘驱动器150a、150b...150e之一接收(过程框292)一个块(或子块)，此块就可存储在存储队列200中(图6)。该数据例如可以是条带n的数据块1，如图8所示，如果含有块1的盘驱动器是第一个对所发出的读出命令作出响应的话。由于存储队列200之前复位了，因此通过对从驱动器150a读出的块1数据和存储队列200的复位内容执行“异或”操作(框296)，例如从驱动器150a读出的数据块1就可存储在存储队列200中。在所示实施例中，存储队列200的容量足以容纳来自盘驱动器条带的整个数据块。因此，如果例如存储队列200的容量是64K字节，则对每个块的读出操作可继续执行，直到存储队列200填满整个64K字节的块1数据为止。应理解，存储队列200的大小可以改变，视应用而定。
对以前发出(过程框286)的读出命令作出响应，可以接收到(过程框292)来自条带n的另一数据块，例如块2(图8)。来自驱动器150b的数据块2与以前存储在存储队列200中的数据块1执行“异或”操作(过程框296)，并作为中间结果存储在存储队列200中。
对以前发出(过程框286)的读出命令作出响应，可以接收到(过程框292)来自条带n的另一数据块，例如块3(图8)。来自驱动器150c的数据块3与存储队列200的内容执行“异或”操作(过程框296)，并作为中间结果存储在存储队列200中。
对以前发出(过程框286)的读出命令作出响应，可以接收到(过程框292)来自条带n的另一数据块，例如块5(图8)。来自驱动器150e的(奇偶)数据块5与存储队列200的内容执行“异或”操作(过程框296)，并作为中间结果存储在存储队列200中。
一旦已从盘驱动器150a、150b...150e接收到(过程框302)条带n的所有好数据块，存储在存储队列200中的中间结果就是条带n的重建块4(图8)，它可在第一写入操作306中被写入(过程框304)盘驱动器150d，来替代条带n的丢失块4。图7的过程可以对盘驱动器150a、150b...150e的阵列151中的每个条带重复，直到每个损坏的块(过程框310)都已被重建为止。
虽然图7的过程框292是指“块”的接收，但应理解，条带n的数据块的子块不必一起接收和处理。而是，子块可以在不同的时间被接收，并在被接收时与存储队列200的内容作“异或”。因此，条带n的每个块的子块可在它们被存储队列200接收和处理时与条带n其它块的子块相互混合。因此，存储处理器109可以同时向每个盘驱动器150a、150b...150e发出读出命令，且盘驱动器可同时用所请求的数据作出响应，这样条带n的各个块的子块就可在它们在总线164上从盘驱动器传送到存储处理器109和存储队列200时相互混合在一起。
图9示出构建管理器130操作的另一实施例，其中在降级数据读出操作中，重建的数据可直接从存储队列200写入主机102，例如写入主机内存106。在此实施例中，构建管理器130包括存储处理器109中的DMA功能，其允许例如在DMA写入操作350中，重建的数据从存储队列200向主机内存106直接转储。DMA控制器例如可以是图5的DMA控制器182，或可以在逻辑引擎176的电路中或其它地方实现，视应用而定。
图10示出构建管理器130操作的另一实施例，其中构建了新的奇偶数据，以在用新数据更新老数据时替代老的奇偶数据。在复位存储队列200后，在第一读出操作400中，可从主机102读出条带n的新数据块，并将其存储在存储队列200中。在如上所述的一个实施例中，此数据传送可作为DMA传送完成。在第一写入操作402中，新数据也可从存储队列200传送到局部内存172中。在第二读出操作404中，老数据可以从盘驱动器例如盘驱动器150a传送出去。来自驱动器150a的老数据块与以前存储在存储队列200中的新数据块执行“异或”操作，并作为中间结果存储在存储队列200中。
在第三读出操作406中，下一个块，即条带n的老奇偶数据块，可从盘驱动器例如盘驱动器150b中读出。来自驱动器150b的老奇偶数据块与存储队列200的内容执行“异或”操作，并作为中间结果存储在存储队列200中。
一旦条带n的老数据块和老奇偶数据块以及条带n的新数据块已分别从盘驱动器150a、150b和主机102接收到，存储在存储队列200中的中间结果就是条带n的新奇偶数据块，它可在第二写入操作408中被写入盘驱动器150b，以替代条带n的老奇偶数据。此外，在第三写入操作410中，新数据可从局部内存172写入到盘驱动器150a，以替代老数据。应理解，在数据更新操作中读出和写入操作数可显著减少，如上所述。
再者按照另一方面，所有块或子块都可从存储器108和主机内存106中并行读出和处理。因此，读出命令可由存储处理器109同时发到主机内存和所有盘驱动器150a、150b...150e，以读出条带的相应块。
附加实施例详情
用于管理数据构建的所述技术可使用标准编程和/或工程技术来产生软件、固件、硬件或它们的任何组合实现为方法、设备或制品。本文所用的词语“制品”是指在硬件逻辑(例如集成电路芯片、可编程门阵列(PGA)、专用集成电路(ASIC)等)或计算机可读介质例如磁存储介质(例如硬盘驱动器、软盘、磁带等)、光存储器(CD-ROM、光盘等)、易失性和非易失性存储器件(例如EEPROM、ROM、PROM、RAM、DRAM、SRAM、固件、可编程逻辑等)实现的代码或逻辑。计算机可读介质中的代码由处理器存取和执行。实现优选实施例的代码还可在网络上通过传输介质或从文件服务器存取。在这种情况下，实现代码的制品可包括传输介质，例如网络传输线、无线传输介质，信号则通过空间、无线电波、红外信号等传播。所以，“制品”可包括实施代码的介质。此外，“制品”可包括实施、处理和执行代码的硬件和软件成分的组合。当然，业界技术人员会认识到，对于这种配置可以作出许多改动，并且制品可包括业界已知的任何信息承载介质。
虽然在本文中将逻辑引擎描述为具有一个存储队列或寄存器用于执行“异或”操作，但应理解，逻辑引擎可具有多个存储队列或寄存器，特别是对于具有多个奇偶块的数据组织，如在2003年12月29日提交的、授予本申请受让人的、代理档案号P17729、题目为“生成奇偶数据的方法、系统和程序(METHOD，SYSTEM AND PROGRAMFOR GENERATING PARITY DATA)”的同时待审的申请中所述。
在某些实现中，存储处理器109包括管理数据构建和重建的数据构建管理器130。存储处理器109可具有软件、固件或硬件或它们的组合，以执行这些和其它功能。例如，在一个实施例中，处理器170和逻辑引擎176可以在与主机处理器分开的存储处理器109中的硬件中实现。在其它实现方案中，数据构建管理器可以在包括驱动程序、操作系统或应用程序或这些的组合的主机软件中实现。
在某些实现方案中，计算机系统可包括驱动程序和存储控制器，例如串行-高级技术附件(SATA)、串行连接SCSI(SAS)、独立盘冗余阵列(RAID)等控制器，其管理对非易失性存储设备的存取，例如磁盘驱动器、磁带介质、光盘等。在备选实现方案中，存储控制器实施例可包含在没有驱动程序的系统中。用于设备和扩展器的SAS体系结构的更多详情在技术说明书“信息技术-串行连接SCSI(SAS)(Information Technology-Serial Attached SCSI(SAS))”中有说明，参考由ANSI出版的No.ISO/IEC 14776-150：200x和ANSI INCITS.***：200x PHY layer(2003年7月9日)。关于SATA体系结构的详情在技术说明书“串行ATA：高速串行化AT附件(Serial ATA：High SpeedSerialized AT Attachment)”Rev.1.0A(2003年1月)中有说明。
虽然在本文中将逻辑引擎描述为接收和处理一个完全的数据块，但应理解，一次也可接收和处理一个块或多个块的一部分。此外，虽然在本文中将逻辑引擎描述为直接从非易失性存储单元例如盘驱动器接收数据，但应理解，在某些实施例中，数据也可从易失性存储器例如RAM存储器传送到逻辑引擎。
在某些实现方案中，设备驱动程序和存储处理器实施例可以在包括视频控制器的计算机系统中实现，以提供信息在连接到包括设备驱动程序和网络适配器的计算机系统的监视器上显示，这种计算机系统包括台式计算机、工作站、服务器、大型机、膝上型电脑、手持计算机等。备选的是，存储处理器和设备驱动程序实施例可以在不包括视频控制器的计算设备中实现。
在某些实现方案中，网络适配器可配置成在连接到网络适配器上端口的电缆上传输数据。备选的是，网络适配器实施例可配置成在无线网络或连接上传输数据，例如无线LAN、蓝牙等。
图7所示逻辑示出了以某种顺序发生的某些事件。在备选实施例中，某些操作可以不同顺序执行、更改或删除。而且，一些操作可添加到上述逻辑，且仍然与所述实施例相符。另外，本文所述的操作可依次发生，或某些操作可并行处理。还有，操作可由单一处理单元执行，或由分布式处理单元执行。
图11示出网络组件的计算机体系结构500的一个实现方案，例如图4所示的主机和存储设备。体系结构500可包括处理器502(例如微处理器)、内存504(例如易失性存储装置)以及存储器506(例如非易失性存储器，例如磁盘驱动器、光盘驱动器、磁带驱动器等)。存储器506可包括内部存储设备或附加的或网络可存取的存储器。存储器506中的程序以业界已知的方式加载到内存504中，并由处理器502执行。存储处理器507可控制存储器506。该体系结构还包括网络适配器508，以便能与网络例如以太网、光纤通道仲裁环路等通信。关于光纤通道体系结构的详情在技术说明书“Fibre Channel Framingand Signaling Interface”中有说明，文件号为ISO/IEC AWI 14165-25。
另外，在某些实施例中，该体系结构可包括视频控制器509，以将信息呈现在显示监视器上，其中视频控制器509可以在视频卡上实现，或集成到安装在母板上的集成电路组件上。如上所述，某些网络设备可具有多个存储卡或控制器。输入设备510用来提供对处理器502的用户输入，并可包括键盘、鼠标、笔针、扩音器、触摸式显示屏、或业界已知的任何其它激活或输入构件。输出设备512能够提供从处理器502或其它组件例如显示监视器、打印机、存储器等传输的信息。
存储处理器506和网络适配器508各可在卡上实现，例如外围部件互连(PCI)卡或某个其它的I/O卡，或在安装在母板上的集成电路组件上实现。关于PCI体系结构的详情在PCI-SIG出版的“PCI LocalBus，Rev.2.3”中有说明。
已经出于图示和说明目的给出了各种实施例的上述说明。上述说明书、实例和数据提供了各成分的制造和使用的完整说明。不应认为本说明书是排他性的，或局限于所公开的明确形式。根据上述内容可以作出许多更改和改变。

Claims (50)

1.一种方法，包括：
在旁路高速缓存的第一传送操作中，将存储在多个非易失性存储单元上条带中的第一数据单元从所述多个非易失性存储单元的第一非易失性存储单元传送到具有所述高速缓存的存储处理器的逻辑引擎；
在旁路所述高速缓存的第二传送操作中，将存储在所述条带中的第二数据单元从所述多个非易失性存储单元的第二非易失性存储单元传送到所述逻辑引擎；以及
使用在所述第一传送操作中传送到所述逻辑引擎的所述第一数据单元并使用在所述第二传送操作中传送到所述逻辑引擎的所述第二数据单元，在所述逻辑引擎中构建第三数据单元。
2.如权利要求1所述的方法，还包括在第三传送操作中将所述构建的第三数据单元传送到所述多个非易失性存储单元的第三非易失性存储单元，并将所述构建的第三数据单元存储在所述条带中。
3.如权利要求2所述的方法，其中所述第三传送操作旁路所述高速缓存。
4.如权利要求2所述的方法，其中所述多个非易失性存储单元布置成独立盘冗余阵列组织。
5.如权利要求4所述的方法，其中所述第二数据单元是奇偶数据。
6.如权利要求5所述的方法，其中每个非易失性存储单元是一个盘驱动器。
7.如权利要求6所述的方法，其中所述条带组织成包括奇偶数据块的独立盘冗余阵列条带数据块，且每个所述数据单元是所述独立盘冗余阵列条带的一个数据块。
8.如权利要求7所述的方法，其中所述逻辑引擎包括能够存储来自所述独立盘冗余阵列条带的数据块的存储队列。
9.如权利要求1所述的方法，其中所述逻辑引擎的所述高速缓存是随机存取存储器。
10.如权利要求1所述的方法，其中所述在所述逻辑引擎中构建第三数据单元包括将在所述第一传送操作中传送到所述逻辑引擎的所述第一数据单元加到所述逻辑引擎的存储队列，并对所述第一存储队列的内容和所述所加的第一数据单元执行“异或”逻辑函数操作，并且包括将在所述第二传送操作中传送到所述逻辑引擎的所述第二数据单元加到所述逻辑引擎的所述存储队列，并对所述存储队列的内容和所述所加的第二数据单元执行“异或”逻辑函数操作。
11.如权利要求2所述的方法，还包括：
在旁路所述高速缓存的第四传送操作中，将存储在所述条带中的第四数据单元从所述多个非易失性存储单元的第四非易失性存储单元传送到所述逻辑引擎；以及
在旁路所述高速缓存的第五传送操作中，将存储在所述条带中的第五数据单元从所述多个非易失性存储单元的第五非易失性存储单元传送到所述逻辑引擎；以及
其中所述在所述逻辑引擎中构建所述第三数据单元，在所述第三传送操作中所述将所述构建的第三数据单元传送到所述第三非易失性存储单元之前，还使用在所述第四传送操作中传送到所述逻辑引擎的所述第四数据单元，并使用在所述第五传送操作中传送到所述逻辑引擎的所述第五数据单元。
12.如权利要求2所述的方法，还包括：
对于所述多个存储单元的每个附加非易失性存储单元：
在旁路所述高速缓存的附加传送操作中，将存储在所述条带中的附加数据单元从所述多个非易失性存储单元的附加非易失性存储单元传送到所述逻辑引擎；以及
其中所述在所述逻辑引擎中构建所述第三数据单元，在所述第三传送操作中所述将所述构建的第三数据单元传送到所述第三非易失性存储单元之前，还使用在所述附加传送操作中传送到所述逻辑引擎的所述附加数据单元。
13.如权利要求1所述的方法，还包括：
将作为要存储在所述条带中的新数据的第四数据单元传送到所述逻辑引擎；其中所述第一数据单元是在所述条带中要由所述新数据替代的老数据，所述第二数据单元是在所述条带中要被替代的老奇偶数据，并且其中所述在所述逻辑引擎中构建所述第三数据单元使用传送到所述逻辑引擎的所述新数据来构建替代奇偶数据单元，所述方法还包括将所述第三新奇偶数据单元传送到所述第二非易失性存储单元，以替代所述第二老奇偶数据单元。
14.如权利要求1所述的方法，还包括在第三传送操作中将所述构建的第三数据单元传送到主机。
15.如权利要求1所述的方法，其中所述存储处理器向所述第一和第二非易失性存储单元发出读出命令，以使所述第一和第二数据单元从所述第一和第二非易失性存储单元中至少部分并行地存取。
16.一种包括存储介质的物品，所述存储介质包括其上存储的机器可读指令，以：
在旁路高速缓存的第一传送操作中，将存储在多个非易失性存储单元上条带中的第一数据单元从所述多个非易失性存储单元的第一非易失性存储单元传送到具有所述高速缓存的存储处理器的逻辑引擎；
在旁路所述高速缓存的第二传送操作中，将存储在所述条带中的第二数据单元从所述多个非易失性存储单元的第二非易失性存储单元传送到所述逻辑引擎；以及
使用在所述第一传送操作中传送到所述逻辑引擎的所述第一数据单元并使用在所述第二传送操作中传送到所述逻辑引擎的所述第二数据单元，在所述逻辑引擎中构建第三数据单元。
17.如权利要求16所述的物品，其中所述存储介质还包括其上存储的机器可读指令，以在第三传送操作中将所述构建的第三数据单元传送到所述多个非易失性存储单元的第三非易失性存储单元，并将所述构建的第三数据单元存储在所述条带中。
18.如权利要求17所述的物品，其中所述第三传送操作旁路所述高速缓存。
19.如权利要求17所述的物品，其中所述多个非易失性存储单元布置成独立盘冗余阵列组织。
20.如权利要求19所述的物品，其中所述第二数据单元是奇偶数据。
21.如权利要求20所述的物品，其中每个非易失性存储单元是一个盘驱动器。
22.如权利要求21所述的物品，其中所述条带组织成包含奇偶数据块的独立盘冗余阵列条带数据块，且每个所述数据单元是所述独立盘冗余阵列条带的一个数据块。
23.如权利要求22所述的物品，其中所述逻辑引擎包括能够存储来自所述独立盘冗余阵列条带的数据块的存储队列。
24.如权利要求16所述的物品，其中所述逻辑引擎的所述高速缓存是随机存取存储器。
25.如权利要求16所述的物品，其中在所述逻辑引擎中构建第三数据单元的机器可读指令包括存储在所述存储介质上的机器可读指令，以将在所述第一传送操作中传送到所述逻辑引擎的所述第一数据单元加到所述逻辑引擎的存储队列，并对所述第一存储队列的内容和所述所加的第一数据单元执行“异或”逻辑函数操作，并且将在所述第二传送操作中传送到所述逻辑引擎的所述第二数据单元加到所述逻辑引擎的所述存储队列，并对所述存储队列的内容和所述所加的第二数据单元执行“异或”逻辑函数操作。
26.如权利要求17所述的物品，其中所述存储介质还包括其上存储的机器可读指令，以：
在旁路所述高速缓存的第四传送操作中，将存储在所述条带中的第四数据单元从所述多个非易失性存储单元的第四非易失性存储单元传送到所述逻辑引擎；以及
在旁路所述高速缓存的第五传送操作中，将存储在所述条带中的第五数据单元从所述多个非易失性存储单元的第五非易失性存储单元传送到所述逻辑引擎；并且
其中在所述逻辑引擎中构建第三数据单元的机器可读指令包括存储在所述存储介质上的机器可读指令，以在所述第三传送操作中所述将所述构建的第三数据单元传送到所述第三非易失性存储单元之前，使用在所述第四传送操作中传送到所述逻辑引擎的所述第四数据单元，并使用在所述第五传送操作中传送到所述逻辑引擎的所述第五数据单元。
27.如权利要求16所述的物品，其中所述存储介质还包括其上存储的机器可读指令，以：
将作为要存储在所述条带中的新数据的第四数据单元传送到所述逻辑引擎；其中所述第一数据单元是在所述条带中要由所述新数据替代的老数据，所述第二数据单元是在所述条带中要被替代的老奇偶数据，且其中在所述逻辑引擎中构建第三数据单元的机器可读指令包括存储在所述存储介质上的机器可读指令，以使用传送到所述逻辑引擎的所述新数据构建替代奇偶数据单元，且其中所述存储介质还包括其上存储的机器可读指令，以将所述第三新奇偶数据单元传送到所述第二非易失性存储单元，来替代所述第二老奇偶数据单元。
28.如权利要求16所述的物品，其中所述存储介质还包括其上存储的机器可读指令，以在第三传送操作中将所述构建的第三数据单元传送到主机。
29.如权利要求16所述的物品，其中所述存储介质还包括其上存储的机器可读指令，以向所述第一和第二非易失性存储单元发出读出命令，以使所述第一和第二数据单元从所述第一和第二非易失性存储单元中至少部分并行地存取。
30.一种系统，包括：
至少一个内存，它包含操作系统和应用程序；
连接到所述内存的处理器；
具有多个非易失性存储单元的数据存储器；
数据存储处理器，适于管理对所述数据存储器的输入/输出(I/O)存取，并具有高速缓存和逻辑引擎；以及
在所述内存中可由所述处理器执行的设备驱动程序，其中所述应用程序、操作系统、设备驱动程序和所述存储处理器中至少一项适于：
在旁路所述高速缓存的第一传送操作中，将存储在所述多个非易失性存储单元上条带中的第一数据单元从第一非易失性存储单元传送到所述存储处理器的所述逻辑引擎；
在旁路所述高速缓存的第二传送操作中，将存储在所述条带中的第二数据单元从所述多个非易失性存储单元的第二非易失性存储单元传送到所述逻辑引擎；以及
使用在所述第一传送操作中传送到所述逻辑引擎的所述第一数据单元并使用在所述第二传送操作中传送到所述逻辑引擎的所述第二数据单元，在所述逻辑引擎中构建第三数据单元。
31.如权利要求30所述的系统，其中所述应用程序、操作系统、设备驱动程序和所述存储处理器中的所述至少一项还适于：在第三传送操作中将所述构建的第三数据单元传送到所述多个非易失性存储单元的第三非易失性存储单元，并将所述构建的第三数据单元存储在所述条带中。
32.如权利要求31所述的系统，其中所述第三传送操作旁路所述高速缓存。
33.如权利要求31所述的系统，其中所述多个非易失性存储单元布置成独立盘冗余阵列组织。
34.如权利要求33所述的系统，其中所述第二数据单元是奇偶数据。
35.如权利要求34所述的系统，其中每个非易失性存储单元是一个盘驱动器。
36.如权利要求35所述的系统，其中所述条带组织成包括奇偶数据块的独立盘冗余阵列条带数据块，且每个所述数据单元是所述独立盘冗余阵列条带的一个数据块。
37.如权利要求36所述的系统，其中所述逻辑引擎包括能够存储来自所述独立盘冗余阵列条带的数据块的存储队列。
38.如权利要求30所述的系统，其中所述逻辑引擎的所述高速缓存是随机存取存储器。
39.如权利要求30所述的系统，其中为了在所述逻辑引擎中构建第三数据单元，所述应用程序、操作系统、设备驱动程序和所述存储处理器中的所述至少一项还适于：将在所述第一传送操作中传送到所述逻辑引擎的所述第一数据单元加到所述逻辑引擎的存储队列，并对所述第一存储队列的内容和所述所加的第一数据单元执行“异或”逻辑函数操作，并且将在所述第二传送操作中传送到所述逻辑引擎的所述第二数据单元加到所述逻辑引擎的所述存储队列，并对所述存储队列的内容和所述所加的第二数据单元执行“异或”逻辑函数操作。
40.如权利要求31所述的系统，其中所述应用程序、操作系统、设备驱动程序和所述存储处理器中的所述至少一个还适于：在旁路所述高速缓存的第四传送操作中，将存储在所述条带中的第四数据单元从所述多个非易失性存储单元的第四非易失性存储单元传送到所述逻辑引擎；以及
在旁路所述高速缓存的第五传送操作中，将存储在所述条带中的第五数据单元从所述多个非易失性存储单元的第五非易失性存储单元传送到所述逻辑引擎；以及
其中为了在所述逻辑引擎中构建第三数据单元，所述应用程序、操作系统、设备驱动程序和所述存储处理器中的所述至少一项还适于：在所述第三传送操作中所述将所述构建的第三数据单元传送到所述第三非易失性存储单元之前，使用在所述第四传送操作中传送到所述逻辑引擎的所述第四数据单元，并使用在所述第五传送操作中传送到所述逻辑引擎的所述第五数据单元。
41.如权利要求30所述的系统，其中所述应用程序、操作系统、设备驱动程序和所述存储处理器中的所述至少一项还适于：将作为要存储在所述条带中的新数据的第四数据单元传送到所述逻辑引擎；其中所述第一数据单元是在所述条带中要由所述新数据替代的老数据，所述第二数据单元是在所述条带中要被替代的老奇偶数据，且其中在所述逻辑引擎中构建第三数据单元的机器可读指令包括存储在所述存储介质上的机器可读指令，以使用传送到所述逻辑引擎的所述新数据来构建替代奇偶数据单元，且其中所述存储介质还包括其上存储的机器可读指令，以将所述第三新奇偶数据单元传送到所述第二非易失性存储单元，来替代所述第二老奇偶数据单元。
42.如权利要求30所述的系统，其中所述应用程序、操作系统、设备驱动程序和所述存储处理器中的所述至少一项还适于：在第三传送操作中将所述构建的第三数据单元传送到主机。
43.如权利要求30所述的系统，其中所述应用程序、操作系统、设备驱动程序和所述存储处理器中的所述至少一项还适于：向所述第一和第二非易失性存储单元发出读出命令，以使所述第一和第二数据单元从所述第一和第二非易失性存储单元中至少部分并行地存取。
44.一种与具有多个非易失性存储单元的数据存储器一起使用的设备，包括：
数据存储处理器，适于管理对所述数据存储器的输入/输出(I/O)存取，并具有高速缓存和逻辑引擎，其中所述存储处理器还适于：
在旁路所述高速缓存的第一传送操作中，将存储在所述多个非易失性存储单元上条带中的第一数据单元从第一非易失性存储单元传送到所述存储处理器的所述逻辑引擎；
在旁路所述高速缓存的第二传送操作中，将存储在所述条带中的第二数据单元从所述多个非易失性存储单元的第二非易失性存储单元传送到所述逻辑引擎；以及
使用在所述第一传送操作中传送到所述逻辑引擎的所述第一数据单元并使用在所述第二传送操作中传送到所述逻辑引擎的所述第二数据单元，在所述逻辑引擎中构建第三数据单元。
45.如权利要求44所述的设备，其中所述设备还适于：在第三传送操作中将所述构建的第三数据单元传送到所述多个非易失性存储单元的第三非易失性存储单元，并将所述构建的第三数据单元存储在所述条带中。
46.如权利要求45所述的设备，其中所述第三传送操作旁路所述高速缓存。
47.如权利要求45所述的设备，其中每个非易失性存储单元是一个盘驱动器，所述多个非易失性存储单元布置成独立盘冗余阵列组织，所述条带组织成包括奇偶数据块的独立盘冗余阵列条带数据块，且每个所述数据单元是所述独立盘冗余阵列条带的一个数据块。
48.如权利要求47所述的设备，其中所述逻辑引擎包括能够存储来自所述独立盘冗余阵列条带的数据块的存储队列，所述逻辑引擎的所述高速缓存是随机存取存储器，并且为了在所述逻辑引擎中构建第三数据单元，所述存储处理器还适于：将在所述第一传送操作中传送到所述逻辑引擎的所述第一数据单元加到所述逻辑引擎的存储队列，并对所述第一存储队列的内容和所述所加的第一数据单元执行“异或”逻辑函数操作，并将在所述第二传送操作中传送到所述逻辑引擎的所述第二数据单元加到所述逻辑引擎的所述存储队列，并对所述存储队列的内容和所述所加的第二数据单元执行“异或”逻辑函数操作。
49.如权利要求44所述的设备，其中所述存储处理器还适于在第三传送操作中将所述构建的第三数据单元传送到主机。
50.如权利要求44所述的设备，其中所述存储处理器还适于向所述第一和第二非易失性存储单元发出读出命令，以使所述第一和第二数据单元从所述第一和第二非易失性存储单元中至少部分并行存取。
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