CN1922717A - 用于半导体制造的栅极掺杂物激活方法 - Google Patents
用于半导体制造的栅极掺杂物激活方法 Download PDFInfo
- Publication number
- CN1922717A CN1922717A CNA2005800051040A CN200580005104A CN1922717A CN 1922717 A CN1922717 A CN 1922717A CN A2005800051040 A CNA2005800051040 A CN A2005800051040A CN 200580005104 A CN200580005104 A CN 200580005104A CN 1922717 A CN1922717 A CN 1922717A
- Authority
- CN
- China
- Prior art keywords
- silicon layer
- polycrystalline silicon
- doped polycrystalline
- layer
- annealing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 77
- 239000002019 doping agent Substances 0.000 title claims abstract description 22
- 230000004913 activation Effects 0.000 title description 13
- 239000004065 semiconductor Substances 0.000 title description 6
- 238000004519 manufacturing process Methods 0.000 title description 4
- 239000000758 substrate Substances 0.000 claims abstract description 51
- 238000000137 annealing Methods 0.000 claims abstract description 21
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 104
- 229920005591 polysilicon Polymers 0.000 claims description 73
- 229910052710 silicon Inorganic materials 0.000 claims description 31
- 239000010703 silicon Substances 0.000 claims description 31
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 30
- 229910045601 alloy Inorganic materials 0.000 claims description 29
- 239000000956 alloy Substances 0.000 claims description 29
- 238000005224 laser annealing Methods 0.000 claims description 27
- 238000004151 rapid thermal annealing Methods 0.000 claims description 19
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 18
- 229910052796 boron Inorganic materials 0.000 claims description 18
- 239000000126 substance Substances 0.000 claims description 12
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 10
- 229910052698 phosphorus Inorganic materials 0.000 claims description 10
- 239000011574 phosphorus Substances 0.000 claims description 10
- 229910052785 arsenic Inorganic materials 0.000 claims description 9
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 9
- 230000008021 deposition Effects 0.000 claims description 9
- 239000000203 mixture Substances 0.000 claims description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 6
- 229910052799 carbon Inorganic materials 0.000 claims description 6
- 229910052732 germanium Inorganic materials 0.000 claims description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 6
- 230000002520 cambial effect Effects 0.000 claims description 2
- 238000000151 deposition Methods 0.000 abstract description 12
- 239000000463 material Substances 0.000 abstract description 10
- 238000005516 engineering process Methods 0.000 description 36
- 230000008569 process Effects 0.000 description 22
- 238000009792 diffusion process Methods 0.000 description 15
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 9
- 238000005229 chemical vapour deposition Methods 0.000 description 8
- 239000003989 dielectric material Substances 0.000 description 8
- 238000001289 rapid thermal chemical vapour deposition Methods 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000005240 physical vapour deposition Methods 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 5
- 229910052757 nitrogen Inorganic materials 0.000 description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 4
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 4
- 238000003877 atomic layer epitaxy Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 4
- 238000010276 construction Methods 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 3
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 3
- 229940090044 injection Drugs 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910003811 SiGeC Inorganic materials 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 239000002800 charge carrier Substances 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 229910052735 hafnium Inorganic materials 0.000 description 2
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000001965 increasing effect Effects 0.000 description 2
- 229910003465 moissanite Inorganic materials 0.000 description 2
- 238000012958 reprocessing Methods 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 238000003892 spreading Methods 0.000 description 2
- 230000007480 spreading Effects 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- BRGOCSWOKBOIOJ-UHFFFAOYSA-N N.[O-2].[Hf+4] Chemical compound N.[O-2].[Hf+4] BRGOCSWOKBOIOJ-UHFFFAOYSA-N 0.000 description 1
- 239000004187 Spiramycin Substances 0.000 description 1
- 238000003917 TEM image Methods 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- FRIKWZARTBPWBN-UHFFFAOYSA-N [Si].O=[Si]=O Chemical compound [Si].O=[Si]=O FRIKWZARTBPWBN-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000003292 diminished effect Effects 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen(.) Chemical compound [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- 239000001272 nitrous oxide Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
在一实施例中，本发明主要提供一种对沉积在衬底上的掺杂层退火的方法。该方法包括在诸如栅氧化层的衬底表面上沉积多晶硅层，并用掺杂物注入该多晶硅层以形成掺杂的多晶硅层。该方法还包括对该掺杂的多晶硅层进行快速热退火以使该掺杂物很容易地分布在整个多晶硅层中。随后，该方法还包括对该掺杂的多晶硅层用激光退火以激活位于该多晶硅层上部的掺杂物。激光退火使该掺杂物、原子进入该多晶硅材料的晶格中。
Description
背景技术
技术领域
本发明的实施方式主要涉及半导体制造工艺领域，更具体地，涉及在形成诸如栅极的半导体器件的含硅薄膜中掺杂物激活的方法。
现有技术描述
随着晶体管制造尺寸越来越小，需要用更薄的栅介电材料改善器件的性能。然而，载流子的耗尽将产生反转氧化物厚度为4的栅极材料，该材料诸如掺杂硼的p型多晶硅或掺杂砷和/或磷的n型多晶硅。降低多晶耗尽为维持器件性能的关键。传统的工艺包括快速退火工艺，该快速退火工艺具有有限的热预算。例如，温度不能高于1050℃，因为硼将穿透栅介电材料而降低器件的性能和可靠性。
由于对于低于100nm的CMOS(互补金属氧化物半导体)器件，半导体结深度需小于30nm，生产超浅源/漏结将变得更有挑战性。当结深度接近10nm时，传统的通过注入的掺杂接着进行热退火后处理不是很有效，因为热退火后处理将引起掺杂物扩散增加。掺杂物扩散可能污染相邻层并导致该器件失效。
激活多晶硅栅极同时不引起掺杂物扩散对前段工艺(FEOL)来说是一个主要的挑战。在增强的掺杂物激活和总体的掺杂物扩散之间存在严格的平衡。过度激活退火可能引起高的载流子浓度，但是掺杂物可能进入栅介电层或甚至进入沟道区。因为器件制造者尽量克服多晶耗尽，将更难维持该平衡。多晶耗尽是指多晶硅反转区里激活掺杂物减少的情况。当栅长度和栅介电厚度变小时，多晶耗尽造成部分Tox-inv(载流子浓度/多晶耗尽)增加。对于特征尺寸为130nm和90nm的衬底，诸如快速热退火工艺(RTP)和急速热退火处理传统热工艺为主要的掺杂物激活方法。由此引起的多晶耗尽导致4-5的TOx-inv。对于特征尺寸为65nm的衬底，需要该多晶耗尽另外降低1。多晶耗尽每减少一埃，将产生约为3％的驱动电流增益。传统的热工艺不能在不引起掺杂物扩散的情况下对这些小衬底图形进行退火处理。另外，阻止掺杂物进入和使用热敏高电介质材料需要低的热预算激活退火。
激光退火，其能在不引起掺杂物扩散的情况下获得高的掺杂物激活，已经研发并满足用于65nm特征的多晶耗尽需要。激光退火技术在几毫秒内产生靠近硅熔点处的瞬态温度，其得到高掺杂物激活并具有非常小的掺杂物扩散。这对于诸如硼激活的工艺尤其有利，因为硼扩散比磷和砷快得多。然而，使硅熔化的激光退火温度已表明会引起多晶硅晶粒尺寸变大，这可能会导致器件产量下降。
因此，需要一种工艺，该工艺可以在某一特征尺寸内掺杂多晶硅层，接着在最小的或没有掺杂物扩散的情况下对该掺杂的多晶硅层进行退火并激活处理。
发明内容
在一实施例中，本发明主要提供一种用于对衬底上的掺杂层退火处理的方法，该方法包括在栅氧化层上沉积多晶硅层，对该多晶硅层用掺杂物注入形成掺杂的多晶硅层，对该掺杂的多晶硅层快速退火，以及对该掺杂多晶硅层激光退火。
在另一实施例中，本发明主要提供一种用于对衬底上的层退火处理的方法，该方法包括在该衬底上沉积含晶格的多晶硅层，用至少一种掺杂元素对该多晶硅层掺杂形成掺杂的多晶硅层，以及用激光对该掺杂的多晶硅层退火处理而将所述至少一种掺杂元素注入晶格。
在另一实施例中，本发明主要提供一种用于对衬底上掺杂硅层退火处理的方法，该方法包括在该衬底上沉积多晶硅层，用至少一种掺杂元素对该多晶硅层掺杂，在第一温度对该多晶硅层快速热退火，以及在约1,000℃到约1,415℃之间的第二温度对该多晶硅层激光退火。
在另一实施例中，本发明主要提供一种在衬底上形成层的方法，该方法包括在该衬底上沉积多晶硅层。该多晶硅层含有掺杂元素和晶格结构。该方法还包括用激光对该多晶硅层退火处理从而将该掺杂元素注入该构成多晶硅层的晶格结构中。
附图说明
因此为了更详细地理解本发明的以上所述特征，将参照附图中示出的实施例对以上简要所述的本发明进行更具体描述。然而，应该注意，附图中只示出了本发明典型的实施例，因此不能认为是对本发明范围的限定，本发明可以允许其他等同的有效实施例。
图1A-1E示出了栅层叠结构中层的形成步骤说明。
图2示出了描述在栅层叠结构中沉积掺杂的多晶硅层的工艺流程图；以及
图3A-3C示出了在栅层叠结构中层的形成。
具体实施方式
本发明的具体实施例提供一种在诸如硅二氧化硅、氧氮化硅的介电材料或高介电常数材料上形成掺杂的多晶硅层的方法。一般地，对该多晶硅层掺杂采用离子注入、热退火，诸如用快速热退火(RTA)工艺，并接着利用动态的表面退火(DSA)工艺激光退火从而激活该掺杂物。
图1A-1E示出了本发明一实施例中公开的工艺进程的栅层叠结构的截面图。图1A描述了在诸如用于半导体工艺的硅衬底的衬底10上沉积的介电层20。在一实例中，衬底10可为用硼掺杂的电阻率在约15Ω-cm到20Ω-cm范围的300mm的p型硅衬底，并在沉积介电层20之前通常用传统的栅极氧化前清洗预清洗。
介电层20可以采用多种沉积工艺沉积在衬底10上，诸如快速热氧化(RTO)、化学气相沉积(CVD)、等离子体增强-CVD(PECVD)、物理气相沉积(PVD)、原子层沉积(ALD)、原子层外延(ALE)或其组合。优选地，采用RTO工艺在衬底10上生长诸如SiO2或SiOxNy的介电材料。适合用作介电层20的材料包括氧化硅、氮化硅、氮氧化硅、氧化铪、硅酸铪、氧化铝、硅酸铝、硅化物、氧化锆、硅酸锆及其衍生物和组合。一般地，介电层20沉积的厚度为从约1到约150的范围，优选地为从约5到约50。
在一些实施例中，该介电材料可通过诸如去耦等离子体氮化(DPN)或在一氧化氮(NO)或一氧化二氮(N2O)中热氮化的方式进行氮化。进行氮化后退火以使氮和氧更强地结合，从而改善介电层20和衬底10的接触面。例如，可采用RTO工艺在衬底10上生长氧化硅，接着采用DPN工艺形成氮氧化硅，其具有氮浓度从约1×1014atoms/cm2到约1×1016atoms/cm2，例如，约为1×1015atoms/cm2。其他氮化介电材料包括氮氧化铝、氮化的硅酸铪、氮氧化铪和氮氧化锆。
图2中，流程图描述了包括工艺100，该工艺100包括在如图1B所示的介电层20上沉积诸如多晶硅的多晶硅层30的步骤110。沉积多晶硅层30通常采用化学气相沉积(CVD)、快速热-CVD(RT-CVD)、等离子体增强-CVD(PE-CVD)、物理气相沉积(PVD)、原子层沉积(ALD)、原子层外延(ALE)或其组合。优选地，在温度从约650℃到约800℃范围，优选地从约700℃到约750℃，采用RT-CVD工艺沉积该多晶硅层30。在RT-CVD工艺期间，可以改变温度使多晶硅层30的晶粒尺寸产生改变。例如，在720℃的多晶硅晶粒平均尺寸要比在710℃约大50。一般地，多晶硅层30沉积的厚度在约100到约10,000的范围，优选地在约500到约2,500，并更优选地在约750到约1,500。也可采用RT-CVD工艺沉积双层多晶硅。多晶硅层30通常为多晶硅，但也可含有其他元素，诸如锗和/或碳。因此该多晶硅层可以包括Si、SiGe、SiC或SiGeC。在一些实例中，该多晶硅层可具有细径的柱状结构或者包含在底部上的微晶粒层和顶部上的柱状层的双层结构组合。
可用于沉积介电层和/或多晶硅层的硬件包括从位于California，Santa Clara的Applied Materials公司购买的Epl Centura系统和PolyGen系统。用于生长氧化物的有效的快速热CVD处理室为可从位于California，Santa Clara的Applied Materials公司购买的Radiance系统。在普通授予的公开号为20030079686的美国专利中公开了可用于沉积高电介质层和/或多晶硅层的ALD设备，在此引用其全部内容作为参考用于描述该设备。其他设备包括现有技术熟知的箱式、高温炉。
步骤120包括用元素的掺杂物31掺杂多晶硅层30。图1C示出了多晶硅层30的上部32中的元素掺杂物31。该元素的掺杂物以单个原子层到约150的深度注入多晶硅层30上部32，该深度优选地约70。元素的掺杂物可包括硼、砷、磷、镓、锑、铟及其组合。元素的掺杂物可在多晶硅层30中具有的浓度范围在约1×1019atoms/cm3到约1×1021atoms/cm3范围。在一实例中，多晶硅层30为P型掺杂，诸如通过硼的离子注入至约1×1019atoms/cm3到约1×1021atoms/cm3浓度范围，优选地在约1×1020atoms/cm3到约5×1020atoms/cm3范围。在另一实例中，多晶硅层30为N+型掺杂，诸如采用磷的离子注入至为约1×1019atoms/cm3到约1×1021atoms/cm3的浓度范围，优选地约在1×1020atoms/cm3到约5×1020atoms/cm3范围。在另一实施例中，多晶硅层30为N-型掺杂，采用扩散砷或磷至约1×1015atoms/cm3到约1×1019atoms/cm3的浓度范围。
掺杂物可以用普通授予的美国专利6,583,018中所述的离子注入工艺注入，为了描述该装置该专利在此引用其全部内容作为参考。有效利用于本发明的实施例中离子注入设备能以极低的离子注入能量注入离子，该能量诸如约5KeV或更低，优选地约3KeV或以下。本发明的实施例中有效的两种离子注入设备为Qantum III系统和xR LEAP系统，两种设备均由位于California，Santa Clara的Applied Materials公司制造并出售。以约为3KeV能量设置值和约为1×1015atoms/cm2到约1×1016atoms/cm2浓度设置值注入硼。在一实例中，以约为4×1015atoms/cm2的浓度注入硼。在另一实例中，以约为8×1015atoms/cm2的浓度注入硼。
步骤130中，对该衬底进行热退火工艺从而使掺杂物元素31从上部32扩散并分布到整个多晶硅层30以形成掺杂的多晶硅层34。优选的退火工艺为快速热退火(RTA)工艺维持约2秒到约20秒，优选地从约5秒到约10秒。在RTA工艺期间，将该衬底加热至约800℃到约1,400℃的温度，优选地约在1,000℃到约1,200℃。在RTA工艺的一实例中，该衬底加热至约1,000℃约为5秒。如图1D所示，在RTA工艺期间温度和时间正确的组合确保元素的掺杂物31分布到整个多晶硅层30，而不会污染器件中的相邻特征图形。此处描述的在RTA工艺期间使用的工艺室为Centura RTP系统，可从位于California，Santa Clara的Applied Materials公司购买。
在步骤140中，掺杂的多晶硅层34采用动态表面退火(DSA)工艺激光退火。如图1E所示，在DSA工艺期间对该掺杂的多晶硅层34中的硅和元素掺杂物31激活而形成激活掺杂的多晶硅层36。多晶硅层的晶格中的原子位置被掺杂原子33取代。因此，多晶硅晶格，通常为硅开口并注入该输入的掺杂原子33，该掺杂原子为诸如硼、砷、磷或在此描述的其他掺杂物。
在DSA工艺期间在接近熔点而实际上不会形成液态的温度对掺杂的多晶硅层34加热。在温度约1,000℃到约1,415℃之间，优选地在约1,050℃到约1,400℃对该掺杂的多晶硅层34加热。温度最好不能超过多晶硅的熔点(约1,415℃)，因为掺杂物扩散有可能引起特征形状内其他元素的污染。在DSA工艺期间可能暴露于该衬底的层小于约500毫秒，优选地小于100毫秒。该DSA工艺可在DSA平台上操作，该平台可从位于California，Santa Clara的Applied Materials公司购买。一般地，激光发射所选的波长为10.6μm或0.88μm。
图3A-3C示出了如此处一实施例所述的沉积多晶硅材料而形成栅极层叠结构的示图。如图3A的截面图所示，在衬底200上沉积介电层204。虽未示出，该衬底200可包括包含掺杂区域的多个特征。介电层204包含如此处所述的二氧化硅、氮氧化硅、氮化硅和高电介质材料。该衬底200还包含浅槽隔离(STIs)202。STIs 202一般通过氧化蚀刻入衬底200中的沟槽侧壁并接着用高密度等离子体CVD氧化物填充该沟槽形成。
图3B示出了沉积在介电层204和STI 202上的多晶硅层206。多晶硅层206可采用化学气相沉积(CVD)、快速热-CVD(RT-CVD)、等离子增强-CVD(PE-CVD)、物理气相沉积(PVD)、原子层沉积(ALD)或其组合沉积。在一实施例中，通过RT-CVD工艺在约为650℃到约800℃的温度范围，优选地在约700℃到约750℃沉积多晶硅层206。一般地，多晶硅层206沉积的厚度范围在约100到约10,000，优选地在约500到约2,500，更优选地在约750到约1,500。多晶硅层206通常为多晶硅，但可含有其他元素诸如锗和/或碳。因此，多晶硅层206可包含Si、SiGe、SiC或SiGeC。
如图3C中所示，构图并蚀刻多晶硅层206以形成构图后的多晶硅208。多晶硅层206可在蚀刻前掺杂，但一般在构图后的多晶硅208形成后掺杂。可对构图后的多晶硅208进行掺杂、退火和/或在其上沉积多层，诸如补偿间隔(未示出)。在一实例中，构图后的多晶硅208可用沉积的补偿间隔封装并接着用离子注入工艺掺杂，然后采用RTA退火工艺和DSA工艺激活该注入的掺杂物。
实验
如表1所示，为了模拟掺杂的多晶硅栅极，将多晶硅沉积在8个衬底上(衬底A-H)，其包含一氮氧化硅栅介电层。该衬底为电阻率15-20Ω-cm的300mm的p型(硼掺杂)硅圆片。对该衬底进行栅极前清洗，接着采用快速热氧化工艺。形成厚度约为20的SiO2薄膜。采用去耦等离子体氮化对该SiO2薄膜等离子体氮化，得到约为1×1015atoms/cm2的氮浓度。对所有衬底进行氮化后退火从而使氮更加完全与氧化硅结合，并改善表面界面。
| 衬底 | 多晶硅(℃) | [B](×1015) | RTA | DSA |
| A | 710 | 4 | × | |
| B | 710 | 4 | × | × |
| C | 720 | 4 | × | |
| D | 720 | 4 | × | × |
| E | 710 | 8 | × | |
| F | 710 | 8 | × | × |
| G | 720 | 8 | × | |
| H | 720 | 8 | × | × |
表1
在具有单个硅片、快速热化学气相沉积处理室的每个衬底上沉积厚度约为1,000的多晶硅。多晶晶粒的平均尺寸不同。以710℃在衬底A、B、E和F上沉积多晶硅材料以形成第一尺寸的晶粒，同时以720℃在衬底C、D、G和H上沉积多晶硅以产生更大尺寸的晶粒。将硼以3KeV的能量和剂量设定为4×1015/cm2注入到衬底A-D以及以剂量设定为8×1015/cm2注入到衬底E-H。所有衬底在约1,000℃经过传统的RTA工艺。衬底B、D、F和H在1,350℃采用DSA工艺进行激光退火。
对所得结构的表面电阻(Rs)和扩展电阻进行测量来评价载流子浓度和激活。通过二次离子质谱仪(SIMS)分析掺杂物(硼)分布。用x射线衍射仪(XRD)和截面透射电子显微镜(TEM)进行分析多晶晶粒结构。
激光退火降低的表面电阻要高于比只通过增加掺杂物浓度所降低的表面电阻。例如，使掺杂物浓度加倍表面电阻降低约10％。然而，当保持掺杂物浓度为4×1015/cm2时，对衬底采用DSA工艺，表面电阻降低40％。使衬底掺杂物浓度加倍并采用DSA工艺，衬底的表面电阻降低50％之多。多晶晶粒结构对表面电阻影响很小。在720℃沉积多晶硅比710℃沉积多晶硅的表面电阻要低几个百分比。激光退火通过至少三个机理降低表面电阻，诸如额外的掺杂物扩散、改变多晶晶粒结构和增强掺杂物激活。
通过SIMS没有观察到额外的掺杂物扩散。该掺杂物完全通过RTA工艺扩散，并且在激光退火工艺后没有出现改变。由于要限制掺杂物在高温下可扩散的时间，该硅片上每个点发射的激光只有几毫秒。在激光退火工艺后多晶硅晶粒结构确实出现了一些小的改变。XRD分析显示在DSA工艺后，多晶晶粒尺寸增加了9，从361到370。TEM图像显示柱状结构保持很好，但是晶粒结构出现稍微更多的结晶。晶粒结构改变是降低表面电阻的因素。然而，晶粒尺寸没有明显增加其将对器件产量产生不利影响，这种情况会在高于硅熔点温度激光退火中发生。
扩展电阻分析表明随着在整个多晶硅中激光退火温度的提高，载流子浓度增加。在多晶硅和氮氧化层之间的介面掺杂物激活有明显大的增加。较高的载流子浓度降低多晶耗尽。激光退火可通过掺杂物激活的增加降低表面电阻。简而言之，高温激光退火使多晶硅薄膜中产生更多的载流子。
虽然上文提到了本发明的实施例，但是在不偏离本发明的基本范围以及以下权利要求所确定的范围的情况下，可以设计出本发明的其他和更进一步实施例。
Claims (33)
1.一种对衬底上的掺杂层退火的方法，包括：
在栅氧化层上沉积多晶硅层；
将掺杂物注入所述多晶硅层以形成掺杂的多晶硅层；
对所述掺杂的多晶硅层进行快速热退火；以及
对所述掺杂的多晶硅层进行激光退火。
2.根据权利要求1所述的方法，其特征在于，所述多晶硅层包含至少一种元素，所述元素选自于硅、锗、碳及其组合。
3.根据权利要求2所述的方法，其特征在于，所述掺杂物选自于硼、磷、砷及其组合。
4.根据权利要求3所述的方法，其特征在于，所述掺杂的多晶硅层具有约1×1019atoms/cm3到约1×1021atoms/cm3的掺杂物浓度。
5.根据权利要求4所述的方法，其特征在于，所述快速热退火的温度范围为约900℃到约1,200℃，并且持续的时间为约2秒到约20秒。
6.根据权利要求4所述的方法，其特征在于，所述激光退火的温度范围为约1,000℃到约1,415℃。
7.根据权利要求6所述的方法，其特征在于，所述激光退火维持约500毫秒或更短。
8.根据权利要求7所述的方法，其特征在于，所述掺杂的多晶硅层具有小于400ohms/cm2的电阻率。
9.一种对衬底上的层进行退火的方法，包括：
在衬底上沉积含有晶格的多晶硅层；
用至少一种元素对所述多晶硅层掺杂以形成掺杂的多晶硅层；以及
用激光对所述掺杂的多晶硅层退火使至少一种掺杂元素进入所述晶格。
10.根据权利要求9所述的方法，其特征在于，所述多晶硅层包含至少一种元素，所述元素选自硅、锗、碳及其组合。
11.根据权利要求10所述的方法，其特征在于，所述至少一种掺杂元素选自硼、磷、砷及其组合。
12.根据权利要求11所述的方法，其特征在于，所述掺杂的多晶硅层的掺杂物浓度范围为约1×1019atoms/cm3到约1×1021atoms/cm3。
13.根据权利要求12所述的方法，其特征在于，所述掺杂的多晶硅层在激光退火前进行快速热退火。
14.根据权利要求13所述的方法，其特征在于，所述快速热退火的温度范围为约800℃到约1,400℃，并且持续的时间为约2秒到约20秒。
15.根据权利要求12所述的方法，其特征在于，所述激光退火的温度范围约为1,000℃到约1,415℃。
16.根据权利要求15所述的方法，其特征在于，所述激光退火维持约500毫秒或更短。
17.根据权利要求16所述的方法，其特征在于，所述掺杂的多晶硅层具有小于400ohms/cm2的电阻率。
18.一种对衬底上掺杂的硅层退火的方法，包括：
在所述衬底上沉积多晶硅层；
用至少一种掺杂元素掺杂所述多晶硅层形成掺杂的多晶硅层；
在第一温度对所述掺杂的多晶硅层进行快速退火；以及
在处于约1,000℃到约1,415℃范围的第二温度对所述掺杂的多晶硅层进行激光退火。
19.根据权利要求18所述的方法，其特征在于，所述多晶硅层包含至少一种元素，所述元素选自硅、锗、碳及其组合。
20.根据权利要求19所述的方法，其特征在于，所述掺杂物选自硼、磷、砷及其组合。
21.根据权利要求20所述的方法，其特征在于，所述掺杂的多晶硅层的掺杂物浓度范围为约1×1019atoms/cm3到约1×1021atoms/cm3。
22.根据权利要求21所述的方法，其特征在于，所述第一温度的范围为约800℃到约1,400℃，该温度持续时间为约2秒到约20秒之间。
23.根据权利要求22所述的方法，其特征在于，所述激光退火维持约500毫秒或更短。
24.根据权利要求23所述的方法，其特征在于，所述掺杂的多晶硅层具有小于400ohms/cm2的电阻率。
25.一种在衬底上形成层的方法，包括：
在衬底上沉积多晶硅层，所述多晶硅层包含掺杂元素和晶格结构；以及
用激光对所述多晶硅层退火以使所述掺杂元素进入构成掺杂的多晶硅层的所述晶格结构中。
26.根据权利要求25所述的方法，其特征在于，所述多晶硅层包含至少一种元素，所述元素选自硅、锗、碳及其组合。
27.根据权利要求26所述的方法，其特征在于，所述掺杂元素选自硼、磷、砷及其组合。
28.根据权利要求27所述的方法，其特征在于，所述掺杂的多晶硅层包含浓度范围为约1×1019atoms/cm3到约1×1021atoms/cm3的所述掺杂元素。
29.根据权利要求28所述的方法，其特征在于，所述多晶硅层在所述激光退火前进行快速热退火。
30.根据权利要求29所述的方法，其特征在于，所述快速热退火的温度范围为约800℃到约1,400℃，持续时间为约2秒到约20秒。
31.根据权利要求30所述的方法，其特征在于，所述激光退火的温度范围为约1000℃到约1,415℃。
32.根据权利要求31所述的方法，其特征在于，所述激光退火维持时间为约100毫秒或更短。
33.根据权利要求32所述的方法，其特征在于，所述掺杂的多晶硅层电阻率小于400ohms/cm2。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/784,904 | 2004-02-23 | ||
| US10/784,904 US7078302B2 (en) | 2004-02-23 | 2004-02-23 | Gate electrode dopant activation method for semiconductor manufacturing including a laser anneal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1922717A true CN1922717A (zh) | 2007-02-28 |
| CN100524630C CN100524630C (zh) | 2009-08-05 |
Family
ID=34861538
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005800051040A Expired - Fee Related CN100524630C (zh) | 2004-02-23 | 2005-02-10 | 用于半导体制造的栅极掺杂物激活方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US7078302B2 (zh) |
| EP (1) | EP1719158A1 (zh) |
| JP (1) | JP5028093B2 (zh) |
| KR (1) | KR101118330B1 (zh) |
| CN (1) | CN100524630C (zh) |
| WO (1) | WO2005083762A1 (zh) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101783298B (zh) * | 2009-01-21 | 2012-11-14 | 中国科学院微电子研究所 | 抑制高k栅介质/金属栅结构界面层生长的方法 |
| CN101678507B (zh) * | 2007-06-18 | 2012-11-28 | 应用材料公司 | 用于热处理工件的处理系统和使衬底激光退火的方法 |
| CN103915487A (zh) * | 2012-12-28 | 2014-07-09 | 爱思开海力士有限公司 | 互补金属氧化物半导体电路及其制造方法 |
| CN105762067A (zh) * | 2014-12-16 | 2016-07-13 | 中芯国际集成电路制造(上海)有限公司 | 栅极的制作方法及半导体器件 |
| CN108922921A (zh) * | 2018-07-23 | 2018-11-30 | 长江存储科技有限责任公司 | 三维存储器、mos场效应晶体管及其制作方法 |
| CN111933696A (zh) * | 2020-10-14 | 2020-11-13 | 南京晶驱集成电路有限公司 | 半导体器件的制备方法 |
Families Citing this family (54)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005020305A2 (en) * | 2003-08-12 | 2005-03-03 | Massachusetts Institute Of Technology | Optical device comprising crystalline semiconductor layer and reflective element |
| US7166528B2 (en) | 2003-10-10 | 2007-01-23 | Applied Materials, Inc. | Methods of selective deposition of heavily doped epitaxial SiGe |
| US8536492B2 (en) * | 2003-10-27 | 2013-09-17 | Applied Materials, Inc. | Processing multilayer semiconductors with multiple heat sources |
| US20080090309A1 (en) | 2003-10-27 | 2008-04-17 | Ranish Joseph M | Controlled annealing method |
| US8119210B2 (en) | 2004-05-21 | 2012-02-21 | Applied Materials, Inc. | Formation of a silicon oxynitride layer on a high-k dielectric material |
| DE102005010080B4 (de) * | 2005-03-03 | 2008-04-03 | Qimonda Ag | Verfahren zum Herstellen einer Dünnschicht-Struktur |
| US7550381B2 (en) * | 2005-07-18 | 2009-06-23 | Applied Materials, Inc. | Contact clean by remote plasma and repair of silicide surface |
| WO2007035660A1 (en) * | 2005-09-20 | 2007-03-29 | Applied Materials, Inc. | Method to form a device on a soi substrate |
| KR100716904B1 (ko) * | 2005-12-28 | 2007-05-10 | 동부일렉트로닉스 주식회사 | 반도체 장치의 보호막 및 그 제조 방법 |
| US7645710B2 (en) | 2006-03-09 | 2010-01-12 | Applied Materials, Inc. | Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system |
| US7678710B2 (en) | 2006-03-09 | 2010-03-16 | Applied Materials, Inc. | Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system |
| US7837838B2 (en) | 2006-03-09 | 2010-11-23 | Applied Materials, Inc. | Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus |
| JP2007243003A (ja) * | 2006-03-10 | 2007-09-20 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
| US7795124B2 (en) | 2006-06-23 | 2010-09-14 | Applied Materials, Inc. | Methods for contact resistance reduction of advanced CMOS devices |
| US7522968B2 (en) * | 2006-07-10 | 2009-04-21 | Applied Materials, Inc. | Scheduling method for processing equipment |
| US20080051930A1 (en) * | 2006-07-10 | 2008-02-28 | Oh Hilario L | Scheduling method for processing equipment |
| WO2008008727A2 (en) * | 2006-07-10 | 2008-01-17 | Applied Materials, Inc. | Scheduling method for processing equipment |
| WO2008016851A1 (en) * | 2006-07-28 | 2008-02-07 | Applied Materials, Inc. | Use of carbon co-implantation with millisecond anneal to produce ultra-shallow junctions |
| US7601648B2 (en) * | 2006-07-31 | 2009-10-13 | Applied Materials, Inc. | Method for fabricating an integrated gate dielectric layer for field effect transistors |
| JP5590886B2 (ja) | 2006-09-26 | 2014-09-17 | アプライド マテリアルズ インコーポレイテッド | 欠陥パシベーションのための高ｋゲート積層構造に対するフッ素プラズマ処理 |
| US20080115808A1 (en) * | 2006-11-20 | 2008-05-22 | Applied Materials, Inc. | In-situ chamber cleaning for an rtp chamber |
| US7615458B2 (en) * | 2007-06-19 | 2009-11-10 | Texas Instruments Incorporated | Activation of CMOS source/drain extensions by ultra-high temperature anneals |
| US20090117701A1 (en) * | 2007-11-01 | 2009-05-07 | Meng-Yi Wu | Method for manufacturing a mos transistor |
| US7800081B2 (en) * | 2007-11-08 | 2010-09-21 | Applied Materials, Inc. | Pulse train annealing method and apparatus |
| US20090120924A1 (en) * | 2007-11-08 | 2009-05-14 | Stephen Moffatt | Pulse train annealing method and apparatus |
| US9498845B2 (en) | 2007-11-08 | 2016-11-22 | Applied Materials, Inc. | Pulse train annealing method and apparatus |
| US7635648B2 (en) * | 2008-04-10 | 2009-12-22 | Applied Materials, Inc. | Methods for fabricating dual material gate in a semiconductor device |
| US7947584B2 (en) * | 2008-05-02 | 2011-05-24 | Applied Materials, Inc. | Suitably short wavelength light for laser annealing of silicon in DSA type systems |
| US7638442B2 (en) * | 2008-05-09 | 2009-12-29 | Promos Technologies, Inc. | Method of forming a silicon nitride layer on a gate oxide film of a semiconductor device and annealing the nitride layer |
| KR20100040455A (ko) * | 2008-10-10 | 2010-04-20 | 주식회사 동부하이텍 | 반도체 소자의 제조 방법 |
| US8329525B2 (en) * | 2010-10-04 | 2012-12-11 | Stmicroelectronics, Inc. | Method for fabricating at least three metal-oxide semiconductor transistors having different threshold voltages |
| US20130137244A1 (en) * | 2011-05-26 | 2013-05-30 | Solexel, Inc. | Method and apparatus for reconditioning a carrier wafer for reuse |
| US9085045B2 (en) | 2011-11-04 | 2015-07-21 | Tokyo Electron Limited | Method and system for controlling a spike anneal process |
| US8927423B2 (en) | 2011-12-16 | 2015-01-06 | Applied Materials, Inc. | Methods for annealing a contact metal layer to form a metal silicidation layer |
| US8586479B2 (en) | 2012-01-23 | 2013-11-19 | Applied Materials, Inc. | Methods for forming a contact metal layer in semiconductor devices |
| US9330939B2 (en) | 2012-03-28 | 2016-05-03 | Applied Materials, Inc. | Method of enabling seamless cobalt gap-fill |
| CN102637581A (zh) * | 2012-04-06 | 2012-08-15 | 上海华力微电子有限公司 | 一种防止硼掺杂层释气的方法 |
| US9401274B2 (en) | 2013-08-09 | 2016-07-26 | Taiwan Semiconductor Manufacturing Company Limited | Methods and systems for dopant activation using microwave radiation |
| US9012315B2 (en) * | 2013-08-09 | 2015-04-21 | Taiwan Semiconductor Manufacturing Company Limited | Methods and systems for dopant activation using microwave radiation |
| TWI660429B (zh) | 2013-09-27 | 2019-05-21 | 美商應用材料股份有限公司 | 實現無縫鈷間隙填充之方法 |
| US9859121B2 (en) | 2015-06-29 | 2018-01-02 | International Business Machines Corporation | Multiple nanosecond laser pulse anneal processes and resultant semiconductor structure |
| US11011635B2 (en) | 2016-12-12 | 2021-05-18 | Applied Materials, Inc. | Method of forming conformal epitaxial semiconductor cladding material over a fin field effect transistor (FINFET) device |
| US10622214B2 (en) | 2017-05-25 | 2020-04-14 | Applied Materials, Inc. | Tungsten defluorination by high pressure treatment |
| US10276411B2 (en) | 2017-08-18 | 2019-04-30 | Applied Materials, Inc. | High pressure and high temperature anneal chamber |
| WO2019036157A1 (en) | 2017-08-18 | 2019-02-21 | Applied Materials, Inc. | HIGH PRESSURE AND HIGH TEMPERATURE RECOVERY CHAMBER |
| EP3707746B1 (en) | 2017-11-11 | 2023-12-27 | Micromaterials LLC | Gas delivery system for high pressure processing chamber |
| JP2021503714A (ja) | 2017-11-17 | 2021-02-12 | アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ | 高圧処理システムのためのコンデンサシステム |
| WO2019173006A1 (en) | 2018-03-09 | 2019-09-12 | Applied Materials, Inc. | High pressure annealing process for metal containing materials |
| US10950429B2 (en) | 2018-05-08 | 2021-03-16 | Applied Materials, Inc. | Methods of forming amorphous carbon hard mask layers and hard mask layers formed therefrom |
| US10748783B2 (en) | 2018-07-25 | 2020-08-18 | Applied Materials, Inc. | Gas delivery module |
| WO2020117462A1 (en) | 2018-12-07 | 2020-06-11 | Applied Materials, Inc. | Semiconductor processing system |
| JP7294858B2 (ja) * | 2019-04-09 | 2023-06-20 | 株式会社Ｓｃｒｅｅｎホールディングス | 熱処理方法および熱処理装置 |
| KR20200121941A (ko) | 2019-04-16 | 2020-10-27 | 삼성디스플레이 주식회사 | 표시 패널 및 표시 패널의 제조 방법 |
| US11901222B2 (en) | 2020-02-17 | 2024-02-13 | Applied Materials, Inc. | Multi-step process for flowable gap-fill film |
Family Cites Families (72)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5898917A (ja) | 1981-12-09 | 1983-06-13 | Seiko Epson Corp | 原子層エビタキシヤル装置 |
| US5294286A (en) | 1984-07-26 | 1994-03-15 | Research Development Corporation Of Japan | Process for forming a thin film of silicon |
| US5693139A (en) | 1984-07-26 | 1997-12-02 | Research Development Corporation Of Japan | Growth of doped semiconductor monolayers |
| JPS62171999A (ja) | 1986-01-27 | 1987-07-28 | Nippon Telegr & Teleph Corp <Ntt> | ３−ｖ族化合物半導体のエピタキシヤル結晶成長方法 |
| JPS6362313A (ja) | 1986-09-03 | 1988-03-18 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH0639357B2 (ja) | 1986-09-08 | 1994-05-25 | 新技術開発事業団 | 元素半導体単結晶薄膜の成長方法 |
| US5607511A (en) | 1992-02-21 | 1997-03-04 | International Business Machines Corporation | Method and apparatus for low temperature, low pressure chemical vapor deposition of epitaxial silicon layers |
| JPH01270593A (ja) | 1988-04-21 | 1989-10-27 | Fujitsu Ltd | 化合物半導体層形成方法 |
| JP2764727B2 (ja) * | 1988-09-30 | 1998-06-11 | ソニー株式会社 | 半導体装置の製造方法 |
| US5112439A (en) | 1988-11-30 | 1992-05-12 | Mcnc | Method for selectively depositing material on substrates |
| JPH02172895A (ja) | 1988-12-22 | 1990-07-04 | Nec Corp | 半導体の結晶成長方法 |
| JPH0824191B2 (ja) | 1989-03-17 | 1996-03-06 | 富士通株式会社 | 薄膜トランジスタ |
| EP0413982B1 (en) | 1989-07-27 | 1997-05-14 | Junichi Nishizawa | Impurity doping method with adsorbed diffusion source |
| JPH03286522A (ja) | 1990-04-03 | 1991-12-17 | Nec Corp | Ｓｉの結晶成長方法 |
| JPH0547665A (ja) | 1991-08-12 | 1993-02-26 | Fujitsu Ltd | 気相成長方法 |
| JP2828152B2 (ja) | 1991-08-13 | 1998-11-25 | 富士通 株式会社 | 薄膜形成方法、多層構造膜及びシリコン薄膜トランジスタの形成方法 |
| US5480818A (en) | 1992-02-10 | 1996-01-02 | Fujitsu Limited | Method for forming a film and method for manufacturing a thin film transistor |
| JP3211394B2 (ja) | 1992-08-13 | 2001-09-25 | ソニー株式会社 | 半導体装置の製造方法 |
| JPH0750690B2 (ja) | 1992-08-21 | 1995-05-31 | 日本電気株式会社 | ハロゲン化物を用いる半導体結晶のエピタキシャル成長方法とその装置 |
| US5273930A (en) | 1992-09-03 | 1993-12-28 | Motorola, Inc. | Method of forming a non-selective silicon-germanium epitaxial film |
| US5372860A (en) | 1993-07-06 | 1994-12-13 | Corning Incorporated | Silicon device production |
| JPH07109573A (ja) | 1993-10-12 | 1995-04-25 | Semiconductor Energy Lab Co Ltd | ガラス基板および加熱処理方法 |
| US5796116A (en) | 1994-07-27 | 1998-08-18 | Sharp Kabushiki Kaisha | Thin-film semiconductor device including a semiconductor film with high field-effect mobility |
| AUPO347196A0 (en) | 1996-11-06 | 1996-12-05 | Pacific Solar Pty Limited | Improved method of forming polycrystalline-silicon films on glass |
| US5807792A (en) | 1996-12-18 | 1998-09-15 | Siemens Aktiengesellschaft | Uniform distribution of reactants in a device layer |
| US6335280B1 (en) | 1997-01-13 | 2002-01-01 | Asm America, Inc. | Tungsten silicide deposition process |
| US5908307A (en) | 1997-01-31 | 1999-06-01 | Ultratech Stepper, Inc. | Fabrication method for reduced-dimension FET devices |
| US6118216A (en) | 1997-06-02 | 2000-09-12 | Osram Sylvania Inc. | Lead and arsenic free borosilicate glass and lamp containing same |
| US5966605A (en) * | 1997-11-07 | 1999-10-12 | Advanced Micro Devices, Inc. | Reduction of poly depletion in semiconductor integrated circuits |
| US6042654A (en) | 1998-01-13 | 2000-03-28 | Applied Materials, Inc. | Method of cleaning CVD cold-wall chamber and exhaust lines |
| US6514880B2 (en) | 1998-02-05 | 2003-02-04 | Asm Japan K.K. | Siloxan polymer film on semiconductor substrate and method for forming same |
| US6383955B1 (en) | 1998-02-05 | 2002-05-07 | Asm Japan K.K. | Silicone polymer insulation film on semiconductor substrate and method for forming the film |
| TW437017B (en) | 1998-02-05 | 2001-05-28 | Asm Japan Kk | Silicone polymer insulation film on semiconductor substrate and method for formation thereof |
| US6159852A (en) | 1998-02-13 | 2000-12-12 | Micron Technology, Inc. | Method of depositing polysilicon, method of fabricating a field effect transistor, method of forming a contact to a substrate, method of forming a capacitor |
| US6797558B2 (en) | 2001-04-24 | 2004-09-28 | Micron Technology, Inc. | Methods of forming a capacitor with substantially selective deposite of polysilicon on a substantially crystalline capacitor dielectric layer |
| US6100171A (en) | 1998-03-03 | 2000-08-08 | Advanced Micro Devices, Inc. | Reduction of boron penetration by laser anneal removal of fluorine |
| KR100652909B1 (ko) | 1998-03-06 | 2006-12-01 | 에이에스엠 아메리카, 인코포레이티드 | 하이 스텝 커버리지를 갖는 실리콘 증착 방법 |
| JP4214585B2 (ja) | 1998-04-24 | 2009-01-28 | 富士ゼロックス株式会社 | 半導体デバイス、半導体デバイスの製造方法及び製造装置 |
| US6025627A (en) | 1998-05-29 | 2000-02-15 | Micron Technology, Inc. | Alternate method and structure for improved floating gate tunneling devices |
| US6037235A (en) | 1998-09-14 | 2000-03-14 | Applied Materials, Inc. | Hydrogen anneal for curing defects of silicon/nitride interfaces of semiconductor devices |
| KR100287180B1 (ko) | 1998-09-17 | 2001-04-16 | 윤종용 | 계면 조절층을 이용하여 금속 배선층을 형성하는 반도체 소자의 제조 방법 |
| US6305314B1 (en) | 1999-03-11 | 2001-10-23 | Genvs, Inc. | Apparatus and concept for minimizing parasitic chemical vapor deposition during atomic layer deposition |
| KR20010017820A (ko) | 1999-08-14 | 2001-03-05 | 윤종용 | 반도체 소자 및 그 제조방법 |
| US6489241B1 (en) | 1999-09-17 | 2002-12-03 | Applied Materials, Inc. | Apparatus and method for surface finishing a silicon film |
| TW468212B (en) | 1999-10-25 | 2001-12-11 | Motorola Inc | Method for fabricating a semiconductor structure including a metal oxide interface with silicon |
| WO2001041544A2 (en) | 1999-12-11 | 2001-06-14 | Asm America, Inc. | Deposition of gate stacks including silicon germanium layers |
| US6291319B1 (en) | 1999-12-17 | 2001-09-18 | Motorola, Inc. | Method for fabricating a semiconductor structure having a stable crystalline interface with silicon |
| US6348420B1 (en) | 1999-12-23 | 2002-02-19 | Asm America, Inc. | Situ dielectric stacks |
| EP1123991A3 (en) | 2000-02-08 | 2002-11-13 | Asm Japan K.K. | Low dielectric constant materials and processes |
| JP4942128B2 (ja) * | 2000-03-17 | 2012-05-30 | バリアン・セミコンダクター・エクイップメント・アソシエイツ・インコーポレイテッド | レーザーアニーリングおよび急速熱アニーリングにより極めて浅い接合を形成する方法 |
| US6645838B1 (en) | 2000-04-10 | 2003-11-11 | Ultratech Stepper, Inc. | Selective absorption process for forming an activated doped region in a semiconductor |
| US6458718B1 (en) | 2000-04-28 | 2002-10-01 | Asm Japan K.K. | Fluorine-containing materials and processes |
| US6635588B1 (en) | 2000-06-12 | 2003-10-21 | Ultratech Stepper, Inc. | Method for laser thermal processing using thermally induced reflectivity switch |
| US6303476B1 (en) | 2000-06-12 | 2001-10-16 | Ultratech Stepper, Inc. | Thermally induced reflectivity switch for laser thermal processing |
| JP2002198525A (ja) | 2000-12-27 | 2002-07-12 | Toshiba Corp | 半導体装置及びその製造方法 |
| KR100393208B1 (ko) | 2001-01-15 | 2003-07-31 | 삼성전자주식회사 | 도핑된 다결정 실리콘-저매니움막을 이용한 반도체 소자및 그 제조방법 |
| US6528374B2 (en) | 2001-02-05 | 2003-03-04 | International Business Machines Corporation | Method for forming dielectric stack without interfacial layer |
| US7026219B2 (en) | 2001-02-12 | 2006-04-11 | Asm America, Inc. | Integration of high k gate dielectric |
| AU2002306436A1 (en) | 2001-02-12 | 2002-10-15 | Asm America, Inc. | Improved process for deposition of semiconductor films |
| JP2004533118A (ja) | 2001-05-30 | 2004-10-28 | エーエスエム アメリカ インコーポレイテッド | 低温搬入出およびベーク |
| US20030025167A1 (en) * | 2001-07-31 | 2003-02-06 | International Business Machines Corporation | Activating in-situ doped gate on high dielectric constant materials |
| US6777317B2 (en) | 2001-08-29 | 2004-08-17 | Ultratech Stepper, Inc. | Method for semiconductor gate doping |
| US7439191B2 (en) | 2002-04-05 | 2008-10-21 | Applied Materials, Inc. | Deposition of silicon layers for active matrix liquid crystal display (AMLCD) applications |
| US6784101B1 (en) * | 2002-05-16 | 2004-08-31 | Advanced Micro Devices Inc | Formation of high-k gate dielectric layers for MOS devices fabricated on strained lattice semiconductor substrates with minimized stress relaxation |
| JP3699946B2 (ja) * | 2002-07-25 | 2005-09-28 | 株式会社東芝 | 半導体装置の製造方法 |
| US7186630B2 (en) | 2002-08-14 | 2007-03-06 | Asm America, Inc. | Deposition of amorphous silicon-containing films |
| US6821868B2 (en) * | 2002-12-27 | 2004-11-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming nitrogen enriched gate dielectric with low effective oxide thickness |
| US6998305B2 (en) | 2003-01-24 | 2006-02-14 | Asm America, Inc. | Enhanced selectivity for epitaxial deposition |
| US20040226911A1 (en) | 2003-04-24 | 2004-11-18 | David Dutton | Low-temperature etching environment |
| US6982433B2 (en) | 2003-06-12 | 2006-01-03 | Intel Corporation | Gate-induced strain for MOS performance improvement |
| US7166528B2 (en) | 2003-10-10 | 2007-01-23 | Applied Materials, Inc. | Methods of selective deposition of heavily doped epitaxial SiGe |
| US7045432B2 (en) | 2004-02-04 | 2006-05-16 | Freescale Semiconductor, Inc. | Method for forming a semiconductor device with local semiconductor-on-insulator (SOI) |
-
2004
- 2004-02-23 US US10/784,904 patent/US7078302B2/en active Active
-
2005
- 2005-02-10 CN CNB2005800051040A patent/CN100524630C/zh not_active Expired - Fee Related
- 2005-02-10 WO PCT/US2005/004318 patent/WO2005083762A1/en active Application Filing
- 2005-02-10 JP JP2006554137A patent/JP5028093B2/ja not_active Expired - Fee Related
- 2005-02-10 KR KR1020067019046A patent/KR101118330B1/ko not_active IP Right Cessation
- 2005-02-10 EP EP05722937A patent/EP1719158A1/en not_active Withdrawn
-
2006
- 2006-07-05 US US11/428,758 patent/US7611976B2/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101678507B (zh) * | 2007-06-18 | 2012-11-28 | 应用材料公司 | 用于热处理工件的处理系统和使衬底激光退火的方法 |
| CN101783298B (zh) * | 2009-01-21 | 2012-11-14 | 中国科学院微电子研究所 | 抑制高k栅介质/金属栅结构界面层生长的方法 |
| CN103915487A (zh) * | 2012-12-28 | 2014-07-09 | 爱思开海力士有限公司 | 互补金属氧化物半导体电路及其制造方法 |
| CN105762067A (zh) * | 2014-12-16 | 2016-07-13 | 中芯国际集成电路制造(上海)有限公司 | 栅极的制作方法及半导体器件 |
| CN108922921A (zh) * | 2018-07-23 | 2018-11-30 | 长江存储科技有限责任公司 | 三维存储器、mos场效应晶体管及其制作方法 |
| CN111933696A (zh) * | 2020-10-14 | 2020-11-13 | 南京晶驱集成电路有限公司 | 半导体器件的制备方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20060286763A1 (en) | 2006-12-21 |
| KR101118330B1 (ko) | 2012-03-12 |
| EP1719158A1 (en) | 2006-11-08 |
| US7078302B2 (en) | 2006-07-18 |
| US20050186765A1 (en) | 2005-08-25 |
| JP2007523491A (ja) | 2007-08-16 |
| CN100524630C (zh) | 2009-08-05 |
| US7611976B2 (en) | 2009-11-03 |
| JP5028093B2 (ja) | 2012-09-19 |
| WO2005083762A1 (en) | 2005-09-09 |
| KR20070020426A (ko) | 2007-02-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100524630C (zh) | 用于半导体制造的栅极掺杂物激活方法 | |
| CN100429788C (zh) | 用于提高mos性能的引入栅极的应变 | |
| US5972765A (en) | Use of deuterated materials in semiconductor processing | |
| US8105959B2 (en) | Method for manufacturing a semiconductor device having a nitrogen-containing gate insulating film | |
| US6730584B2 (en) | Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures | |
| CN1118864C (zh) | 利用相变来制造半导体器件的方法 | |
| CN1967780A (zh) | 用于制作场效应晶体管的栅极电介质的方法 | |
| CN1825543A (zh) | 半导体衬底的原位净化方法和半导体器件制造方法 | |
| JP2009164569A (ja) | 制御された結晶構造を用いた、ドーパント及び多層シリコン膜の使用による多結晶シリコン膜及び周囲層の応力の調節 | |
| CN1873921A (zh) | 半导体元件制造方法及电容器的制造方法 | |
| CN102856177A (zh) | 半导体器件和用于制造半导体器件的方法 | |
| US11881404B2 (en) | Method and system for diffusing magnesium in gallium nitride materials using sputtered magnesium sources | |
| US8580034B2 (en) | Low-temperature dielectric formation for devices with strained germanium-containing channels | |
| TWI484556B (zh) | 在矽基材上形成高生長速率低電阻率的鍺膜之方法（二） | |
| CN1905138A (zh) | 半导体器件及其制造方法 | |
| US6440829B1 (en) | N-profile engineering at the poly/gate oxide and gate oxide/SI interfaces through NH3 annealing of a layered poly/amorphous-silicon structure | |
| KR102608340B1 (ko) | 엑시머 레이저 어닐링을 이용한 초저접합 실리사이드층 형성방법 | |
| TWI805752B (zh) | 矽化物膜成核 | |
| KR100920038B1 (ko) | 반도체 소자의 게이트 및 그의 형성방법 | |
| US20020125479A1 (en) | MOSFET and method of its fabrication | |
| JPH03297148A (ja) | 半導体装置の製造方法 | |
| CN1612306A (zh) | 处理包含含氧氮化硅介质层的半导体器件的方法 | |
| KR100223275B1 (ko) | 반도체 소자의 폴리실리콘층 형성방법 | |
| JP2003178990A (ja) | 基板熱処理方法、半導体装置の製造方法、化学気相堆積方法及ディスプレイ | |
| KR100914292B1 (ko) | 실리콘 나노크리스탈을 갖는 전하트랩층 형성방법과, 이를이용한 불휘발성 메모리소자 및 그 제조방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee | ||
| CP01 | Change in the name or title of a patent holder |
Address after: American California Patentee after: Applied Materials Inc. Address before: American California Patentee before: Applied Materials Inc. |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090805 Termination date: 20140210 |