CN1916853B - Method and device of protecting code segment in use for MIPS system - Google Patents
Method and device of protecting code segment in use for MIPS system Download PDFInfo
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- CN1916853B CN1916853B CN200610153271A CN200610153271A CN1916853B CN 1916853 B CN1916853 B CN 1916853B CN 200610153271 A CN200610153271 A CN 200610153271A CN 200610153271 A CN200610153271 A CN 200610153271A CN 1916853 B CN1916853 B CN 1916853B
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Abstract
A method for protecting code section used in MIPS system includes making addresses of code section and data section be both placed in region being able to be converted by internal memory management unit in MIPS system when host software is compiled and generated, making code section and data section be placed in said region in program address space of host software when host software is started up. The protection device for realizing said method is also disclosed.
Description
Technical field
The present invention relates to the communications field, more specifically, relate to the code segment guard method and the device of a kind of MIPS of being used for system.
Background technology
MIPS (Microprocessor without Interlocked Pipe Stages, the microprocessor of no interlocking pipeline stages) is RISC (Reduced Instruction SetComputer efficiently, Reduced Instruction Set Computer) the most graceful a kind of architecture in the architecture, it has utilized pipelining well.In MIPS 32 and MIPS 64, the space, program address is the most frequently used following 4 zones, has different attributes respectively:
Kuseg: address space is 0x00000000～0x7FFFFFFF (low side 2GB), and these are addresses available under the user model.In the machine that has MMU (Memory Manage Unit, memory management unit), these addresses all will be changed by MMU;
Kseg0: address space is 0x80000000～0x9FFFFFFF (512MB), all is by cache the address in this section zone to be conducted interviews generally speaking;
Kseg1: address space is 0xA0000000～0xBFFFFFFF (512MB), and kseg1 is (uncached) by the Cache access not, and kseg1 is unique address space that can operate as normal when restarting in system;
Kseg2: address space is 0xC0000000～0xFFFFFFFF (1GB), and this sector address space can only be used under kernel mode and will be through the conversion of MMU.
Under a MIPS system, in the at present normal scheme of using with BIOS (Basic InputOutput System, Basic Input or Output System (BIOS)) program space address of software and host software all is arranged in the kseg0 zone, adopts the order of start-up course of computer system of this scheme as follows:
1, Board Power up;
2, start BIOS, begin the space, program address of BIOS is carried in the kseg1 zone, behind the initialization MMU, the bios program space is switched to kseg0;
3, in bios program, host software is copied in the internal memory (address space of kseg0);
4, program pointer jumps to and begins in the start address (address space of kseg0) of host software in internal memory to carry out;
5, host software brings into operation.
In the implementation procedure of technique scheme, because the space, program address of host software is in the kseg0 zone, so only need be the most significant digit zero clearing, these addresses just are converted into physical address, then they are mapped to the low field of 512MB size in the physical memory (in the 0x00000000～0x1FFFFFFF) continuously, this conversion be a kind of cache mode visit (also be virtual address) from the program address to the direct mapping of physical address, this address space always is read-write like this.
In actual applications, after being added in the internal memory, system start-up post code section generally can not change again, but cause code segment is rewritten unusually such as software defect for a certain reason, the system that then will make takes place unusual, when taking place to be difficult to orient the true cause that code segment is rewritten when this code segment is rewritten again.So in the host software actual moving process of the MIPS system that adopts this technical scheme, usually cause program code segments has been carried out unusual rewriting such as the defective of software for a certain reason, make system's generation anomaly ratio as resetting or collapse, and rewritten true cause for this code segment and position.
From top description as can be seen, correlation technique can't accomplish code segment is protected, and is difficult to realize the demand of this code segment protection.
Therefore, people need a kind of solution that is used for MIPS system protection code segment, can solve the problem in the above-mentioned correlation technique.
Summary of the invention
The invention provides the code segment guard method and the device that are used for the MIPS system, be used to solve the problem that above-mentioned MIPS system can't protect code segment.
According to an aspect of the present invention, the code segment guard method of a kind of MIPS of being used for system is provided, may further comprise the steps: step a when compiling generates host software, drops in the zone of the memory management unit conversion that can pass through in the MIPS system address of its code segment and data segment; And step b, when starting host software, code segment and the data segment space, program address in host software is dropped in this zone.
In above-mentioned code segment guard method, step b may further comprise the steps: step b1 in this zone, setting up the code segment space, and is set to the program address spatial mappings of code segment can not write; And step b2, the program address spatial mappings of data segment in this zone, setting up the data segment space, and is set to and can writes, wherein, make code segment space and data segment space not overlapping.
In above-mentioned code segment guard method, step b1 is further comprising the steps of: utilize the trap service operations to inquire about the details of the write operation of rewriting the code segment space.
In above-mentioned code segment guard method, step b1 and b2 carry out the unloading phase of the BIOS of MIPS system.
In above-mentioned code segment guard method, step b1 may further comprise the steps: the translation look aside buffer list item of setting up the space, program address of code segment, according to the size of code segment, with the program address spatial mappings of code segment in this zone in 0 initial space, to set up the code segment space; And the Dirty position of the BIT2 of EntryLo0/1 register is set to represent that the code segment space is for writing in the pairing translation look aside buffer list item in code segment space.
In above-mentioned code segment guard method, step b2 may further comprise the steps: the translation look aside buffer list item of setting up the space, program address of data segment, size according to data segment, with the program address spatial mappings of data segment in this zone in initial space, end address, code segment space, to set up the data segment space; And the Dirty position of the BIT2 of EntryLo0/1 register is set to represent that the data segment space is for writing in the translation look aside buffer list item.
In above-mentioned code segment guard method, the zone is for being not the address field of kseg0, comprising kuseg, kseg1, kseg2.
According to a further aspect in the invention, the code segment protective device of a kind of MIPS of being used for system is provided, comprise: collector, be used for when compiling generates host software, the address of its code segment and data segment is all dropped in the zone of the memory management unit conversion that can pass through in the MIPS system; And the startup module, be used for when starting host software, code segment and the data segment space, program address in host software being dropped in this zone.
In above-mentioned code segment protective device, start module and comprise: the code segment space module, be used for program address spatial mappings with code segment in this zone, setting up the code segment space, and be set to and can not write; And the data segment space module, be used for the program address spatial mappings of data segment in this zone, setting up the data segment space, and be set to and can write, wherein, make code segment space and data segment space not overlapping.
In above-mentioned code segment protective device, the code segment space module also comprises the trap module, is used for inquiring about by the trap service operations details of the write operation of rewriting the code segment space.
In above-mentioned code segment protective device, code segment space module and other sections space module are carried out the unloading phase of the BIOS of MIPS system.
In above-mentioned code segment protective device, the code segment space module comprises: module is set up in the code segment space, be used to set up the translation look aside buffer list item in the space, program address of code segment, size according to code segment, with the program address spatial mappings of code segment in this zone in 0 initial space, to set up the code segment space; And can not write module is set, the Dirty position that is used for the BIT2 of code segment space pairing translation look aside buffer list item EntryLo0/1 register is set to represent that the code segment space is for writing.
In above-mentioned code segment protective device, the data segment space module comprises: module is set up in the data segment space, be used to set up the translation look aside buffer list item in the space, program address of data segment, size according to data segment, with the program address spatial mappings of data segment in this zone in initial space, end address, code segment space, to set up the data segment space; And can write module is set, the Dirty position that is used for the BIT2 of translation look aside buffer list item EntryLo0/1 register is set to represent that the data segment space is for writing.
In above-mentioned code segment protective device, the zone is for being not the address field of kseg0, comprising kuseg, kseg1, kseg2.
By technique scheme, the present invention has realized following technique effect:
Can be implemented in the MIPS system that supports MMU the protection of code segment, avoid the quilt of code segment to rewrite.And, according to the scheme of selecting of the present invention, when task or process etc. attempts to revise code segment, can catching exception and catch out the task of will rewrite this code segment or the details of process, thus the robustness of enhanced system and maintainability.
Other features and advantages of the present invention will be set forth in the following description, and, partly from instructions, become apparent, perhaps understand by implementing the present invention.Purpose of the present invention and other advantages can realize and obtain by specifically noted structure in the instructions of being write, claims and accompanying drawing.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 shows the process flow diagram according to the code segment guard method of the MIPS of being used for of the present invention system;
Fig. 2 shows program address spatial division figure according to an embodiment of the invention;
Fig. 3 shows the process flow diagram of code segment guard method according to one embodiment of present invention; And
Fig. 4 shows the block scheme according to the code segment protective device of the MIPS of being used for of the present invention system.
Embodiment
By above analysis to related art scheme; the present invention proposes; accomplish the code segment of host software is protected; at first to make code segment and the data segment space, program address in host software not in the kseg0 zone, but make the space, program address of host software drop on can zone by the MMU conversion in.The address of code segment and data segment is all dropped in this zone that can change by MMU.
Below with reference to the accompanying drawings and in conjunction with the embodiments, describe the present invention in detail.
Fig. 1 shows the process flow diagram of the method for a kind of MIPS of being used for system code segment protect, and it may further comprise the steps:
Step S 102, when compiling generates host software, the address of its code segment and data segment all dropped in the zone of the memory management unit conversion that can pass through in the MIPS system; And
Step S104 when starting host software, drops in this zone code segment and the data segment space, program address in host software.
Alternatively, step S104 may further comprise the steps: step S104-1 in this zone, setting up the code segment space, and is set to the program address spatial mappings of code segment can not write; And step S104-2, the program address spatial mappings of data segment in this zone, setting up the data segment space, and is set to and can writes, wherein, make code segment space and data segment space not overlapping.
Alternatively, step S104-1 is further comprising the steps of: utilize the trap service operations to inquire about the details of the write operation of rewriting the code segment space.
Alternatively, step S104-1 and S104-2 carry out the unloading phase of the BIOS of MIPS system.
Alternatively, step S104-1 may further comprise the steps: the translation look aside buffer list item of setting up the space, program address of code segment, according to the size of code segment, with the program address spatial mappings of code segment in this zone in 0 initial space, to set up the code segment space; And the Dirty position of the BIT2 of EntryLo0/1 register is set to represent that the code segment space is for writing in the pairing translation look aside buffer list item in code segment space.
Alternatively, step S104-2 may further comprise the steps: the translation look aside buffer list item of setting up the space, program address of data segment, size according to data segment, with the program address spatial mappings of data segment in this zone in initial space, end address, code segment space, to set up the data segment space; And the Dirty position of the BIT2 of EntryLo0/1 register is set to represent that the data segment space is for writing in the translation look aside buffer list item.
Alternatively, the zone is for being not the address field of kseg0, comprising kuseg, kseg1, kseg2.
As can be seen; said method has been realized protection to code segment; code segment can not be rewritten, and catching exception and catch out the task of will rewrite this code segment or the details of process when task or process etc. attempts to revise code segment is realized the robustness and the maintainability of system.Obviously, this MIPS system must support MMU.
The present invention selects code segment and data segment the space, program address in host software to drop on and illustrates realization of the present invention in the kuseg zone.
Illustrating at first that step S102 among Fig. 1 drops on the space, program address of host software can be by the implementation method in the zone of MMU conversion.
In bios software, set up of the mapping of internal memory virtual address to physical address by configuration TLB (Translation Lookaside Buffer, translation look aside buffer).Can support that MMU EntryLo 0/1 register is as follows in the MIPS system of MMU:
| 31 30 | 29 6 | 5 3 | 2 | 1 | 0 |
| 0 | FPN | C | D | V | G |
Wherein D (Dirty position) is used as " writing permission " position.Being changed to 1 expression and allowing to write, is that 0 any use is originally deciphered the write operation that carries out and all can be fallen into trap.
At first, set up the tlb entry in host software code segment space, size according to the host software code segment, the address space of host software code segment is mapped in the kuseg zone in 0 initial space, the Dirty position of the BIT2 of EntryLo0/1 register is 0 in this tlb entry, represents that space, this section program address can not write.
Secondly, also being mapped in the kuseg zone other physical address space in the internal memory with end address, code segment space is in the initial space, the Dirty position of the BIT2 of EntryLo0/1 register is 1 in this tlb entry, represents that space, this section program address can write.The program address spatial division figure of physical memory as shown in Figure 2 like this.
When the space, program address of code segment can not be write, will fall into trap for the write operation of rewriting code segment, can inquire about the details of this write operation at the trap service routine, such as the task ID at this write operation place or process ID, the write address etc. of wanting, the realization of trap service routine is all similar, unusual such as in Vxworks operating system, producing TLBMOD, and print unusual details, be not described in detail here.
Fig. 3 shows the process flow diagram of code segment guard method according to one embodiment of present invention, and this embodiment is for realizing system start-up, and its step is as follows:
Step S302, the Board Power up with MIPS system;
Step S304 starts BIOS, and the space, program address of beginning BIOS behind the initialization MMU, switches to kseg0 with the bios program space in the kseg1 zone;
Step S306, in bios software, configuration TLB is mapped to the address space of host software code segment in the kuseg zone in 0 initial space, the Dirty position of the BIT2 of EntryLo0/1 register is 0 in this tlb entry, represents that space, this section program address can not write; Secondly, also being mapped in the kuseg zone other physical address space in the internal memory with end address, code segment space is in the initial space, the Dirty position of the BIT2 of EntryLo0/1 register is 1 in this tlb entry, represents that space, this section program address can write;
Step S308 in bios software, copies the file destination of host software in the kseg0 zone address C, and wherein the address B in address C and the top kuseg zone is mapped as the same physical address in the internal memory;
Step S310, the start address B that the program pointer of MIPS CPU is jumped to host software brings into operation, and wherein address B is the start address of the host software in the kuseg zone;
Step S312, host software brings into operation, and its space, program address is in the kuseg zone.
Attempt code segment is carried out write operation as task, because space, code segment program address can not write, so this write operation will cause falling into trap, thereby code segment is realized protection.
Fig. 4 shows the block scheme according to the code segment protective device of the MIPS of being used for of the present invention system.Shown in code segment protective device 400 comprise:
Alternatively, start module 404 and comprise: code segment space module (not shown), be used for program address spatial mappings with code segment in this zone, setting up the code segment space, and be set to and can not write; And data segment space module (not shown), be used for the program address spatial mappings of data segment in this zone, setting up the data segment space, and be set to and can write, wherein, make code segment space and data segment space not overlapping.
Alternatively, the code segment space module also comprises trap module (not shown), is used for inquiring about by the trap service operations details of the write operation of rewriting the code segment space.
Alternatively, code segment space module and other sections space module are carried out the unloading phase of the BIOS of MIPS system.
Alternatively, the code segment space module comprises: the module (not shown) is set up in the code segment space, be used to set up the translation look aside buffer list item in the space, program address of code segment, size according to code segment, with the program address spatial mappings of code segment in this zone in 0 initial space, to set up the code segment space; And can not write the module (not shown) is set, the Dirty position that is used for the BIT2 of code segment space pairing translation look aside buffer list item EntryLo0/1 register is set to represent that the code segment space is for writing.
Alternatively, the data segment space module comprises: the module (not shown) is set up in the data segment space, be used to set up the translation look aside buffer list item in the space, program address of data segment, size according to data segment, with the program address spatial mappings of data segment in this zone in initial space, end address, code segment space, to set up the data segment space; And can write the module (not shown) is set, the Dirty position that is used for the BIT2 of translation look aside buffer list item EntryLo0/1 register is set to represent that the data segment space is for writing.
Alternatively, the zone is for being not the address field of kseg0, comprising kuseg, kseg1, kseg2.
As can be seen from the above description, the present invention has realized following technique effect:
Can be implemented in the MIPS system that supports MMU the protection of code segment, avoid the quilt of code segment to rewrite.And, according to the scheme of selecting of the present invention, when task or process etc. attempts to revise code segment, can catching exception and catch out the task of will rewrite this code segment or the details of process, thus the robustness of enhanced system and maintainability.
Obviously, those skilled in the art should be understood that, above-mentioned each module of the present invention or each step can realize with the general calculation device, they can concentrate on the single calculation element, perhaps be distributed on the network that a plurality of calculation element forms, alternatively, they can be realized with the executable program code of calculation element, thereby, they can be stored in the memory storage and carry out by calculation element, perhaps they are made into each integrated circuit modules respectively, perhaps a plurality of modules in them or step are made into the single integrated circuit module and realize.Like this, the present invention is not restricted to any specific hardware and software combination.Should be understood that the variation in these concrete enforcements is conspicuous for a person skilled in the art, do not break away from spiritual protection domain of the present invention.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (14)
1. a code segment guard method that is used for the MIPS system is characterized in that, may further comprise the steps:
Step a when compiling generates host software, drops in the zone that can change by the memory management unit in the described MIPS system address of its code segment and data segment; And
Step b when starting host software, drops in the described zone described code segment and the data segment space, program address in host software.
2. code segment guard method according to claim 1 is characterized in that, described step b may further comprise the steps:
Step b1 in described zone, setting up the code segment space, and is set to the program address spatial mappings of described code segment can not write; And
Step b2 in described zone, setting up the data segment space, and is set to the program address spatial mappings of described data segment can write, and wherein, makes described code segment space and described data segment space not overlapping.
3. code segment guard method according to claim 2 is characterized in that, described step b1 is further comprising the steps of:
Utilize the trap service operations to inquire about the details of the write operation of rewriting described code segment space.
4. code segment guard method according to claim 2 is characterized in that, described step b1 and b2 carry out the unloading phase of the BIOS of described MIPS system.
5. code segment guard method according to claim 2 is characterized in that, described step b1 may further comprise the steps:
Set up the translation look aside buffer list item in the space, program address of described code segment, according to the size of described code segment, with the program address spatial mappings of described code segment in the described zone in 0 initial space, to set up described code segment space;
And
The Dirty position of the BIT2 of EntryLo0/1 register is set to represent that described code segment space is for writing in the pairing translation look aside buffer list item in described code segment space.
6. code segment guard method according to claim 2 is characterized in that, described step b2 may further comprise the steps:
Set up the translation look aside buffer list item in the space, program address of described data segment, size according to described data segment, with the program address spatial mappings of described data segment in the described zone in initial space, end address, described code segment space, to set up described data segment space; And
The Dirty position of the BIT2 of EntryLo0/1 register is set to represent that described data segment space is for writing in the described translation look aside buffer list item.
7. require each described code segment guard method in 1 to 6 according to aforesaid right, it is characterized in that, described zone is for being not the address field of kseg0, comprising kuseg, kseg1, kseg2.
8. a code segment protective device that is used for the MIPS system is characterized in that, comprising:
Collector is used for when compiling generates host software, and the address of its code segment and data segment is all dropped in the zone that can change by the memory management unit in the described MIPS system; And
Start module, be used for when starting host software, described code segment and the data segment space, program address in host software being dropped in the described zone.
9. code segment protective device according to claim 8 is characterized in that, described startup module comprises:
The code segment space module is used for the program address spatial mappings of described code segment in described zone, setting up the code segment space, and is set to and can not writes; And
The data segment space module is used for the program address spatial mappings of described data segment in described zone, and setting up the data segment space, and be set to and can write, wherein,
Make described code segment space and described data segment space not overlapping.
10. code segment protective device according to claim 9 is characterized in that, described code segment space module also comprises the trap module, is used for inquiring about by the trap service operations details of the write operation of rewriting described code segment space.
11. code segment protective device according to claim 9 is characterized in that, described code segment space module and other sections space module are carried out the unloading phase of the BIOS of described MIPS system.
12. code segment protective device according to claim 9 is characterized in that, described code segment space module comprises:
Module is set up in the code segment space, be used to set up the translation look aside buffer list item in the space, program address of described code segment, according to the size of described code segment, with the program address spatial mappings of described code segment in the described zone in 0 initial space, to set up described code segment space; And
Can not write module is set, the Dirty position that is used for the BIT2 of described code segment space pairing translation look aside buffer list item EntryLo0/1 register is set to represent that described code segment space is for writing.
13. code segment protective device according to claim 9 is characterized in that, described data segment space module comprises:
Module is set up in the data segment space, be used to set up the translation look aside buffer list item in the space, program address of described data segment, size according to described data segment, with the program address spatial mappings of described data segment in the described zone in initial space, end address, described code segment space, to set up described data segment space; And can write module is set, the Dirty position that is used for the BIT2 of described translation look aside buffer list item EntryLo0/1 register is set to represent that described data segment space is for writing.
14. require each described code segment protective device in 8 to 13, it is characterized in that described zone is for being not the address field of kseg0, comprising kuseg, kseg1, kseg2 according to aforesaid right.
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| CN107291423B (en) * | 2016-03-31 | 2020-09-29 | 龙芯中科技术有限公司 | Method and device for constructing operating environment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5136713A (en) * | 1989-08-25 | 1992-08-04 | International Business Machines Corporation | Apparatus and method for decreasing the memory requirements for bios in a personal computer system |
| CN1545041A (en) * | 2003-11-14 | 2004-11-10 | 港湾网络有限公司 | Double-CPU micro-kernel based on MIPS64 |
| CN1556472A (en) * | 2003-12-31 | 2004-12-22 | 中兴通讯股份有限公司 | Compression of executable document in embedded type system and its loading method |
-
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5136713A (en) * | 1989-08-25 | 1992-08-04 | International Business Machines Corporation | Apparatus and method for decreasing the memory requirements for bios in a personal computer system |
| CN1545041A (en) * | 2003-11-14 | 2004-11-10 | 港湾网络有限公司 | Double-CPU micro-kernel based on MIPS64 |
| CN1556472A (en) * | 2003-12-31 | 2004-12-22 | 中兴通讯股份有限公司 | Compression of executable document in embedded type system and its loading method |
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