CN1890789A - 封装元件的工艺和封装的元件 - Google Patents

封装元件的工艺和封装的元件 Download PDF

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Publication number
CN1890789A
CN1890789A CNA2004800358730A CN200480035873A CN1890789A CN 1890789 A CN1890789 A CN 1890789A CN A2004800358730 A CNA2004800358730 A CN A2004800358730A CN 200480035873 A CN200480035873 A CN 200480035873A CN 1890789 A CN1890789 A CN 1890789A
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China
Prior art keywords
base substrate
contact
substrate
arbitrary described
functional areas
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CNA2004800358730A
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English (en)
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约根·雷伯
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Schott AG
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Schott Glaswerke AG
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Publication of CN1890789A publication Critical patent/CN1890789A/zh
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Abstract

本发明涉及晶片级封装工艺和用这种工艺封装的元件。本发明的一个目的是提供这种类型的工艺：保证高成品率，适用于光学和/和微机械元件并实现改善的从功能区热机械去耦。依照本发明的工艺，在将晶片装备切割成芯片之前，基片衬底被分成体区和连接区，体区在所有情况下延伸过功能区，连接区关于接触连接凹槽偏置。然后元件在体区或连接区被薄化直到其在体区和连接区中的厚度不同。

Description

封装元件的工艺和封装的元件
技术领域
本发明涉及元件封装工艺和一般用这种工艺封装的元件，以及晶片级封装工艺及特别地用这种工艺封装的元件。
背景技术
对于多种技术应用，需要密封地封装的芯片，因为例如，用这种工艺可以保护半导体基片上的敏感集成电路。但是，封装至少对光学元件和微机械元件同样重要。
已知的工艺中首先将芯片与晶片组件分离，然后分别封装。这是极其复杂的工艺，几乎不适合用于敏感元件的大规模生产。特别地，集成电路或其它元件在从晶片分离时还没有被保护，结果它们在锯截操作中被污染和/或毁坏。
还有已知的工艺，其中首先在晶片级封装元件，然后将其分离。这些工艺称为晶片级封装(WLP)。
先前技术公开了许多这样的工艺。
但是，用晶片级封装难以接触连接集成电路，因为任何连接触点一般都被覆盖衬底所覆盖。这会在以下描述的工艺基础上说明。
已知的工艺通常基于这样的假设工作，与芯片上或集成电路中的接触区的连接可以直接产生，像例如在存储器片中的情形中可以毫无问题地实现一样。
但是，这没有考虑这样的事实，例如，在带有集成传感器或光学元件的芯片的情形中，安装好的光学有源表面，例如印刷电路板，必须保持裸露。
在这方面，WO 99/40624已经公开了一种工艺，其中试图消除出现在有源元件中，路线为从晶片或芯片的有源面到相对的底面上的连接触点引起的问题。向下路由的连接接触的进一步接触连接可以用已知的方法实现。
此外，Clearfield，H.M.；Young，J.L.；Wijeyesekera，S.D.；Logan，E.A.发表在《IEEE高级封装》23卷2号247-251页的“晶片级芯片尺寸封装：有利于集成无源元件”中描述了相似的工艺。
上面提及的工艺之所以杰出是因为，将玻璃覆盖应用于晶片的光学有源正面之后，沿着晶片的背面形成了将晶片分割成单独芯片区域的凹槽。在凹槽的形成过程中，晶片有源面上在任何情况下都在两个芯片之间的过渡区域上的连接触点位置，被分割并因此裸露在凹槽中。为了完整地封装晶片或芯片，在凹槽形成之后，将玻璃片黏附在凹槽上，并用适当的方法将其切割使得晶片中的凹槽和连接触点位置再次可自由接触。其后是已经形成的凹槽中的接触轨的淀镀，这是为了影响连接触点位置的接触连接并将触点位置放到封装芯片的背面。
尽管提出的方法导致公知的从芯片或晶片的有源正面到无源背面的连接接触的穿过接触，这会导致许多严重缺点，制作已经用讨论中的异常昂贵的工艺生产的芯片。
发生这种情况的一个原因是在已知工艺中形成的凹槽比那些被认为是晶片正常切割标准的明显更宽。这导致芯片或集成电路之间的距离相对很大，结果晶片上的空间能容纳的芯片更少。
如果只是由于这个原因，已知的工艺已经提供了相对低的来自半导体晶片的芯片成品率。此外，建议的生产工艺也相对低。这尤其涉及到这样的事实，凹槽必须连续研磨，凹槽形成过程中称为钻石轮划片机的设备只能以相对低的推进速度作业。除此之外，锯条的磨损也高。由于这个原因和对于所描述机械工艺的尺寸精度的高要求以及相当大的机床成本，必须使用的钻石轮划片机是非常昂贵的。
WO 99/40624中描述的工艺的一个重要问题还有当切割操作影响凹槽研磨时连接触点的裸露。这种类型的连接触点的切割，如上面已经提及的，需要极高的尺寸精度，因为如果不这样会至少损坏部分触点。尽管如此，即使实现了连接触点的精确切割，也不容易用已经以这种方式裸露的连接触点产生接触连接。其原因尤其是依照现有技术的接触连接会被晶片中凹槽斜面上的接触轨淀镀影响，但是均匀并因此成为目标的淀镀只在与淀膜方向陡峭至垂直的地方可能。
沿着触点锯切时，另外的特别缺点是许多接触面至少被暂时裸露，这会导致腐蚀和扩散，会因此对元件的使用寿命产生严重的负面影响。
Koyanagi，M；Kurino，H；Lee，K.W.；Sakuma，K.发表在1998年7月-8月的《IEEE Micro》17-22页的“未来单晶片系统LSI芯片”，WO 98/52225和DE 197 46 641中也描述了用于芯片穿过接触(through-contacting)的另外的工艺。但是，这些工艺不适合封装例如光学芯片。
从WO 03/019653 A2中了解到进一步改进的晶片级封装工艺，该工艺因此被完整地以参考的方式并入本公开的主题。
那个文献描述的工艺中，封装之后，触点经制作再次可以通过通道接触，通过该通道触点被用例如称为球栅阵列的方式接触连接。以这种工艺上面描述的缺陷可以相当程度地被克服。
尽管如此，在某些情况下，会由于这样的原因引起问题：通常球栅阵列包含铅-锡焊料，其熔点大约为230℃，结果，对某些应用来说，这样生产的芯片的热稳定性不足，或敏感元件在装备过程中受过量热负载的影响。而且，在与球栅阵列和半导体元件的连接之间的热机械耦合会导致敏感元件中的问题。
无论如何，在某些环境下，需要能够在没有含铅焊料的情况下制作。
此外，需要进一步改进所述工艺的效率和成品率，加宽所生产芯片的应用范围。
发明内容
因此，本发明是基于提供普通类型的工艺的目的，该工艺有效并廉价地工作。
本发明的另一个目的是提供保障高成品率并尤其适合光学和/或微机械元件的工艺。
本发明的另一个目的是提供取得改善的来自功能区的连接的热机械耦合的工艺和元件。
本发明还有另一个目的是提供廉价耐热的元件，该元件具有高质量和高稳定性。
本发明还有另一个目的是提供避免或至少减轻现有技术的缺陷的工艺和元件。
该目的由独立权利要求的主题以一种异常简单的方式实现。本发明的有利的细微改进限定在从属权利要求中。
依照本发明，以下列方式实现元件的晶片级封装和接触连接。
基片衬底，它具有功能侧面和功能侧面反面的背表面，借助功能侧面而被永久地结合到晶片级的覆盖衬底。功能侧面的特性是其上布置了大量相互分开间隔的功能区。更确切地说，每个即将生产的芯片或单元片有一个功能区。功能会被理解为表示带有功能元件，例如集成电路或其它电子的、光学的、电光的、微机械的、微光机的或类似元件的区域。
例如，功能区会因此包含光学传感器。也举例子，例如基片衬底是带有集成电路的硅半导体晶片。尽管如此，其它材料也可能适合基片衬底，像例如砷化镓或磷化铟。
现在功能区在所有情况下都通过两个衬底的结合，以密封或准密封的密封方式封装。一种可能的结合技术是黏附接合，例如用环氧树脂，但阳极接合也是可能的。对于阳极接合，可能有利于将以例如蒸发涂镀玻璃层的形式接合层(键合层)应用于结合之前的衬底中的至少一个。这样产生的接合层也可以用于直接接合。
对于用环氧树脂连接，也应该注意到这只能实现有限的密封封装。因此，在本说明的上下文中，这种类型的连接指的是准密封。
此外，基片衬底在其功能侧面上有接触表面(称为接触垫)，结合了衬底之后，这些接触表面从基片衬底的背面露出，该背面在功能侧面的反面。为了达到该目的，在基片衬底中接触表面上特别地通过蚀刻形成接触连接凹槽。接触连接凹槽也作为通孔为本领域的技术人员所了解，该通孔用于制作穿过基片衬底的穿过接触。
在随后的进一步阶段，沿着功能侧面之间预先确定的切割线，至少从基片衬底或覆盖衬底形成的晶片组件被特别地通过锯切切割成芯片或单元片。如果使用适当的钝化作用，像例如构图成的蒸发涂镀玻璃层，其厚度优选为0.01μm到100μm，通常是8μm，会形成在所有情况下都以密封或准密封的封装形式封装的各个芯片。应用于晶片级的这种封装工艺比单独封装的效率高得多。
在之后的进一步阶段，元件具有体区和连接区，其中连接区与接触连接凹槽相邻，元件，尤其是基片衬底，在体区或连接区中变薄直到在连接区和体区中达到不同的厚度。
换句话说，基片衬底被分成体区和连接区，体区在任何情况下都横向延伸过功能区之上并形成用于后续芯片的分别封装的一部分。连接区与接触连接凹槽或通孔横向邻近。现在的特别特征是基片衬底在连接区中被薄化的程度比在体区中更大，或反之亦然。
这有利地为接触连接增加了空间。而且，依照本发明的工艺建立了连接区与功能区之间的卓越的热机械耦合。
如果合适，衬底基片被薄化至零厚度，即，一起除去。
在随后的进一步阶段，芯片被优选地插入电路载座，接触表面或与接触表面电连接的触点再分配元件，通过基片衬底背面上的导线接合与电路载座上的相应接触元件相连。因此，被蚀刻干净的接触表面或触点再分配元件特别地在各个元件已经切割的情形下只接触连接。
在导线接合的情形中，导电的，薄的，基本圆的导线，例如铝的或金的，在没有焊料的情况下被焊接到接触表面。为了达到这个目的，导线被优选引入撞键(ram)并被作用力压紧到接触表面。
实际焊接优选冷焊和/或通过超声波实现。该工艺的特征是其可靠性和产生的连接的质量。尽管如此，球栅阵列作为用于接触表面或接触再分配元件的接触连接的接触元件的应用也在本发明的范畴内。
导线接合的另一个优点是这代表了非常简单并廉价的工艺，此外，它比用焊球或由焊球形成的称为球栅阵列产生的连接有更好的热稳定性。而且，在导线接合过程中，元件上很少有热负载。
本发明另外的特别好处是接触连接，尤其是导线接合，在背面实现，使得该工艺，例如，还可以用于带有透明覆盖衬底，尤其是玻璃制的光学元件。当然，该工艺并不局限于此，而是覆盖衬底也可以由其它的材料，例如金属或半导体组成，这取决于特别应用领域。无论如何，已经发现，使用依照本发明的工艺的背面接触连接可以用简单有效的方式实现。
另外的优点是该工艺产生的灰尘特别少。特别地，作为应用覆盖衬底的结果，在某些情况下非常敏感的功能区早在第一工艺步骤就被保护起来。
在基片衬底被结合到覆盖衬底之前，将称为接触垫外延的放大元件应用于功能侧面上基片衬底的接触表面是完全可能的。这增加了接触表面的面积，并促进接合撞键的使用。在这种情况下，如果合适，接触连接凹槽可以延伸过放大元件。
在基片衬底被结合到覆盖衬底之后，例如通过机械研磨和/或蚀刻将其均匀地薄化，以便达到减少的元件厚度，这是优选的。
接触表面的裸露特别地通过基片衬底的图案化蚀刻，例如通过光刻工艺实现。此外，蚀刻可以通过湿式化学方法或通过等离子技术实现。本领域的技术人员基本都知道这种类型的工艺。
此外，将钝化层应用于基片衬底的背面是有利的。该钝化层被特别地构图，其接触表面基本裸露。这可以通过将钝化层应用在已构图形式中，例如使用掩模来实现，或通过将钝化层均匀地应用于基片衬底的背面然后构图的方式实现。
其优点是基片衬底，尤其是覆盖衬底和在硅半导体衬底的情形中存在于功能侧面上的二氧化硅层的界面被保护起来以避免例如氧化这样的环境影响。而且，二氧化硅层也可以在蚀刻接触连接凹槽和接触连接通道时用作蚀刻终止掩模，但然后在接触表面的背面上被开口。
合适的钝化层特别地是一层玻璃，该玻璃层应用蒸发涂镀或可用照相法构图的塑料层例如BCB施加。钝化层优选地延伸到远至接触面的边缘区域。此外，如果需要可以提供更进一步的钝化层。
依照具体实施例，在接触表面和/或触点再分配元件已经裸露之后，在背面用金属层，例如金层，通过电镀或无电镀方法将它们覆盖。这改善了接触表面的表面质量，因此进一步改善了导线接合的可靠性。
此外，有利地，在背面沿预先确定的切割线蚀刻基片衬底以便确定凹槽或称为锯切道，该锯切道(sawing street)沿着切割线的两侧和将晶片切割成芯片的线延伸。
此外，薄化连接区中的基片衬底特别地是在接触表面通过导线接合结合到电路载座的接触元件之前实施的。
这导致了这样的优点，产生了更多的空间来使导线接合能用接合撞键从背面实现。这是因为存在于已知工艺中的开口通常如此小以至于如果不是一起做的话，导线接合至少会更困难
依照特别简单的实施例，接触连接凹槽和通孔，连接区和/或锯切道在单一步骤中形成。这允许工艺更进一步地简化。
优选在第一步中首先薄化基片衬底，例如通过研磨，然后在第一步之后的第二步中，在连接区或体区通过例如照相法构图蚀刻而被更进一步薄化，使得它变得在这些区域中比在各个其它区域中更薄，使得除了接触连接凹槽之外，另外的区域有不同的基片衬底厚度，尤其是产生比通过均匀薄化形成得更薄的厚度。
在上下文中，术语基片衬底的薄化基本上也可以理解为包括将厚度薄化至零，即在相应区域完全除去基片衬底。尽管如此，也可能在体区，连接区和在接触连接凹槽形成至少三个不同厚度区域。
如果连接区中基片衬底的厚度被薄化到零，各连接的接触连接可以特别成功地从功能区机械去耦是有利的。因此，例如通过导线接合进行连接或连接导线连接时，没有压力或只有很小的压力传送到功能区。这尤其使避免敏感图象传感器中暗电流的增加成为可能。
然而，即使将焊球用作接触元件，焊球和元件之间接触的位置从功能区热机械地去耦，使得热循环使用过程中遇到的机械压力不传送到或很少传送到功能区。
此外，特别优选制作连接条，该连接条以延长的方式平行延伸到预先确定的切割线。基片衬底在连接条中被再次薄化，程度比在体区更大。在这种情况下的优点是不需要为每个接触连接凹槽制造专门的连接区，而是用多个接触连接凹槽毗连同一连接条。特别地，连接条基本上从一个切割线延伸到下一个，特别地在整个晶片上，使得晶片上形成条形图案。
优选以这样的方式形成连接区：它们至少从接触连接凹槽延伸到锯切道或预定切割线。换句话说，锯切道和连接区可以形成单独的区域，使得特别地在相邻芯片的接触表面之间完全除去基片衬底。这可以节省另外的工作步骤。
依照本发明的工艺还特别适合具有功能区的元件，该功能区封闭在例如MEMS或MOEMS元件这样的空腔中。特别地为了达到这一目的，在基片衬底结合到覆盖衬底之前，给覆盖衬底提供功能区上的凹槽，使得基片结合到覆盖衬底之后，在两个衬底之间形成空腔，功能区封闭在该空腔中。
除了所述工艺之外，本发明另外的主题是在切割操作后可以用工艺生产的作为芯片的元件、切割之前的晶片级上的中间产物、和具有电路载座的电路结构、和安装于其中并通过导线接合与之电连接的切割元件。
切割的、封装的元件，特别是电子的，光学的，光电的，微电机械的或微光电机械的元件依照本发明相应地包括：
具有功能侧面和背面的基片衬底，其中功能区上布置了元件功能区，背面在功能侧面的对侧，
在基片衬底背面与之永久结合的覆盖衬底，覆盖衬底延伸过功能区，和基片衬底与覆盖衬底之间的结合，或以在功能区周围形成密封或准密封式密封外罩的方式包围功能区的连接层，和
基片衬底上特别地穿过外罩与功能区电连接的接触表面。
此外，基片衬底在接触表面区域包括接触连接凹槽，通过该接触连接凹槽，从外罩外面和从基片衬底背面或通过基片衬底可以与或与接触表面连接，
基片衬底被分割成体区和连接区，体区横向延伸过功能区并形成部分外罩，连接区相对于接触连接横向偏移，特别地，与之相连，和
元件，尤其是基片衬底在体区和连接区有不同厚度，或基片衬底在体区或连接区被更大程度地薄化，特别地，如果合适，被一起除去。
此外，切割之后，元件有窄边，在窄边上元件从晶片组件分离开来，在这方面，连接区至少从接触连接凹槽延伸到窄边。
另外，参考该工艺特征。
在下文中，在典型实施例基础上，参照附图更详地解释本发明，在附图中，一些情形下相同和类似的元件提供了同样的附图标记，各种典型实施例的特征可以相互结合。
附图说明
在附图中：
图1示出依照本发明的晶片级元件部分实施例的示意截面图。
图2示出图1中元件切割和导线接合之后的示意截面图。
图3示出依照本发明带有焊球的元件的部分实施例的示意截面图。
图4示出依照本发明的晶片级元件另外实施例的一部分的示意截面图。
图5示出依照本发明的元件的另外实施例的一部分的示意截面图，该元件带有提供了金属层的接触元件。
图6示出依照本发明的晶片级元件实施例的示意平面图。
具体实施方式
图1示出了经过处理，即提供了功能区110(在该实例中，为集成电路110)后的基片衬底100。在这个范例中，基片衬底用硅半导体晶片100代替。
此外，在CMOS应用或SOI电路的情形中，半导体晶片100有电介质层120，例如处于二氧化硅层的形式。夹层120使电路110与硅晶片100隔离。
此外，在其功能侧面101上，半导体晶片100有接触表面或接触垫130，功能侧面101被其上布置的电路110限定。接触垫130与电路110电连接(未示出)。与功能侧面相对的半导体基片100的侧面被称为背面102。
然后，覆盖衬底或覆盖晶片200，在本例中为Borofloat-33玻璃晶片200，被黏附地接合到半导体晶片100上。使用Borofloat-33玻璃是特别有利的，因为热膨胀系数与半导体晶片100的相匹配。
两个晶片100和200通过粘合层210例如环氧树脂或丙烯酸盐粘合剂而被结合。这导致电路110的准密封封装。
作为粘合层210的替换，也可以应用玻璃层，尤其是通过蒸发涂镀，使得基片衬底适合阳极焊接或直接接合。因此，在这样的情形下，这两个晶片被阳极地或直接地接合在一起。
在结合操作之后，第一步中，半导体晶片100在整个晶片上被均匀薄化，例如通过机械研磨薄化到厚度d1。这是可能的，因为覆盖晶片200赋予该组件需要的稳定性。
在半导体晶片100均匀薄化或研磨之后的第二步中，半导体晶片100被以这样的方式构图：一方面，在接触垫130上形成接触连接凹槽或接触连接通道301，另一方面，形成与接触连接通道301横向毗连的连接区300。这可以在单一或两个分开的步骤中实现。对于构图优选通过光刻湿法蚀刻工艺或等离子蚀刻工艺实现。
接触连接通道301将从背面102横向延伸通过半导体晶片100直接到接触垫130。
因此晶片被分割成多个体区104和连接区300，连接区300被薄化的程度比体区104更大。换句话说，晶片材料100在连接区300中被薄化到厚度d2，d2小于d1。在本例中，d2不等于0。
换句话说，半导体晶片100均匀薄化之后，晶片材料在接触连接通道301的区域中被进一步除去，直到达到厚度d2。
此外，半导体晶片100还有锯切道或锯切凹槽302，横向延伸到附图的平面，沿着该凹槽，晶片组件100，200被相继切割。
接触连接通道301被形成或蚀刻，以及连接区300被薄化之后，用钝化层400覆盖半导体晶片的背面400，尤其是为了保护敏感接触面，例如半导体晶片100和电介质夹层120之间的。钝化层400是例如一层蒸发涂镀玻璃。钝化层400还可以是多层的形式(图1中未示出)。此外，尤其是使用蒸发涂镀玻璃的情况下，钝化层400还增加组件的气密性密封。
接触连接通道301和锯切道或锯切轨302有倾斜侧壁303和304以便保证连续的钝化层400。
同时，或在一个分开的步骤中，本例中示出的电介质层120和钝化层400在接触垫130上以构图的形式除去，以便为了接触连接使后者从背面102裸露出来。
然后，触点再分配元件，尤其是金属化形式的触点再分配层410，例如基于Ti/W/Cu镀的电镀的Cu，被应用在背面，至少在连接区300中从接触表面130延伸到第二接触表面132。相应地，触点再分配层410延伸直到连接区300，在此它形成第二接触表面132。换句话说，触点再分配层410在连接区300中提供第二接触表面132，该第二接触表面132经布置在半导体晶片100的背面上相对于接触垫130横向偏置。这样，第二接触表面132有利地从功能区110热机械去耦。
第二接触表面132也在背面以接合层410，抗氧化层和/或扩散阻挡层涂镀。
于是，晶片组件100，200沿锯切道302或沿中心线600被锯切，即切割成芯片10。
图2说明带有以气密密封的方式封装的功能区110的锯切芯片10。切割之后，通过导线接合，例如焊接到电路载座(未示出)，芯片10被进一步处理。
现在参照图3，芯片10被提供焊球501，它体现了连接到电路载座的可替换接触连接方式。焊球501可以在切割之前或之后应用。
图4示出晶片级元件；在本实施例中，在连接区300中半导体晶片100一直被薄化到二氧化硅层120，即，直到近似为0的厚度。因此，晶片100的半导体材料已经在连接区300被完全除去。因此，在连接区300中，钝化层400被直接施加于二氧化硅层120。
因此，在本例中，接触连接通道300，接触区300和锯切道302熔合到一起至某程度以便在半导体晶片100的背面中形成公共凹槽。
切割之后施加的导线接合500被通过点线指示出。
此外，第二钝化层402，尤其是用与第一钝化层400相同的材料制成的，已经被应用于第一钝化层400。第二钝化层402至少延伸过与接触表面130连接的触点再分配层410的部分412，在本例中延伸过锯切道302以便也钝化后者。换句话说，应用连续的第二钝化层402但在第二接触表面上保持无障碍或裸露。覆盖衬底200中的凹槽限定空腔201。
图5示出晶片组件，其中基片衬底的厚度d2在连接区中比在体区104中大。为了达到这个目的，半导体100首先均匀研磨到厚度d2并在体区104中以构图的形式进一步薄化，使得半导体晶片100的厚度在连接区300中比在体区104中大。
关于进一步的工艺步骤，参照图1。
将接合层或金层420应用于代表晶片组件最厚的部分的连接区300，然后将焊接触点502应用与接合层或金层420。，如果合适，焊接触点502类似地可以用电镀涂镀。
图6示出晶片组件100，200连同接触连接通道301。还说明了各种形式的连接部分300a，300b，300c。
连接区300a形成沿锯切凹槽302a纵向延伸于整个芯片10上的公共连接条304a。此外，连接条304a关于其纵轴横向地从锯切凹槽的中心线600延伸过只被部分覆盖的接触连接通道301。
连接区300b被类似地结合以形成连接条304b，该连接条304b相对于其纵轴横向地延伸过整个接触连接通道301。
作为替换，还提供了连接区300c的第三变体，在每一情况下这些连接区在接触连接通道301周围相互分开地延伸，每个接触连接通道301被分配给专用的连接区300c。在任何情况下，薄化区被提供在接触连接通道301周围。
本领域的技术人员会清楚上述的实施例可理解为范例，本发明不局限于这些特殊范例，而是能以多种方式变化而不脱离本发明的范畴。

Claims (35)

1.用于封装元件的工艺，
其中基片衬底在其功能侧面上有多个相互间隔的功能区，并且借助功能侧面，以在所有情况下功能区都被封装的方式，在晶片级上与覆盖衬底永久连接，
其中基片衬底上的接触表面通过在基片衬底中形成接触连接凹槽而从基片衬底的背面裸露出来，该背面在功能侧面的对侧，
其中基片衬底被分成体区和连接区，体区在每种情况下延伸过功能区并为功能区形成封装的部分，连接区相对于接触连接凹槽偏移，
元件在体区或连接区被薄化直到它在体区和连接区中具有不同的厚度，以及
其中至少由基片衬底和覆盖衬底形成的晶片组件沿功能区之间的预定切割线被切割成芯片。
2.如权利要求1所述的工艺，
其中在电路载座上布置芯片，接触表面或触点再分配元件借助基片衬底背面的导线接合与电路载座的接触元件连接。
3.如权利要求2所述的工艺，
其特征在于导线接合包括将连接导线焊接到接触表面或触点再分配元件。
4.如前述任一条权利要求所述的工艺，
其特征在于将触点再分配元件应用于接触表面的背面，该触点再分配元件至少从接触表面延伸到连接区，并且在连接区的背面上可以被接触连接。
5.如前述任一条权利要求所述的工艺，
其特征在于基片衬底与覆盖衬底结合之后，覆盖衬底被薄化。
6.如前述任一条权利要求所述的工艺，
其特征在于通过基片衬底的构图蚀刻，接触表面从背面裸露出来。
7.如前述任一条权利要求所述的工艺，
其特征在于以构图的方式将钝化层应用于基片衬底的背面，接触表面基本保持裸露，或将钝化层应用于基片衬底的背面然后以裸露接触表面的方式将其构图。
8.如前述任一条权利要求所述的工艺，
其特征在于在接触表面裸露之后，通过电镀或无电镀方式在背面上以金属层覆盖接触表面。
9.如前述任一条权利要求所述的工艺，
其特征在于使用的基片衬底是带有包含集成电路的功能区的半导体衬底。
10.如前述任一条权利要求所述的工艺，
其特征在于使用的基片衬底是具有光学，微机械或电子功能元件或其组合的半导体衬底。
11.如前述任一条权利要求所述的工艺，
其特征在于在背面上沿预定切割线蚀刻基片衬底以便限定锯切道。
12.如前述任一条权利要求所述的工艺，
其特征在于连接区沿横向方向与接触连接凹槽直接毗连。
13.如前述任一条权利要求所述的工艺，
其特征在于接触连接凹槽、连接区和锯切道在单一步骤中形成。
14.如前述任一条权利要求所述的工艺，
其特征在于基片衬底在连接区中的薄化在基片衬底通过导线接合与电路载座的接触元件结合之前实施。
15.如前述任一条权利要求所述的工艺，
其特征在于基片衬底在第一步中被均匀薄化，在第一步骤之后的第二步骤中更进一步在连接区或体区中薄化。
16.如前述任一条权利要求所述的工艺，
其特征在于，在第二步骤中，基片在连接区或体区中以构图的方式蚀刻。
17.如前述任一条权利要求所述的工艺，
其特征在于制出与预定切割线平行延伸的连接条，基片衬底在连接条中薄化的程度比在体区中更大，多个接触连接凹槽与同一连接条毗连。
18.如前述任一条权利要求所述的工艺，
其特征在于制出至少从接触连接凹槽延伸到预定切割线的连接区。
19.如前述任一条权利要求所述的工艺，
其特征在于，在基片衬底与覆盖衬底结合之前，将接合层应用于基片衬底或覆盖衬底。
20.如前述任一条权利要求所述的工艺，
其特征在于，在基片衬底与覆盖衬底结合之前，覆盖衬底在功能区上被提供以凹槽，使得在基片衬底与覆盖衬底结合之后，在两个衬底之间形成空腔，功能区被包围于该空腔中。
21.用于封装元件的工艺，尤其是如前述任一条权利要求所述的工艺，
其中基片衬底在其功能侧面上有多个相互间隔的功能区，并且借助功能侧面，以每一功能区被封装的方式，在晶片级上与覆盖衬底永久结合，
其中基片衬底上的接触表面通过在基片衬底中制成接触连接凹槽而从基片衬底的背面裸露出来，背面在功能侧面的对侧，
其中至少从基片衬底到覆盖衬底形成的晶片组件沿功能区之间的预定切割线被切割成封装芯片，以及
其中芯片被布置在电路载座上，并且接触表面借助基片衬底背面上的导线接合而与电路载座的接触元件相连接。
22.封装元件，可以特别地通过如前述任一条权利要求所述的工艺制作，包括：
带有功能侧面和背面的基片衬底，在功能侧面上布置元件的功能区，背面在功能侧面的对侧，
覆盖衬底，在基片衬底的功能侧面上与基片衬底永久结合，覆盖衬底延伸过功能区，并且该结合以在功能区周围形成外罩的方式包围功能区，以及
与功能区连接的接触表面，
所述基片衬底，在接触表面区，包含接触连接凹槽，通过该接触连接凹槽接触表面就或可以从外罩外面和从基片衬底的背面被接触连接，
所述基片衬底具有体区和连接区，体区延伸过功能区并形成外罩的部分，连接区和接触连接凹槽偏移，以及
其中元件在体区和连接区的厚度不同。
23.如权利要求22的元件，
其特征在于基片衬底是半导体衬底，功能区包含集成电路。
24.如前述任一条权利要求所述的元件，
其特征在于功能区包括光学、微机械或电子元件或其组合。
25.如前述任一条权利要求所述的元件，
其特征在于元件有窄边，该元件在该窄边上与晶片组件分离，连接区至少从接触连接凹槽延伸到窄边。
26.如前述任一条权利要求所述的元件，
其特征在于多个连接区被组合以形成连接条，多个接触连接凹槽与同一连接条毗连。
27.如前述任一条权利要求所述的元件，
其特征在于接触表面与触点再分配元件连接，该触点再分配元件至少从接触表面延伸到连接区，并且可以在连接区被接触连接。
28.如前述任一条权利要求所述的元件，
其特征在于基片衬底与覆盖衬底通过接合层，特别是粘合层或蒸发涂镀玻璃层连接。
29.如前述任一条权利要求所述的元件，
其特征在于覆盖衬底有在功能区上的凹槽，使得形成空腔，功能区被包围在该空腔中。
30.如前述任一条权利要求所述的元件，
其特征在于将至少一个钝化层应用于基片衬底的背面。
31.如前述任一条权利要求所述的元件，
其特征在于接触表面被提供通过电镀或无电镀方法施加的金属覆盖。
32.如前述任一条权利要求所述的元件，
其特征在于连接导线与接触表面或触点再分配元件导电地连接，连接导线借助导线接合与接触表面连接。
33.如前述任一条权利要求所述的元件，
其特征在于不使用焊料而将连接导线焊接到接触表面或触点再分配元件。
34.复合元件，包括在晶片级上多个如前述任一条权利要求所述元件。
35.电路结构，具有电路载座、和并入其中的如前述任一条权利要求所述的元件。
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