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Publication numberCN1856836 B
Publication typeGrant
Application numberCN 200480027328
PCT numberPCT/US2004/026920
Publication date1 Jun 2011
Filing date19 Aug 2004
Priority date21 Aug 2003
Also published asCN1856836A, DE602004017752D1, EP1661140A1, EP1661140A4, EP1661140B1, US6870759, US20040264239, WO2005022545A1
Publication number200480027328.7, CN 1856836 B, CN 1856836B, CN 200480027328, CN-B-1856836, CN1856836 B, CN1856836B, CN200480027328, CN200480027328.7, PCT/2004/26920, PCT/US/2004/026920, PCT/US/2004/26920, PCT/US/4/026920, PCT/US/4/26920, PCT/US2004/026920, PCT/US2004/26920, PCT/US2004026920, PCT/US200426920, PCT/US4/026920, PCT/US4/26920, PCT/US4026920, PCT/US426920
Inventors臧大化
Applicant磁旋科技公司
Export CitationBiBTeX, EndNote, RefMan
External Links: SIPO, Espacenet
Mram array with segmented magnetic write lines
CN 1856836 B
Abstract
A magnetic random access memory (MRAM) array and method for making the MRAM array are disclosed. The MRAM array includes magnetic storage cells, global word lines, magnetic word lines, read bit lines, selection devices, and write bit lines. Each magnetic work line has segments. Each segment is coupled with the global word line(s) such that each segment is separately selectable. Each segment is also coupled to a portion of the magnetic word lines. The read bit lines are coupled with the magnetic cells through the selection devices. The write bit lines are substantially parallel to the read bitlines. Preferably, the magnetic word lines include soft magnetic materials and are coupled to each magnetic storage cell through a thin, nonmagnetic layer. To reduce interference from currents in global word lines, the global word lines are also substantially parallel to the magnetic word lines.
Claims(15)  translated from Chinese
1. 一种磁性随机存取存储器阵列,包括:多个磁性存储单元;多条全局字线;多条磁性字线,所述多条磁性字线的每一条包括软磁性材料以及具有多个段,所述多个段的每一段通过段选择器件连接到所述多条全局字线的一条,使得所述多个段的每一段通过段选择器件的其中之一能够分别被选择,所述多个段的每一段连接到所述多个磁性存储单元的至少其中之一;多条读取位线,相对于所述多条磁性字线成垂直角度而定向;多个选择器件,所述多条读取位线的每条通过所述多个选择器件的其中之一与所述多个磁性存储单元的其中之一连接;以及多条写入位线,平行于所述多条读取位线。 1. A magnetic random access memory array comprising: a plurality of magnetic memory cells; a plurality of global word lines; a plurality of magnetic word lines, each of said soft magnetic material comprises a plurality of word lines and a plurality of magnetic segments having Each section of the plurality of segments connected by a segment selector device to the plurality of global word lines of one, so that each section of the plurality of segments of the device by selecting one of the segments can be selected separately, the multi- each segment is connected to one segment of the plurality of magnetic memory cells wherein at least; a plurality of read bit lines, with respect to the plurality of magnetic word lines oriented perpendicular angle; a plurality of selection devices, the multi- Article read bit line of each one of them one of the selection device with the plurality of magnetic memory cells are connected by the plurality; and a plurality of write bit lines, parallel to said plurality of read bit line.
2.如权利要求1所述的磁性随机存取存储器阵列,其中所述多个磁性存储单元的每一个进一步包括一个磁性隧道结,所述磁性隧道结的每一个包括由绝缘体层所分隔的自由层和钉扎层,自由层与所述多个段的一个段通过非磁性层电接触,其中多个段的每个段连接到两个磁性存储单元。 2. The of claim 1, wherein the magnetic random access memory array, wherein each magnetic tunnel junction further comprises a plurality of magnetic memory cells, each of the magnetic tunnel junction comprises an insulator layer separated from free layer and the pinned layer, the free layer with a segment of said plurality of segments in electrical contact through a non-magnetic layer, wherein a plurality of segments each segment is connected to two of the magnetic memory cells.
3.如权利要求2所述的磁性随机存取存储器阵列,其中所述段通过非磁性层与所述磁性隧道结元件的自由层分隔开,所述非磁性层是导电的非磁性间隔层的。 3. The claim 2, wherein the magnetic random access memory array, wherein said segment by a non-magnetic layer and the free layer of the magnetic tunnel junction element spaced, said non-magnetic layer is a conductive nonmagnetic spacer layer a.
4.如权利要求1所述的磁性随机存取存储器阵列,其中所述多条全局字线比所述多条磁性字线具有更低的线电阻。 The claim 1, wherein the magnetic random access memory array, wherein the plurality of global word lines than the plurality of magnetic word lines has a lower line resistance.
5.如权利要求1所述的磁性随机存取存储器阵列,其中所述多条全局字线平行于所述多条磁性字线而定向。 5. The magnetic claim 1, wherein the random access memory array, wherein the plurality of global word lines parallel to the word lines and a plurality of magnetic orientation.
6.如权利要求1所述的磁性随机存取存储器阵列,其中所述多个选择器件的每个包括一个选择晶体管。 6. The magnetic claim 1, wherein the random access memory array, wherein each of said plurality of select device includes a select transistor.
7.如权利要求1所述的磁性随机存取存储器阵列,其中所述多条读取位线的每个通过二极管连接到所述多个磁性存储单元的一个。 7. The magnetic claim 1, wherein the random access memory array, each connected to one of said plurality of magnetic memory cells by the read diode wherein said plurality of bit lines.
8. 一种利用权利要求1所述的磁性随机存取存储器阵列的方法,包括:(a)在写入模式中,从写入驱动电流电源向所述多条全局字线的至少一条驱动电流;(b)在写入模式中,选择所述多个段的至少一个;(c)在写入模式中,提供第一写入电流通过所述多个段的所述至少一个;以及(d)在写入模式中,提供第二写入电流给多条写入位线;其中所述多个磁性存储单元的每一个通过所述多个选择器件中相对应的一个,分别与多条读取位线的其中之一连接,所述多条读取位线相对于所述多条磁性字线成垂直角度而定向。 A use of claim 1 wherein the magnetic random access memory array, comprising: (a) in a write mode, the write drive current from the power source to the plurality of global word lines, at least one drive current ; (b) in the write mode, selecting at least one of said plurality of segments; (c) in the write mode, providing a first write current through the at least one of said plurality of segments; and (d ) in write mode, providing a second write current to a plurality of write bit lines; wherein each of said plurality of selector devices by a corresponding one of said plurality of magnetic memory cells, respectively, and a plurality of read Take one of the bit lines connected to said plurality of read bit lines with respect to the plurality of magnetic word lines oriented perpendicular angle.
9.如权利要求8所述的方法,进一步包括以下步骤:(f)在读取模式中,全局字线接地,读取模式用于读取所述多个磁性存储单元的一部分,所述多个磁性存储单元的所述部分包括多于一个的存储单元;(g)在读取模式中,在所述多条读取位线的一部分中提供读取电流;(h)在读取模式中,激活所述多个选择器件的一部分,从而允许读取电流流经多个磁性存储单元;以及(i)在读取模式中,读取在多个读取位线的一部分上的电压,以确定所述多个磁性存储单元的一部分的逻辑内容。 9. The method of claim 8, further comprising the steps of: (f) in the read mode, grounding a global word line, the read mode for a portion of the plurality of magnetic memory cells to read, the multi- the portion of a magnetic memory cells including more than one storage unit; (g) in the read mode, providing a read current in a portion of the plurality of read bit lines in; (h) in the read mode , activating a portion of the plurality of selection devices, thereby allowing the read current passing through the plurality of magnetic memory cells; and (i) in the read mode, read on a portion of the plurality of read bit line voltage to determining the content of the logic portion of the plurality of magnetic memory cells.
10.如权利要求8所述的方法,其中所述多个磁性存储单元的每个进一步包括一个磁性隧道结,所述磁性隧道结的每一个包括由绝缘体层分隔开的自由层和钉扎层,自由层与所述多个段的一个段通过非磁性层电接触,其中多个段的每个段连接到两个磁性存储单兀。 10. The method of claim 8, wherein the plurality of magnetic memory cells each further comprises a magnetic tunnel junction, each of the magnetic tunnel junction comprises a bundle are separated by an insulator layer, the free layer and the staple layer, a free layer with a segment of said plurality of segments in electrical contact through a non-magnetic layer, a plurality of segments wherein each segment is connected to the two magnetic storage single Wu.
11.如权利要求10所述的方法,其中所述段通过非磁性层与所述磁性隧道结元件的自由层分隔开,所述非磁性层是导电的非磁性间隔层的。 11. The method of claim 10, wherein said segment by a non-magnetic layer and the free layer of the magnetic tunnel junction element spaced, said non-magnetic layer is a conductive nonmagnetic spacer layer.
12.如权利要求8所述的方法,其中所述多条全局字线比所述多条磁性字线具有更低的线电阻。 12. The method of claim 8, wherein the plurality of global word lines than the plurality of magnetic word lines has a lower line resistance.
13.如权利要求8所述的方法,其中所述多条全局字线平行于所述多条磁性字线而定向。 13. The method of claim 8, wherein the plurality of global word lines parallel to the word lines and a plurality of magnetic orientation.
14.如权利要求8所述的方法,其中所述多个选择器件的每个包括一个选择晶体管。 14. The method of claim 8, wherein each of said plurality of select device includes a select transistor.
15.如权利要求8所述的方法,其中所述多条读取位线的每条通过二极管连接到所述多个磁性存储单元的其中之一。 15. The method of claim 8, wherein one of said plurality of read bit line is connected through a diode to each of the plurality of magnetic memory cells. 3 3
Description  translated from Chinese

具有分段磁性写入线的MRAM阵列 With piecewise magnetic write lines of MRAM array

[0001] 相关申请的交叉引用 Cross [0001] REFERENCE TO RELATED APPLICATIONS

[0002] 本申请涉及于2002年12月9日提交的、序列号为No. 60/431,742的、标题为“MRAM CELLS WITH MAGNETIC WRITE LINES(具有磁性写入线的MRAM单元)”的共同未决的美国专利申请,所述申请已转让给本申请的受让人。 [0002] The present application relates to December 9, 2002 filed Serial No. No. 60 / 431,742, entitled "MRAM CELLS WITH MAGNETIC WRITE LINES (MRAM cell having a magnetic write lines)," the co- pending US patent application, the application has been assigned to the assignee of the present application.

技术领域 FIELD

[0003] 本发明涉及磁性存储器,更具体地是涉及一种用于提供磁性随机存取存储器(magnetic random access memory,MRAM)的方法和系统,所述MRAM优选地是高密度、非易失性的,并具有结合了磁性写入线的结构。 [0003] The present invention relates to a magnetic memory, and more particularly relates to a method for providing a magnetic random access memory (magnetic random access memory, MRAM) methods and systems, the MRAM is preferably a high-density, nonvolatile and having a combined magnetic write line structure.

背景技术 BACKGROUND

[0004] 近来,MRAM对于非易失性和易失性存储器的潜在应用已经重新激发了人们对薄膜磁性随机存取存储器(MRAM)的兴趣。 [0004] Recently, MRAM potential applications for the nonvolatile and volatile memory has reinvigorated interest in the thin-film magnetic random access memory (MRAM) are. 图1显示了传统的MRAM 1的一部分。 Figure 1 shows a portion of a conventional MRAM 1. 传统的MRAM包括传统的正交导线10和12、传统的磁性存储单元11以及传统的晶体管13。 Conventional MRAM comprises a conventional orthogonal wires 10 and 12, the conventional magnetic storage cell 11 and a conventional transistor 13. 传统的MRAMl 利用传统的磁性隧道结(magnetic tunneling junction, MTJ)堆叠11作为存储单元。 Traditional MRAMl using conventional magnetic tunnel junction (magnetic tunneling junction, MTJ) stack 11 as the storage unit. 使用传统的MTJ堆叠11能够设计具有高集成度、高速度、低读取功率和软错误率(soft error rate, SER)免疫的MRAM单元。 Using conventional MTJ stack 11 can be designed with high integration, high speed, low reading power and the soft error rate (soft error rate, SER) immunized MRAM cell. 导线10和12用于将数据写入磁性存储器件11中。 Conductors 10 and 12 for writing data in the magnetic memory device 11. MTJ堆叠11位于10和12之间的交叉点。 MTJ stack 11 located at the intersection between 10 and 12. 传统的导线10和12被分别称作传统的字线10和传统的位线12。 Traditional wire 10 and 12 are respectively referred to as a conventional word line 10 and the conventional bit line 12. 但是,这些名字是可交换的。 However, these names are interchangeable. 也可以使用其它的名字,例如行线、列线、数字线和数据线。 You can also use other names, such as row lines, column lines, digital lines and data lines.

[0005] 传统的MTJ 11堆叠主要包括具有可变磁矢量(没有明确显示)的自由层1104、 具有固定磁矢量(没有明确显示)的钉扎层(pinned layer) 1102、以及在两个磁性层1104 和1102之间的绝缘体1103。 [0005] The conventional MTJ 11 includes a stack having a variable magnetic vector (not explicitly shown) of the free layer 1104, having a fixed magnetic vector (not explicitly shown) of the pinned layer (pinned layer) 1102, and the two magnetic layers between 1104 and 1102 of the insulator 1103. 绝缘体1103通常具有足够小的厚度,使得电荷载流子可在磁性层1102和1104之间隧穿。 Insulator 1103 generally has a sufficiently small thickness, such that charge carriers can tunnel between the magnetic layers 1102 and 1104. 层1101通常是由晶种层和反铁磁层构成的,所述反铁磁层强耦合到钉扎的磁性层。 Layer 1101 is usually caused by the seed layer and the antiferromagnetic layer formed, the strong antiferromagnetic layer coupled to the pinned magnetic layer.

[0006] 通过对传统的MTJ堆叠11施加磁场,在传统的MTJ堆叠11中储存数据。 [0006] By applying a magnetic field of the conventional MTJ stack 11, the MTJ stack 11 in a conventional store data. 选择所施加磁场的方向,以便将自由层1104的可变磁矢量移动到所选择的方位。 Selecting the direction of the magnetic field applied to the free layer 1104 of the variable magnetic vector is moved to the selected position. 在写入期间,在传统的位线12中流动的电流I1以及在传统的字线10中流动的电流I2在自由层1104上产生了两个磁场。 In the address period, in the conventional bit line 12 and the current I1 flowing through the word line 10 in a conventional current I2 flowing in the free layer 1104 generates two magnetic fields. 响应由电流I1和I2所产生的磁场,自由层1104中的磁矢量被定位在特定的、稳定的方向。 In response to magnetic fields generated by currents I1 and I2 generated by the free layer 1104 is positioned in the magnetic vector in a specific, stable direction. 此方向取决于电流I1和I2的方向和幅度以及自由层1104的特性和形状。 This direction is determined by currents I1 and I2 as well as the direction and amplitude characteristics and the shape of the free layer 1104. 通常,写入零(0)要求电流I1或I2的方向与写入一⑴时的方向不同。 Typically, write zero (0) requires the direction of the write current I1 or I2 of different directions when a ⑴. 通常分别是,对准的方位指定为逻辑1或0,而未对准的方位是相反的,即,逻辑0或1。 Typically, respectively, the alignment orientation is designated as a logic 1 or 0, but not aligned with the opposite orientation, i.e., a logic 0 or 1.

[0007] 通过使电流从一个磁性层到另一个层通过传统的MTJ单元来读取或读出所存储的数据。 [0007] Another layer data by passing a current through the conventional MTJ cell to read or read from one magnetic layer to the stored. 在读取期间,传统的晶体管13开启,小的隧穿电流流过传统的MTJ单元。 During reading, the conventional transistor 13 is turned on, a small tunneling current flows through the conventional MTJ cell. 测量流过传统的MTJ单元11的电流量或者传统的MTJ单元11两端的电压降,以确定存储单元的状态。 Measuring the amount of current flowing through the conventional MTJ cell 11 or 11 of the voltage drop across the conventional MTJ cell, in order to determine the state of the memory cell. 在一些设计中,传统的晶体管13由二极管替代,或者完全被省略,从而传统的MTJ单元11直接与传统的字线10接触。 In some designs, the conventional transistor 13 is replaced by a diode, or completely omitted, whereby 11 direct the conventional MTJ cell 10 in contact with the conventional word line.

[0008] 尽管上述传统的MTJ单元11能够使用传统的字线10和传统的位线12来写入,但是本领域普通技术人员将很容易意识到,对于大多数设计来说,I1或I2的幅度是几毫安的量级。 [0008] Although the above-described conventional MTJ cell 11 can use a conventional word line 10 and bit line 12 to a conventional writing, but one of ordinary skill in the art will readily appreciate that, for most designs, I1 or I2 of the order of magnitude of a few milliamps. 因此,本领域普通技术人员还将意识到,对于许多存储器应用都期望较低的写入电流。 Accordingly, those of ordinary skill will further appreciate that, for many memory applications expect a lower write current.

[0009] 图2显示了具有较低写入电流的传统磁性存储器1'的一部分。 [0009] Figure 2 shows a part of conventional magnetic memory write current having a lower 1 '. 在美国专利No. 5,659,499、美国专利No. 5,940, 319、美国专利No. 6,211,090、美国专利No. 6,153,443、 美国专利申请公开No. 2002/0127743中描述了类似的系统。 In U.S. Patent No. 5,659,499, U.S. Patent No. 5,940, 319, U.S. Patent No. 6,211,090, U.S. Patent No. 6,153,443, U.S. Patent Application Publication No. 2002/0127743 A similar system is described. 这些引用文献中所公开的传统系统以及制造该传统系统的传统方法在三个不面对MTJ单元11'的表面上用软磁包层(cladding layer)包裹位线和字线。 These conventional systems cited in the literature and disclosed in the conventional method of manufacturing the conventional systems do not face in the three MTJ cell 11 'of the surface with a soft magnetic cladding layer (cladding layer) wrapped in bit lines and word lines. 图2中所示的传统存储器的许多部分类似于图1中所示的那些部分,因此被类似地标记。 Many of those portions shown in part similar to the conventional memory shown in Figure 1, Figure 2, and therefore are similarly labeled. 图2中所示的系统包括传统的MTJ单元11'、传统的字线10'和位线12'。 The system shown in Figure 2 includes a conventional MTJ cell 11 ', the conventional word line 10' and the bit line 12 '. 传统的字线10'由两部分组成:铜芯1001和软磁包层1002。 Conventional word line 10 'consists of two parts: copper core 1001 and a soft magnetic cladding layer 1002. 类似地,传统的位线12'由两部分组成:铜芯1201和软磁包层1202。 Similarly, a conventional bit line 12 'consists of two parts: a soft magnetic cladding layer 1201 and the copper core 1202.

[0010] 相比于图1中的设计,软磁包层1002和1202能够将与I1和I2相关的磁通量汇聚在MTJ单元11'上,并降低没有面对MTJ单元11'的表面上的磁场。 1 Design [0010] Compared to Fig., A soft magnetic cladding layer 1002 and 1202 can be associated with I1 and I2 in 11 MTJ magnetic flux convergence unit apos, and reducing unit not facing MTJ 11 'on the surface of the magnetic field . 因此,软磁包层1002 和1202将磁通量汇聚在构成MTJ单元11 '的MTJ上,使得更容易编程自由层1104。 Therefore, the soft magnetic cladding layer 1002 and 1202 converge the magnetic flux on the MTJ constituting MTJ cell 11 ', making it easier the programming free layer 1104.

[0011] 尽管这种方法理论上工作很好,但是本领域普通技术人员将很容易意识到,分别在传统线10'和12'的垂直侧壁上的软磁包层1002和1202部分的磁特性是很难控制的。 [0011] Although this approach works well in theory, but one of ordinary skill in the art will readily appreciate that the soft magnetic cladding layer 1002 and 1202, respectively, on the part of the traditional line 10 'and 12' of the vertical side walls characteristic is difficult to control. 本领域普通技术人员还将意识到,制造传统的字线10'和传统的位线12'的工艺是很复杂的。 Those of ordinary skill will further appreciate, the conventional manufacturing wordline 10 'and the conventional bit line 12' of the process is very complicated. 分别包括包层1002和1202的传统字线10'和传统位线12'的形成,需要大约9个薄膜沉积步骤、5个光刻步骤、6个蚀刻步骤以及1个化学机械抛光(chemical mechanical polishing, CMP)步骤。 Forming word lines each include traditional cladding layer 1002 and 1202 10 'and the conventional bit line 12', takes about nine film deposition step, a photolithography step 5, 6, and an etching step of chemical mechanical polishing (chemical mechanical polishing , CMP) step. 此外,没有工艺能够与其它的CMOS工艺共用。 Moreover, no process can be shared with other CMOS process. 需要严格控制其中一些工艺,例如CMP工艺以及几个薄膜沉积工艺和蚀刻工艺,以便获得预期的性能。 Some processes require strict control of, e.g., a CMP process as well as several thin film deposition process and an etching process, in order to obtain the desired performance. 由于其上制造器件的晶片表面不平坦并且要去除的部分在沟槽深处,所以需要将写入线10' 和12'排列得相当稀疏,以便适应光刻工艺。 Since the devices are fabricated on the wafer surface which is not flat and the portion to be removed in the depths of the trench, so it is necessary to write lines 10 'and 12' are arranged quite sparse so as to adapt the lithography process. 因此,如果软磁包层1002和1202用于线10'和12',将会牺牲芯片上存储器件的密度和容量。 Therefore, if a soft magnetic cladding layer 1002 and 1202 for the lines 10 'and 12', the memory device will sacrifice chip density and capacity. 这种复杂的制造方法对按比例缩小(scaling)以获得较高密度提出了严峻的挑战。 This complex method for producing a scaled-down (scaling) to obtain a higher density poses a severe challenge. 因此,非常期望提供一种可按比例缩小的、 容易制造的并提供较高写入效率的MRAM结构。 Therefore, it is desirable to provide a scaled down, and easy to manufacture and provide a higher write efficiency MRAM structure.

[0012] 图1和图2中所示传统设计的传统写入线10、10'、12、12'的其它方面限制了可按比例缩小性。 [0012] Figure 1 and write lines of traditional design shown in Figure 2 the traditional 10, 10 ', 12, 12' of the other aspects of the limits of scaled down. 在这些传统的设计中,传统的写入线10、10'、12、12'主要由铝或铜构成。 In these conventional designs, the conventional write lines 10, 10 ', 12, 12' is mainly made of aluminum or copper. 铝和铜的电流密度限制在lX106A/cm2或更低的量级。 Aluminum and copper, the current density limit in lX106A / cm2 or less magnitude. 随着线宽减小以增大存储器密度, 电迁移电流密度限制对于按比例缩小提出了严峻的挑战。 As the line width decreases with increasing storage density, electro-migration current density limit for scaled poses a severe challenge.

[0013] 其它的传统系统试图提出不同的解决方案,每种方案都具有缺陷。 [0013] Other conventional systems attempt to propose different solutions, each program has a flaw. 例如,美国专利申请公开No. 2002/0080643提出,在写入操作之后,对写入线施加反向电流以防止电迁移。 For example, U.S. Patent Application Publication No. 2002/0080643 suggested that after the write operation, the reverse current is applied to the write line to prevent electromigration. 但是这样的传统方法通过降低存储器速度及增加复杂性而损害了性能。 However, such conventional methods by reducing the speed and increasing the complexity of memory at the expense of performance. 因此,还迫切期望使写入线由在电迁移方面具有高可靠性的材料构成,其使得可以容易地按比例缩小以获得高密度存储器阵列。 Accordingly, the write line is also strongly desired from a material having a high reliability in terms of electromigration constituted, which makes it possible to easily scaled down to obtain a high-density memory array.

[0014] 可能用于更小或更有效的存储器中的传统薄位线具有一些缺点。 [0014] may be used in smaller or more efficient memory traditional thin bit line has some drawbacks. 较薄的传统位线具有较高的电阻。 Thinner conventional bit line has a high resistance. 这有害地影响了整个存储器阵列的性能。 This adversely affects the performance of the entire memory array. 但是,有许多克服此问题的传统方法。 However, there are many traditional methods to overcome this problem. 一种通常的做法是将存储器阵列中的长位线分成由厚金属制成的全局位线(global bit lines),并将全局位线连接到由较薄金属制成的局部位线(local bit lines),因此具有较高的电阻。 A common practice is to the memory array bit line into the long global bit line from a thick metal-made (global bit lines), and connect the global bit line to local bit lines made from a thin metal (local bit lines), and therefore has a high resistance. 美国专利No. 6,335,890和美国专利申请公开No. 2002/0034117中揭示了这样设计的示例。 U.S. Patent No. 6,335,890 and U.S. Patent Application Publication No. 2002/0034117 discloses an example of such a design. 但是,仍没有克服上述的其它问题,例如电迁移的问题。 However, still not overcome other problems mentioned above, problems such as electromigration.

[0015] 类似地,其它的传统系统将写入线分成段,每个段通过选择晶体管连接到具有更低电阻的全局写入线。 [0015] Similarly, other conventional systems would write line into segments, each segment having a lower resistance connection to the global write line through the select transistor. 例如,美国专利No. 6,335,890和美国专利申请公开No. 2002/0176272中揭示了将传统的写入线分成段的系统。 For example, U.S. Patent No. 6,335,890 and U.S. Patent Application Publication No. 2002/0176272 discloses a traditional segmented write line system. 在写入期间,只有一段传统的写入线传导电流。 During writing, only the section of the conventional write lines conduct current.

[0016] 图3显示了结合传统分段写入线(segmented write line)的传统设计20。 [0016] Figure 3 shows the binding of the traditional segmented write line (segmented write line) 20 of conventional design. 传统设计20包括用作MRAM单元的传统MTJs 31、传统的分段磁性写入线32、传统的全局写入和返回线301和302、传统的选择晶体管305、传统的数字线303和传统的位线选择晶体管304。 20 of conventional design is used as an MRAM cell comprising a traditional MTJs 31, a conventional magnetic write line segment 32, a conventional global write and return lines 301 and 302, the conventional selection transistor 305, conventional digital line 303 and conventional bits line selection transistor 304. 传统的分段写入线32通过传统的部分选择晶体管305连接到传统的全局写入线301 和传统的全局写入返回线302。 The traditional segmented write line 32 305 connected via a traditional part of the select transistor to 301 conventional and traditional global global write lines to write the return line 302. 其它的段(没有显示)将以类似的方式连接到传统的全局写入线301和传统的全局写入返回线302。 Other sections (not shown) will be connected in a similar manner to a conventional global write line 301 and a conventional global write return line 302. 举例而言,传统的分段写入线32的所述部分连接到4个传统的MTJs 31。 For example, part of the traditional segmented write line 32 is connected to four conventional MTJs 31. 在传统的配置中,每个传统的MTJ 31然后通过传统的位线选择晶体管304连接到地线。 In the conventional configuration, each conventional MTJ 31 and the selection transistor 304 is connected to ground via a conventional bit line. 传统的数字线303在每个传统的MTJ 31处垂直于传统的写入线32。 Conventional digital line 303 in the conventional vertically at each MTJ 31 in a conventional write line 32.

[0017] 在写入期间,传统的晶体管305开启,以使写入电流从传统的全局写入线301通过传统的分段写入线32的段流到传统的全局写入返回线302。 [0017] In the address period, a conventional transistor 305 is turned on, so that the write line write current 301 to flow from the traditional globally traditional global segment by segment conventional write line 32 the write return line 302. 由传统分段写入线32中的写入电流所产生的磁场同时干扰该部分中所含的4个传统MTJs 31的自由层的磁矢量。 Magnetic field generated by the traditional segmented write line 32 the write current generated by the magnetic vector of the free layer while the interference of the portion contained in the four conventional MTJs 31. 根据传统数字线303中流动的电流的幅度和极性,数字数据被写入传统的MTJs 31中。 According to line 303 in the conventional digital amplitude and polarity of the current flowing, the digital data is written in a conventional MTJs 31. 以此方式,能够同时写入4个MRAM单元。 In this manner, can be simultaneously written four MRAM cells.

[0018] 尽管能够并行写入4个MRAM单元,但是本领域普通技术人员将很容易意识到,在读取期间,4个位线选择晶体管304中只有一个能够开启。 [0018] Although the MRAM can be written in parallel into four units, but one of ordinary skill in the art will readily appreciate, during reading, four bit line selection transistor 304 can be turned on only one. 当4个位线选择晶体管304中开启一个时,能够测量传统的全局写入线301上的电压(因为连接到传统的分段写入线32), 以便确定所选的MTJ 31的逻辑状态。 When the four bit line select transistors 304 in an open, capable of measuring conventional global write voltage on the line 301 (as connected to a conventional segmented write line 32), in order to determine the logic state of the selected MTJ 31. 因此,尽管能够并行地写入该部分的4个单元中的数据,但是在该4个单元中的数据是串行地读取的。 Thus, although it is possible to write data in parallel to four units of the part in, but the data in the four units are serially read. 因此,本领域普通技术人员将很容易意识到,存储在MTJs 31中的数据的读取效率可能比预期低。 Accordingly, one of ordinary skill in the art will readily appreciate that the efficiency of reading data stored in the MTJs 31 may be lower than expected. 此外,仍没有克服上述的其它问题,例如电迁移的问题。 Furthermore, still not overcome other problems mentioned above, problems such as electromigration.

[0019] 因此,需要的是一种用于提供可按比例缩小的、有效的、低电流的磁性存储器的系统和方法,该磁性存储器在制造容易性及电迁移可靠性方面有所改进。 [0019] Accordingly, a need for providing a scaled down, efficient, low current system and method of the magnetic memory, the magnetic memory in ease of production and improved electromigration reliability. 还期望提供一种能够支持更简单驱动器设计并能够更有效读取的结构。 It is also desirable to provide a simpler drive support structure capable of more efficient design and read. 而且,期望安排全局写入线,使得由流过MRAM单元上全局写入线的电流所引起的磁干扰最小。 Moreover, it is desirable arrangement global write line, so that by flowing through the MRAM cell global write line current magnetic interference caused by minimum. 还期望获得一种用于提供能够具有更大写入余地(margin)以及更有效读取操作的高密度非易失性MRAM的系统和方法。 It is also desirable to obtain a method for providing write capable of having a greater margin (margin) as well as systems and methods for more efficient high-density read operation of a nonvolatile MRAM. 本发明即针对这样的需要。 The present invention addresses such a need.

[0020] 发明内容 [0020] SUMMARY

[0021] 本发明公开了一种用于提供磁性随机存取存储器(MRAM)阵列的方法和系统。 [0021] The present invention discloses a method and system for providing a magnetic random access memory (MRAM) array. 该方法和系统包括提供MRAM阵列,该MRAM阵列包括磁性存储单元、全局字线、磁性字线、读取位线、选择器件和写入位线。 The method and system includes providing a MRAM array, the MRAM array includes a magnetic storage unit, the global word line, magnetic word lines, read bit line, and the write bit line selection devices. 每条磁性字线具有数个段。 Each word line has a plurality of magnetic segments. 每个段与全局字线连接,使得每个段都可分别选择。 Each segment is connected to the global word line, such that each segment can be separately choice. 每个段还连接到磁性存储单元的一部分。 Each segment is also connected to a portion of the magnetic memory cell. 读取位线相对于磁性字线成一角度而定向。 Read bit line with respect to the magnetic word lines is oriented at an angle. 读取位线通过选择器件与磁性单元连接。 Read bit line connected to the device by selecting the magnetic unit. 写入位线基本上平行于读取位线。 Write bit lines substantially parallel to the read bit line. 优选地,磁性字线包括软磁材料,并通过薄的非磁层连接到每个磁性存储单元。 Preferably, the magnetic word lines include a soft magnetic material, and connected to each magnetic memory cell by a thin non-magnetic layer. 为了降低全局字线中电流的干扰,全局字线还基本上平行于磁性字线。 In order to reduce interference in the current global word line, global word line is also substantially parallel to the magnetic word lines.

[0022] 本发明提供了一种磁性随机存取存储器阵列,包括:多个磁性存储单元;多条全局字线;多条磁性字线,所述多条磁性字线的每一条包括软磁性材料以及具有多个段,所述多个段的每一段通过段选择器件连接到所述多条全局字线的一条,使得所述多个段的每一段通过段选择器件的其中之一能够分别被选择,所述多个段的每一段连接到所述多个磁性存储单元的至少其中之一;多条读取位线,相对于所述多条磁性字线成垂直角度而定向; 多个选择器件,所述多条读取位线的每条通过所述多个选择器件的其中之一与所述多个磁性存储单元的其中之一连接;以及多条写入位线,平行于所述多条读取位线。 [0022] The present invention provides a magnetic random access memory array comprising: a plurality of magnetic memory cells; a plurality of global word lines; each of a plurality of magnetic word lines, said plurality of magnetic word lines include soft magnetic material and one of which has a plurality of segments, each segment of the plurality of segments connected by a segment selector device to the plurality of global word lines of one, so that each section of the plurality of segments by segment were able to select the device select, each segment of said plurality of segments connected to the plurality of magnetic memory cells wherein at least one of; a plurality of read bit lines, with respect to the plurality of magnetic word lines oriented perpendicular angle; multiple choice device, the plurality of read bit lines of each one of said plurality of selection devices connected to one of said plurality of magnetic memory cells through; and a plurality of write bit lines, parallel to the a plurality of read bit lines.

[0023] 本发明进一步提供了一种利用上述的磁性随机存取存储器阵列的方法,包括:(a) 在写入模式中,从写入驱动电流电源向所述多条全局字线的至少一条驱动电流;(b)在写入模式中,选择所述多个段的至少一个;(c)在写入模式中,提供第一写入电流通过所述多个段的所述至少一个;以及(d)在写入模式中,提供第二写入电流给多条写入位线;其中所述多个磁性存储单元的每一个通过所述多个选择器件中相对应的一个,分别与多条读取位线的其中之一连接,所述多条读取位线相对于所述多条磁性字线成垂直角度而定向。 [0023] The present invention further provides a method using the above magnetic random access memory array, comprising: (a) in a write mode, the write drive current from the power source to the plurality of global word lines at least one drive current; (b) in the write mode, selecting at least one of said plurality of segments; (c) in the write mode, providing a first write current through the at least one of said plurality of segments; and (d) in the write mode, providing a second write current to a plurality of write bit lines; wherein each of said plurality of selector devices by a corresponding one of said plurality of magnetic memory cells, respectively, and more One strip read bit line is connected, the plurality of read bit lines with respect to the plurality of magnetic word lines oriented perpendicular angle.

[0024] 按照此处公开的系统和方法,本发明提供了一种具有改进的写入余地和读取效率的磁性存储器。 [0024] The systems and methods disclosed herein, the present invention provides a room with improved write efficiency and the read magnetic memories.

附图说明 Brief Description

[0025] 图1是位于传统位线与传统字线交叉处的传统MRAM单元中传统MTJ的三维视图。 [0025] FIG. 1 is a conventional MRAM cell in a traditional conventional word line and bit line intersections in a three-dimensional view of the conventional MTJ.

[0026] 图2是在具有传统磁性写入线的传统MRAM单元中的传统MTJ的侧视图。 [0026] FIG. 2 is a conventional MRAM cell having a conventional magnetic write lines in the side view of the conventional MTJ.

[0027] 图3显示了传统的分段磁性写入线的传统配置。 [0027] Figure 3 shows a conventional magnetic write line segment conventional configuration.

[0028] 图4显示了利用磁性写入线的MRAM的一部分的一个实施例。 [0028] Figure 4 shows the use of magnetic write lines of the MRAM one embodiment of a portion.

[0029] 图5显示了按照本发明的MRAM的一部分的一个实施例。 [0029] Figure 5 shows an embodiment of a portion of the MRAM according to the present invention.

具体实施方式 DETAILED DESCRIPTION

[0030] 本发明涉及磁性存储器的改进。 [0030] The present invention relates to improved magnetic memory. 下面的说明使得本领域普通技术人员能够制造和利用本发明,并且是在专利申请及其要求的背景下提供的。 The following description makes ordinary skill in the art to make and use the invention, and is in the context of a patent application and its requirements background provided. 对优选实施例的各种修改对于本领域技术人员来说将是很明显的,并且此处的一般原理可用于其它的实施例。 Various modifications of the preferred embodiments the skilled artisan will be apparent, and the generic principles herein may be used in other embodiments. 因此,本发明不限于所示的实施例,而应给予与此处所公开的原理和特征相一致的最宽范围。 Thus, not limited to the illustrated embodiment of the invention, but should give consistent with the principles and features disclosed herein widest scope.

[0031] 共同未决的美国专利申请,序列号为No. 60/431/742、标题为“MRAM MEMORIES UTILIZING MAGNETIC WRITE LINES”、已转让给本申请的受让人,公开了一种MRAM结构,其针对传统MRAM器件中遇到的许多问题。 [0031] co-pending US Patent Application Serial No. No. 60/431/742, titled "MRAM MEMORIES UTILIZING MAGNETIC WRITE LINES", and assigned to the assignee of the present application discloses an MRAM structure many of the traditional problems encountered in MRAM devices. 申请人在此以引用方式结合了上述共同未决的申请。 Applicant hereby incorporates by reference the above-mentioned copending application. 图4显示了MRAM 70的一部分的一个实施例,包括上述共同未决申请中所公开的基本结构。 Figure 4 shows an embodiment of a portion of MRAM 70, including the basic configuration of the copending application are disclosed. 图4中显示的MRAM 70包括优选地为MTJ堆叠90的磁性元件90、形成在衬底80中的选择器件81、磁性写入线82、位线83、导电立柱(conductive stud) 87、连接立柱96和地线97。 Figure 4 shown in MRAM 70 includes the MTJ stack 90 is preferably a magnetic element 90, formed in the substrate 80 in the selection device 81, the magnetic write line 82, bit line 83, a conductive pillar (conductive stud) 87, connected to the column 96 and ground 97. 选择器件81优选地是包括栅极84、源极85和漏极86的FET晶体管。 Select device 81 preferably includes a gate 84, source 85 and drain 86 of the FET transistor. MTJ堆叠包括具有固定磁矢量(没有显示)的钉扎层92、隧道层93、具有可变磁矢量(没有显示)的自由层94、以及导电覆盖层(capping layer) 95。 MTJ stack includes a staple having a fixed magnetic vector (not shown) of the pinned layer 92, a tunnel layer 93, having a variable magnetic vector (not shown) of the free layer 94, and a conductive covering layer (capping layer) 95. 导电覆盖层95优选地是非磁性间隔层95。 Conductive coating 95 is preferably a non-magnetic spacer layer 95. MTJ堆叠还包括一些层(没有明确显示),这些层包括晶种层,优选地包括反铁磁层。 MTJ stack further comprising a number of layers (not explicitly shown), these layers comprise a seed layer, preferably comprising an antiferromagnetic layer.

[0032] 磁性写入线82包括软磁性材料,并通过非磁性间隔层95与MTJ堆叠90的自由层94分开。 [0032] 82 magnetic write lines include soft magnetic material, and through the non-magnetic spacer layer 95 and the free layer 90 of the MTJ stack 94 to separate. 在一个实施例中,写入线83也是磁性的。 In one embodiment, the write line 83 is magnetic. 磁性写入线82优选地基本上或完全由软磁性材料构成。 Magnetic write line 82 is preferably substantially or entirely made of a soft magnetic material. 此外,至少与包层相对的芯包括软磁性层。 In addition, at least opposite the core and the clad layer comprises a soft magnetic. 由于磁性写入线82与自由层94之间的小间隔,导致自由层94的磁矢量静磁强耦合到磁性写入线82的磁矢量。 Due to the small gap magnetic write lines 82 and 94 between the free layer, resulting in the magnetic vector of the free layer 94 is coupled to a static magnetic intensity magnetic vector magnetic write line 82. 这样的静磁耦合促进了自由层磁矢量的转动幅度。 This magnetostatic coupling facilitates rotation rate of the free layer magnetic vector. 因此,使用上述共同未决申请中所公开的方法和系统,就能使用较低的电流,这是由于在软磁性位线82与MTJ 90之间的强磁性耦合。 Thus, using the above copending applications the methods and systems disclosed can use a lower current, which is due to ferromagnetic coupling between 82 and the MTJ 90 in the soft magnetic bit lines. 此外,由于磁性合金的极好的电迁移可靠性,所以磁性写入线可以制造得较薄,从而容易制造并具有较好的封装密度。 Furthermore, since the excellent electromigration reliability of the magnetic alloy, so the magnetic write line can be made thinner, thus easy to manufacture and has better packing density.

[0033] 尽管上述共同未决申请中所公开的方法和系统很好地实现了它们的预期目的,但是本领域普通技术人员很容易意识到,磁性写入线经常具有相对高的电阻。 [0033] Although the method and system of the above copending application disclosed to achieve a good for their intended purposes, but those skilled in the art will readily recognize that magnetic write lines often have a relatively high resistance. 由于小的厚度与使用磁性合金的较高电阻率的组合,所以磁性写入线的线电阻可比主要是铜或铝的传统写入线大得多。 Due to the small thickness combined with the use of magnetic alloy higher resistivity, so the magnetic write line of the main line resistance than conventional write line is much larger copper or aluminum. 所述高电阻率可给写驱动电路设计带来困难。 The high resistivity to a write driver circuit design can be difficult.

[0034] 本发明提供了一种用于提供磁性随机存取存储器(MRAM)阵列的方法和系统。 [0034] The present invention provides a method and system for providing a magnetic random access memory (MRAM) array. 该方法和系统包括提供具有磁性存储单元、全局字线、磁性字线、读取位线、选择器件和写入位线的MRAM阵列。 The method and system include providing magnetic memory cells, the global word line, magnetic word lines, read bit lines, select MRAM array device and write bit lines. 每条磁性字线具有数个段。 Each word line has a plurality of magnetic segments. 每个段与全局字线连接,使得每个段都可分别选择。 Each segment is connected to the global word line, such that each segment can be separately choice. 每个段还连接到磁性存储单元的一部分。 Each segment is also connected to a portion of the magnetic memory cell. 读取位线相对于磁性字线成一角度而定向。 Read bit line with respect to the magnetic word lines is oriented at an angle. 读取位线通过选择器件与磁性单元连接。 Read bit line connected to the device by selecting the magnetic unit. 写入位线基本上平行于读取位线。 Write bit lines substantially parallel to the read bit line. 优选地, 磁性字线包括软磁性材料,并通过薄的非磁性层连接到每个磁性存储单元。 Preferably, the magnetic word lines include a soft magnetic material, and connected to each magnetic memory cell by a thin non-magnetic layer. 为了降低全局字线中电流的干扰,全局字线还基本上平行于磁性字线。 In order to reduce interference in the current global word line, global word line is also substantially parallel to the magnetic word lines.

[0035] 本发明将根据特定类型的磁性存储单元、元件的特定材料和特定配置来说明。 [0035] The present invention will be described according to a particular type of magnetic memory cells, the specific materials and the specific configuration element. 但是,本领域普通技术人员将很容易意识到,这种方法和系统对于与本发明不一致的其它磁性存储单元、其它材料和配置也会有效。 However, one of ordinary skill in the art will readily appreciate that such a method and system for other magnetic memory cells are inconsistent with the present invention, other materials and configurations will be effective.

[0036] 为了更具体地说明本发明的方法和系统,现参照图5,其显示了按照本发明的MRAM阵歹Ij 100的一个实施例。 [0036] In order to further illustrate the present invention method and system, Referring now to Figure 5, which shows the MRAM array in accordance with the present invention a bad Ij 100 embodiment. MRAM阵列包括磁性存储单元ClU C12、C13、C14、C21、C22、 C23 和C24。 MRAM array including magnetic storage unit ClU C12, C13, C14, C21, C22, C23 and C24. 磁性存储单元Cll、C12、C13、C14、C21、C22、C23 和C24 优选地是MTJs,如图4 所示。 Magnetic storage unit Cll, C12, C13, C14, C21, C22, C23 and C24 are preferably MTJs, as shown in FIG. 但是,在可选实施例中,可使用其它类型的单元,例如GMR或AMR单元。 However, in alternative embodiments, may use other types of cells, such as GMR or AMR unit. 每个磁性存储单元ClU C12、C13、C14、C21、C22、C23、C24 分别与对应的选择器件Til、T12、T13、T14、 T21、T22、T23、T24 连接。 Each magnetic memory cell ClU C12, C13, C14, C21, C22, C23, C24, respectively, with the corresponding selection devices Til, T12, T13, T14, T21, T22, T23, T24 connection. 在优选实施例中,选择器件Til、T12、T13、T14、T21、T22、T23 和TM是选择晶体管。 In the preferred embodiment, select device Til, T12, T13, T14, T21, T22, T23, and TM is a selection transistor. 但是在可选实施例中,可使用其它的选择器件,例如二极管。 However, in alternative embodiments, may use other selection device, such as a diode. MRAM阵列包括读取位线102、104、106和108 ;写入位线110、112、114和116 ;读取字线118和120 ;以及全局写入字线122、1M和126。 MRAM array includes read bit lines 102, 104 and 108; 110, 112, and 116 write bit lines; read word lines 118 and 120; and global 122,1M and write word line 126. MRAM阵列还包括被分成段的磁性字线,分成kg IUSeg 12、Seg 21和Seg 22。 MRAM array further comprises a segmented magnetic word lines, divided kg IUSeg 12, Seg 21 and Seg 22. 还包括段选择晶体管Seg TlU Seg T12、Seg T21和Seg T22以及段选择线1和130。 Also includes a selection transistor segment Seg TlU Seg T12, Seg T21 and Seg T22 and segment selection line 1 and 130. 每个段kg IUSeg 12, Seg 2USeg 22分别通过段选择晶体管kg TlUSeg T12,Seg T2U Seg T22连接到全局写入字线122和124。 Each segment kg IUSeg 12, Seg 2USeg 22 respectively, through the segment select transistor kg TlUSeg T12, Seg T2U Seg T22 is connected to the global write word line 122 and 124. 分别使用段选择线128 和段选择线130来选择段选择晶体管kg 以及段选择晶体管kg Respectively, using the section 128 and section select line select lines 130 to select the segment selector and segment selection transistor transistor kg kg

T22。 T22. [0037] 为了使全局写入线122、124和126中的写入电流对MTJ单元Cll、C12、C13、C14、 C21、C22、C23和C24的干扰最小,全局写入字线122、IM和1被排列成基本上平行于磁性字线kg IUSeg 12、^5g21*^5g 22。 [0037] In order to make the global write lines 122, 124 and 126 of the write current of MTJ cell Cll, C12, C13, C14, C21, C22, C23 and C24 minimal interference, the global write word line 122, IM and 1 are arranged substantially parallel to the magnetic wordlines kg IUSeg 12, ^ 5g21 * ^ 5g 22. 磁性字线kg IUSeg 12, Seg 21 和kg 22 的磁矢量基本上平行于磁性字线kg IUSeg 12, Seg 21和kg 22的长度方向(即,图5中的水平方向)。 Word line magnetic vector magnetic kg IUSeg 12, Seg 21 and kg 22 substantially parallel to the magnetic wordlines kg IUSeg 12, Seg 21 kg 22 and the longitudinal direction (i.e., horizontal direction in FIG. 5). 因此,磁性字线kg IUSeg 12,Seg 21和kg 22响应垂直于磁性字线kg IUSeg 12,Seg 21和kg 22的磁场(即,垂直地)是可透过(permeable)的。 Thus, the magnetic wordlines kg IUSeg 12, Seg 21 and perpendicular to the magnetic response kg 22 wordlines kg IUSeg 12, 21 and the magnetic field Seg kg 22 (i.e., vertically) is permeable (permeable) of. 但是,磁性字线kg IU Seg 12, Seg 21和kg 22响应平行于这些线的磁场是不可透过的。 However, the word line magnetic kg IU Seg 12, Seg 21 kg 22 and parallel to these lines in response to a magnetic field is impermeable. 以此方式,磁性字线kg IUSeg 12,Seg 21和kg 22提供了对垂直于磁性字线kg IUSeg 12、 Seg 21和^^ 22的外部磁场的良好磁屏蔽。 In this manner, the word line magnetic kg IUSeg 12, Seg 21 and kg 22 provides a word line perpendicular to the magnetic kg external magnetic field IUSeg 12, Seg 21 and 22 ^^ good magnetic shielding. 因此,在全局字线122、1M和126中平行于磁性字线kg IUSeg 12,Seg 21和kg 22而流动的电流产生了垂直于磁性字线kg 11、 Seg 12、Seg 21和kg 22的场,因此,对MRAM单元具有最小的磁干扰。 Thus, the global word line 122,1M and 126 parallel to the magnetic wordlines kg IUSeg 12, Seg 21 and kg 22 which produces a current flowing perpendicular to the magnetic wordlines kg 11, Seg 12, and field Seg 21 kg 22 of Therefore, for an MRAM cell having a minimal magnetic interference.

[0038] 在所给出的示例中,磁性字线的每个段kg IUSeg 12, Seg 2USeg 22连接到两个磁性存储单元C11、C12、C13、C14、C21、C22、C23、C24。 [0038] In the example given, the word lines of each segment magnetic kg IUSeg 12, Seg 2USeg 22 is connected to the two magnetic memory cells C11, C12, C13, C14, C21, C22, C23, C24. 例如,磁性字线的段kg 11连接到MTJs Cll和C12,等等。 For example, section kg 11 magnetic word line connected to the MTJs Cll and C12, and so on. 在实际中,通过存储器配置以及通过字线的所需写入电流来确定连接到每个磁性字线段kg IUSeg 12, Seg 2USeg 22的存储单元C11、C12、C13、C14、C21、 C22、C23、C24的数量。 In practice, through the memory and configured by the word line write current required to determine the word line connected to each of the magnetic kg IUSeg 12, Seg of the memory cell C11 2USeg 22, C12, C13, C14, C21, C22, C23, amount of C24. 磁性字线Seg 11、Seg 12、Seg 21、Seg 22中的写入电流越大,则段选择晶体管kg TlUSeg T12,Seg T2USeg T22的尺寸就越大。 Magnetic word lines Seg 11, Seg 12, Seg 21, Seg 22 in the write current is larger, the segment select transistors kg TlUSeg T12, Seg T2USeg T22 larger the size. 随着段选择晶体管kg TlUSeg T12,Seg T2U Seg T22的尺寸增大,对于较高的封装密度还需要增加连接到每个磁性字线段kg IUSeg 12, Seg 21, Seg 22的单元数量。 As the segment select transistor kg TlUSeg T12, Seg T2U Seg T22 increased in size for higher packing density also requires increasing the word line connected to each of the magnetic kg IUSeg 12, Seg 21, the number of cells Seg 22. 分段磁性字线kg IUSeg 12、 Seg 22提高了写入效率,因此使这些段选择晶体管kg TlU Seg T12, Seg T21 和^^ T22的尺寸最小化,提高了封装密度,并在确定每段的单元数量方面提供了更多灵活性。 Segmented magnetic wordlines kg IUSeg 12, Seg 22 improves writing efficiency, thus making these segment select transistors kg TlU Seg T12, Seg T21 ^^ T22 and minimize the size and improve the packing density and in determining for each segment terms of the number of units to provide more flexibility.

[0039]每个]1\1(:11、(:12、(:13、(:14、021、022、023、(^4具有一个端与分段字线^^ 11、 Seg 12,Seg 2USeg 22 接触。每个MTJ C11、C12、C13、C14、C21、C22、C23、C24 的另一端通过选择晶体管Til、T12、T13、T14、T21、T22、T23 和T24 连接到读取位线102、104、106、108。 例如,MTJ Cll通过晶体管Tll连接到读取位线102,等等。为了将数据写入每个MRAM单元C11、C12、C13、C14、C21、C22、C23、C24 中,还结合分段字线kg IUSeg 12, Seg 2USeg 22 为每个单元ClU C12、C13、C14、C21、C22、C23、C24 提供写入位线110、112、114 和116。 写入位线110、112、114和116被排列得基本上垂直于分段字线kg IUSeg 12, Seg 21和Seg 22。 [0039] Each] 1 \ 1 (: 11, (: 12, (: 13, (: 14,021,022,023, (^ 4 having an end segment word line ^^ 11, Seg 12, Seg 2USeg 22 contact each MTJ C11, C12, C13, C14, C21, C22, C23, C24 and the other end via a selection transistor Til, T12, T13, T14, T21, T22, T23 and T24 is connected to the read bit line 102,104, 106,108. For example, MTJ Cll through the transistor Tll is connected to the read bit line 102, etc. In order to write data to each of the MRAM cell C11, C12, C13, C14, C21, C22, C23, C24 , it is also combined with segmented word lines kg IUSeg 12, Seg 2USeg 22 for each cell ClU C12, C13, C14, C21, C22, C23, C24 provide the write bit lines 110, 112, and 116. The write bit line 110, 112, and 116 are arranged to be substantially perpendicular to the segmented wordline kg IUSeg 12, Seg 21 and Seg 22.

[0040] 如图5所示的结构允许几个位的并行读取和写入。 [0040] the configuration shown in FIG. 5 allows several bit parallel read and write. 作为示例,下面是将数据写入MRAM单元C23和C24的说明。 As an example, here is the data written to the MRAM cell C23 and C24 instructions. 全局写入字线122和全局字线IM分别连接到写入驱动器电流源和返回终端。 Global write word line 122 IM and the global word line drivers are connected to the write current source and return to the terminal. 为了简化,图5中没有显示写入驱动器电流源和连接。 For simplicity, Figure 5 does not show the write drive current source and connections. 接下来,对段选择130施加电压,以便开启段选择晶体管kg T22。 Next, the segment selector 130 voltage is applied to turn on the segment selector transistor kg T22. 通过磁性字线段kg 22提供写入干扰电流。 Kg 22 segments provide write current through the magnetic interference word. 写入电流还施加到写入位线114和写入位线116。 Write current is also applied to the write bit line 114 and write bit line 116. 电流的极性将确定分别存储在C13 和C14中的对应位的逻辑状态。 The current polarity will determine the logic state stored respectively in C13 and C14 of the corresponding bit.

[0041] 为了读取存储在MRAM单元C23和C24中的数据,全局写入字线122接地,并将读取电流施加到读取位线106和读取位线108。 [0041] In order to read data stored in the MRAM cell C23 and C24 in the global write word line 122 is grounded, and the read current is applied to the read bit line 106 and the read bit line 108. 通过读取字线120上的电压开启位选择晶体管T23和T24,以允许读取电流从读取位线106和108分别通过MTJs C23和CM流到地。 Open position selection transistors T23 and T24 by the voltage on the read word line 120, in order to allow reading current flows from the read bit lines 106 and 108, respectively, through the MTJs C23 and CM. 然后测量读取位线106和108上的电压,以分别确定C23和C24的逻辑内容。 Read bit line 106 is then measured and the voltage 108, respectively, to determine the logical content of C24 and C23.

[0042] 因此,由于磁性写入线段kg IUSeg 12, Seg 21和kg 22使用软磁性材料,结合薄的非磁性导电间隔层,所以磁性写入线段kg IUSeg 12, Seg 21和kg 22强耦合到MTJs C11、C12、C13、C14、C21、C22、C23、C24的自由层。 [0042] Therefore, since the magnetic write line kg IUSeg 12, Seg 21 kg 22 and a soft magnetic material, combined with a thin non-magnetic conductive spacer layer, the magnetic write line kg IUSeg 12, Seg 21 kg 22 and strongly coupled to MTJs C11, C12, C13, C14, C21, C22, C23, C24 of the free layer. 因此,能够使用较低的写入电流。 Therefore, it is possible to use a lower write current. 由于磁性字线已经被分成段kg 11> Seg 12, Seg 21和kg 22,所以能够减轻由于磁性材料的高电阻以及磁性字线段kg IUSeg 12, Seg 21和kg22的小厚度而导致的问题。 Since the magnetic word line has been divided into segments kg 11> Seg 12, Seg 21 and kg 22, it is possible to alleviate the problems due to the high resistance of the magnetic material and a magnetic character line segment kg IUSeg 12, Seg 21 and kg22 small thickness caused. MTJs C11、C12、C13、C14、C21、C22、C23、C24 能并行写入。 MTJs C11, C12, C13, C14, C21, C22, C23, C24 can be written in parallel. 此外,MTJs Cll、C12、C13、C14、C21、 C22、C23、C24 能并行读取。 Furthermore, MTJs Cll, C12, C13, C14, C21, C22, C23, C24 can be read in parallel. 因此,提高了ClU C12、C13、C14、C21、C22、C23、C24 的读取效率。 This improves ClU C12, C13, C14, C21, C22, C23, C24 of the productivity.

[0043] 本发明已经公开了一种用于提供磁性随机存取存储器的方法和系统,该磁性随机存取存储器具有改进的写入余地和更有效的读取。 [0043] The present invention has been disclosed a method and system for providing a magnetic random access memory, the magnetic random access memory having an improved and more effective writing room reading. 尽管本发明是按照所示的实施例说明的,但是本领域普通技术人员将很容易意识到,能够对实施例进行改变,并且这些变化将落入本发明的精神和范围内。 Although the present invention has been described in accordance with the illustrated embodiment, but one of ordinary skill in the art will readily appreciate that the embodiments can be changed, and these changes will fall within the spirit and scope of the invention. 因此,本领域普通技术人员可以进行许多修改,而不背离所附权利要求的精神和范围。 Accordingly, those of ordinary skill can make many modifications without departing from the spirit and scope of the appended claims.

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Classifications
International ClassificationG11C11/15, G11C11/16, G11C11/02
Cooperative ClassificationG11C11/16, G11C11/15
European ClassificationG11C11/15, G11C11/16
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