CN1501503A - 利用垂直纳米管的非易失性存储装置 - Google Patents

利用垂直纳米管的非易失性存储装置 Download PDF

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CN1501503A
CN1501503A CNA200310113815A CN200310113815A CN1501503A CN 1501503 A CN1501503 A CN 1501503A CN A200310113815 A CNA200310113815 A CN A200310113815A CN 200310113815 A CN200310113815 A CN 200310113815A CN 1501503 A CN1501503 A CN 1501503A
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崔原凤
李兆远
姜虎圭
金桢雨
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Samsung Electronics Co Ltd
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Abstract

本发明提供一种利用垂直纳米管的非易失性存储装置。该存储装置包括具有源区的衬底；纳米管阵列，其由垂直生长在所述衬底上的多个纳米管柱状体组成，使得所述纳米管阵列的一端与所述源区连接，由此用作电子传输沟道；存储单元，其围绕所述纳米管阵列的外侧表面形成；控制栅极，其围绕所述存储单元的外侧表面形成；以及漏区，其与所述纳米管阵列的另一端连接。

Description

利用垂直纳米管的非易失性存储装置
技术领域
本发明涉及一种存储装置，更具体地，涉及一种利用碳纳米管(carbonnanotube)作为垂直电子传输沟道的高密的存储装置。
背景技术
使用半导体的存储装置通常包括晶体管，该晶体管在信息写入电容器或从电容器读出时用作形成电流通路的开关；和电容器，该电容器存储和保存电荷。为在所述晶体管中传输大密度的电流，所述晶体管需要具有高互导(gm)特性。因此，具有高互导特性的传统的金属氧化物半导体场效应晶体管(MOSFET)近来已被用作半导体存储装置的开关装置。
传统的MOSFET主要包括由掺杂的多晶硅形成的控制栅区和由掺杂的晶体硅形成的源区和漏区。在相同的电压条件下，所述MOSFET的互导与沟道长度和栅极氧化层的厚度成反比而与表面迁移率、所述栅极氧化层的介电常数和沟道宽度成正比。由于表面迁移率和氧化层的介电常数是根据材料而预先确定的，例如具有取向和氧化硅层的硅晶片，所以高互导可以通过增加沟道宽度与沟道长度的比值或者通过减小氧化层的厚度来实现。
但是，为了制造高密度存储装置，传统MOSFET的物理尺寸需要减小，所以栅极尺寸以及源区和漏区尺寸也需要被减小，这导致各种问题。
例如，当控制栅极尺寸减小时，控制栅极的截面积减小，这在晶体管中引起大的电阻。源区和漏区的减小导致厚度(即结的深度)被减小，因而，引起大的电阻或者由于源区和漏区间的距离的减小使得源区的耗尽层接触到漏区的耗尽层从而唯象地产生穿孔。因此，不可能控制电流。另外，这种存储装置的尺寸减小使得用作电流通路的沟道的宽度被减小到30nm以下，因而，电流的流动受到干扰。结果，所述存储装置操作异常。换言之，传统硅MOSFET的使用在实现高密度存储装置中受到限制。
发明内容
本发明提供一种高密度存储装置，该存储装置通过采用纳米管来防止电阻由于小型化而增加，并降低异常操作的风险。
根据本发明的一个方面，提供一存储装置，其包括：衬底，具有源区；纳米管阵列，其由多个垂直生长在所述衬底上的纳米管柱状体组成，使得所述纳米管阵列的一端与源区接触，由此用作电子传输的沟道；存储单元，其围绕所述纳米管阵列的外侧表面形成；控制栅极，其围绕所述存储单元的外侧表面形成；以及漏区，其与所述纳米管阵列的另一端接触。
优选地，所述衬底由氧化铝、硅或者介孔(mesoporous)材料形成。
优选地，多个纳米管柱状体由碳、氮化硼或磷化镓形成。
优选地，所述存储单元包括围绕所述纳米管阵列的外侧表面形成的第一绝缘层；围绕第一绝缘层的外侧表面形成电子存储层；以及围绕所述电子存储层的外侧表面形成的与控制栅极接触的第二绝缘层。
优选地，第一和第二绝缘层为氧化硅层。
优选地，所述电子存储层为硅层或氮化硅层。
优选地，所述电子存储层具有100nm或更小的厚度，并且所述电子存储层为具有填充有电子存储材料的多个纳米点(nanodot)的多孔层。
优选地，所述电子存储材料为硅或氮化硅。
优选地，所述多孔层为氧化铝层。
优选地，所述纳米点具有100nm或更小的直径。
本发明通过利用纳米管作为电子传输沟道并垂直设置多个纳米管柱状体而提供一种高密度和大电容(capacity)的存储装置。
附图说明
通过参照附图来详细地描述本发明的优选实施例，本发明以上的和其他特征和优点将变得更加显而易见，其中：
图1A是根据本发明第一实施例的存储装置的剖面图；
图1B是根据本发明第一实施例的存储装置的透视图；
图2是根据本发明第二实施例的存储装置的剖面图；
图3是根据本发明第一实施例，为了制造存储装置而生长在衬底上碳纳米管的照片；以及
图4是一曲线图，示出了根据本发明第一实施例的存储装置的电流-电压(I-V)特性。
具体实施方式
在下文中，将参照附图对本发明的优选实施例加以详细地描述。
图1A和图1B分别是根据本发明第一实施例的存储装置的剖面图和透视图。请参照图1A和图1B，衬底11包括源区(S)13。纳米管柱状体10被垂直地定位在衬底11的顶表面上，以被连接到源区13。存储单元19围绕纳米管柱状体10的外侧表面形成。控制栅极(G)17围绕存储单元19的外侧表面形成。漏区(D)15形成在纳米管柱状体10和存储单元19的顶表面上。具有这种结构的多个存储装置可以在衬底11上形成阵列。
优选地，衬底11由氧化铝(Al2O3)、硅(Si)或者介孔材料形成。源区13通过对衬底11掺杂离子来形成。
纳米管柱状体10可以采用例如碳纳米管、氮化硼(BN)纳米管或磷化镓的半导体纳米管形成。纳米管根据电学性质分为金属型纳米管和半导体型纳米管。金属型纳米管不受栅极电压的影响，具有线性的电流-电压特性，而半导体纳米管受栅极电压的影响，具有非线性的电流-电压特性。根据本发明的存储装置采用半导体纳米管，使得流过纳米管柱状体10的电子的流动(即电流)根据施加到控制栅极17的栅极电压加以控制。
这里，用作纳米管柱状体10的碳纳米管采用电弧放电、激光汽化、等离子体增强化学汽相沉积(PECVD)、热化学汽相沉积或者汽相生长被生长在衬底11上，使得每个碳纳米管柱状体10的一端与源区13相连。
围绕纳米管柱状体10的外侧表面形成的存储单元19可以由氧化物-氮化物-氧化物(ONO)层形成，其中氧化层19a和19c用作绝缘层，而氮化层用作电子存储层。所述ONO层可以采用化学汽相沉积(CVD)或者热处理来形成。氮化层19b可以由氮化硅(Si3N4)形成。除了氮化层，也可以采用硅层。优选地，存储单元19的厚度小于200nm，而氮化层19b的厚度为100nm或更小。
控制栅极17围绕存储单元19的外侧表面形成。漏区15形成在纳米管柱状体10的顶表面上，而存储单元19与纳米管柱状体10的另一端连接。
图2是根据本发明第二实施例的存储装置的剖面图。图2所示的存储装置具有与图1A和1B所示的根据第一实施例的存储装置相同的结构，不同之处在于存储单元29包括具有填充有电子存储材料的纳米点28的多孔层29b。参考标记29a和29c分别表示与图1A和图1B所示的氧化层19a和19c具有相同功能的层。
当形成多孔层29b时，电被施加到置于硫酸溶液或磷酸溶液中的铝衬底上，以便对所述铝衬底进行阳极化处理，由此形成多个纳米点28。接着，通过CVD或溅射采用例如硅或氮化硅的电子存储材料填充纳米点28。因而，多孔层29b用作电子存储层。
图3是根据本发明第一实施例，为了制造存储装置而生长在衬底上碳纳米管的照片。
图4是一曲线图，示出了根据本发明第一实施例的存储装置的电流-电压(I-V)特性。请参照图4，漏电流Id保持恒定直到栅极电压从负电压增加到0电压，随后当栅极电压增加到0电压以上时漏电流Id显著减小。换言之，根据本发明第一实施例的存储装置清楚地显示了高密度存储装置的操作特性。
根据本发明，利用纳米管可以实现超高密度存储装置。由于在本发明实施时可以利用自组装(self-assembly)方法在无需使用掺杂工艺的情况下将超过密度存储装置构建在衬底上，因而其制造工艺被简化。
虽然本发明已具体地利用它的优选实施例被示出和加以描述，这些优选实施例应该只从描述的角度加以考量，而非为了限定本发明。例如，具有优异的捕获电子能力的材料可以被用作电子存储层或电子存储材料。因此，本发明的保护范围不是由本发明的详细描述而是由所附权利要求所确定的。

Claims (11)

1.一种存储装置，包括：
衬底，其具有源区；
纳米管阵列，其由垂直生长在所述衬底上的多个纳米管柱状体组成，使得所述纳米管阵列的一端与所述源区连接，由此用作电子传输沟道；
存储单元，其围绕所述纳米管阵列的外侧表面形成；
控制栅极，其围绕所述存储单元的外侧表面形成；以及
漏区，其与所述纳米管阵列的另一端连接。
2.如权利要求1所述的存储装置，其中所述衬底是以选自于由氧化铝、硅和介孔材料构成的组中的一种来形成的。
3.如权利要求1所述的存储装置，其中所述多个纳米管柱状体是以选自于由碳、氮化硼和磷化镓构成的组中的一种来形成的。
4.如权利要求1所述的存储装置，其中所述存储单元包括：
第一绝缘层，其围绕所述纳米管阵列的外侧表面形成；
电子存储层，其围绕第一绝缘层的外侧表面形成；以及
第二绝缘层，其围绕所述电子存储层的外侧表面形成并与所述控制电极连接。
5.如权利要求4所述的存储装置，其中第一和第二绝缘层为氧化硅层。
6.如权利要求4所述的存储装置，其中所述电子存储层为硅层和氮化硅层中的一种。
7.如权利要求4所述的存储装置，其中所述电子存储层具有100nm或更小的厚度。
8.如权利要求4所述的存储装置，其中所述电子存储层为包括多个填充有电子存储材料的纳米点的多孔层。
9.如权利要求8所述的存储装置，其中所述电子存储材料为硅和氮化硅中的一种。
10.如权利要求8所述的存储装置，其中所述多孔层为氧化铝层。
11.如权利要求5至7所述的存储装置，其中所述纳米点具有100nm或更小的直径。
CNB2003101138152A 2002-11-15 2003-11-04 利用垂直纳米管的非易失性存储装置 Expired - Lifetime CN1317768C (zh)

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CN102931237A (zh) * 2012-10-10 2013-02-13 哈尔滨工程大学 垂直非对称环栅mosfet器件的结构及其制造方法
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