CN1351374A - 形成半导体器件的金属线的方法 - Google Patents

形成半导体器件的金属线的方法 Download PDF

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CN1351374A
CN1351374A CN01135597A CN01135597A CN1351374A CN 1351374 A CN1351374 A CN 1351374A CN 01135597 A CN01135597 A CN 01135597A CN 01135597 A CN01135597 A CN 01135597A CN 1351374 A CN1351374 A CN 1351374A
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表成奎
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Hae Ryok SA Semiconductor Co Ltd
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Abstract

本发明公开了一种形成半导体器件的金属线的方法,其中经过化学增强剂和等离子体处理之后,在扩散隔膜层上沉积一层Cu薄膜,凭此提高具有超精细结构的接触孔的掩埋特性。该方法包括以下步骤:在具有预定低级结构的半导体衬底上形成中间绝缘膜层;在所述中间绝缘膜层中形成镶嵌模型;在具有镶嵌模型的整个结构上形成扩散隔膜层;在所述扩散隔膜层上用化学增强剂处理,以在扩散隔膜层上形成化学增强剂薄膜;进行等离子体处理;在整个结构上形成Cu薄膜,以掩埋所述镶嵌模型;和进行抛光处理,以露出中间绝缘膜层的上表面,致使Cu薄膜留在镶嵌模型中。

Description

形成半导体器件的金属线的方法
                      发明背景
发明领域
本发明涉及一种形成半导体器件的金属线的方法，更具体地涉及这样的一种形成半导体器件的金属线的方法，其中经过化学增强剂和等离子体处理之后，于扩散隔膜层(diffusion barrier film)上沉积一层Cu薄膜，凭此提高具有超精细结构的接触孔(contact hole)的掩埋特性。
背景技术
随着高级半导体器件的高性能趋势，接触孔的尺寸已经减小，而其纵横比却迅速增加。在这方面，需要优异的分步敷层(step coverage)，并需要掩埋接触孔。
这类高级半导体器件主要用Cu薄膜作为金属线材料。下面将简要地描述形成Cu薄膜的方法。在预定结构的半导体衬底上形成中间的绝缘膜层。通过单镶嵌法(single damascene process)或双镶嵌法(dual damasceneprocess)，使所述中间绝缘层饰以图案，以形成镶嵌模型(damascene pattern)。在其中形成了镶嵌模型的中间绝缘层上形成扩散隔膜层。作为扩散隔膜层，Ta或TaN是通过物理气相沉积法(PVD)形成的。Cu薄膜是通过电镀法沉积而成的。
但是，电镀法不能在超精细结构的接触孔中沉积Cu薄膜。因此，有关化学气相沉积法(CVD)沉积Cu薄膜的研究正在进行。CVD法仍存在沉积率低和成本高的问题。为了解决这类问题，提出了通过基于化学增强剂如碘的化学强化CVD法(CECVD)来沉积Cu薄膜的方法。
然而，如图1和2所示，在掩埋超精细结构的接触孔中，CECVD法具有不均匀的掩埋特性。换言之，图1示出了具有超精细结构的接触孔的不均匀掩埋特性，其中的Cu薄膜是通过基于化学增强剂的CECVD法处理1-30秒而形成的。图2示出了通过CECVD法沉积Cu薄膜的实例，其中的化学增强剂处理30-100秒。
                        发明概述
因此，本发明涉及一种形成半导体器件的金属线的方法，以基本上排除因现有技术的限制和缺点而导致的一个或多个问题。
本发明的目的是提供一种形成半导体器件的金属线的方法，在该方法中，超精细结构的接触孔可以被均匀地掩埋。
本发明的另一目的是提供一种形成半导体器件的金属线的方法，在该方法中，当通过CECVD法用化学增强剂处理来沉积Cu时，超精细结构的接触孔可均匀地被掩埋。
本发明的其它目的是提供一种形成半导体器件的金属线的方法，在该方法中，Cu薄膜是在化学增强剂如碘处理之后通过等离子体处理来沉积的，凭此均匀地掩埋超精细结构的接触孔。
本发明的另外的优点、目的和特征将部分地阐述于随后的描述中，而且通过审查下列内容这些描述对本领域的普通技术人员来说将是显而易见的，或可以了解本发明的实施。本发明的目的和优点可以象所附 书中所具体指出的那样来理解和实现。
如所具体概括和一般描述的那样，为了实现这些和其它优点并符合本发明的目的，本发明的形成半导体器件金属线的方法包括如下步骤：在具有预定低级结构的半导体衬底上形成中间绝缘膜层；在所述中间绝缘膜层中形成镶嵌模型；在具有镶嵌模型的整个结构上形成扩散隔膜层；在所述扩散隔膜层上用化学增强剂处理，以在扩散隔膜层上形成化学增强剂薄膜；进行等离子体处理；在整个结构上形成Cu薄膜，以掩埋所述镶嵌模型；和进行抛光处理，以露出中间绝缘膜层的上表面，致使Cu薄膜仅保留在镶嵌模型中。
可以理解，不论是前面的概述还是后面的详述均是示例性的和解释性的，其目的均是对要求保护的本发明提供进一步的解释。
                            附图简述
将参照下面的附图详细地描述本发明，在附图中，相同的参考数字是指相同的单元，其中：
图1和2是表示经化学增强剂处理之后通过CECVD法沉积的Cu的断面图；
图3a至3e是解释本发明的形成半导体器件金属线的半导体器件的断面图；
图4a和4b是示出具有超精细结构的接触孔未经过等离子体和经过等离子体处理时的掩埋特性的断面图；和
图5a和5b是示出具有10∶1纵横比的0.16μm接触孔于化学增强剂处理之后再经过等离子体处理时的掩埋特性的断面图。
                   优选实施方案详述
现给出本发明优选实施方案的详细参考，其实例解释于附图中。
图3a至3e为半导体器件的断面图，用来解释本发明的形成半导体器件的金属线的方法。
参照图3a，通过使用低介电率的绝缘薄膜，使中间绝缘层12形成于具有预定结构的半导体衬底11上。通过单镶嵌法或双镶嵌法，使中间绝缘层12中形成模型，以形成镶嵌模型。进行完冲洗过程之后，于其中形成了镶嵌模型的中间绝缘层12之上，形成扩散隔膜层13。当低级结构为钨(W)和铝(Al)结构时，用RF等离子体进行所述冲洗过程。而当低级结构为Cu结构时，则进行反应性的冲洗过程。同时，可以形成TiN、Ta、TaN、WN、TiAlN、TiSiN和TaSiN中的任何一种扩散隔膜层13。TiN膜是通过离子化的PVD法、CVD法和MOCVD法中的任何一种方法形成的。Ta膜和TaN膜是通过离子化的PVD法形成的，而WN膜是通过CVD法形成的。TiAlN膜、TiSiN膜和TaSiN膜是通过PVD法或CVD法形成的。
参考图3b，用化学增强剂如催化剂处理扩散隔膜层13，以形成化学增强剂膜层14。在进行化学增强剂处理之前，可以先形成籽晶层或进行等离子体处理。所述的化学增强剂处理在-20至300℃下进行1秒至10分钟，使用含碘、Hnfacl/2H2O、Hhfac、TMVS的液体化合物，纯碘气体，含碘的气体、蒸气、液体和对应于元素周期律中第7族的元素F、Cl、Br、I和Ar的气体，以及它们的化合物的液体和气体。此时，将薄片(衬底)与喷头之间保持5-50mm的距离。参考图3c，待化学增强剂处理完成之后，进行等离子体处理。作为等离子体处理的实例，有双频等离子体、远距离等离子体和等离子体刻蚀法。双频等离子体通过在-50至300℃下使用0-1000W的高频和0-1000W的低频1秒-10分钟来进行。所述远距离等离子体的基础是反应性处理。所述等离子体刻蚀法允许单频或双频的刻蚀。远距离等离子体或等离子体刻蚀是通过一步或1-10次的多步来进行的，使用H、N、Ar和He中的一种单一气体，或者使用H与Ar的混合气体。这种情况下，需提供1-1000W的功率，并需要进行1秒至10分钟的处理。而且，当使用H、N、Ar和He中的单一气体进行等离子体处理时，每种单一气体的流速范围为5-1000sccm。当使用混合气体进行等离子体处理时，使用5-95％的H和5-95％的Ar。同时，通过一步来进行远距离的等离子体处理或等离子体刻蚀时，一种单一气体可以混有另一种单一气体。
当通过多步来进行远距离的等离子体处理或等离子体刻蚀时，先用单一的Ar或混合气体进行处理，最后用H气体进行处理。这些步骤重复1至10次。
当进行等离子体处理时，所述的薄片保持10-350℃的温度，且腔内的压力保持为0.3-10Torr。
参考图3d，在整个结构上形成Cu薄膜15，以掩埋镶嵌模型。使用Hfac基的前体，如(hfac)Cu(3-己炔)、(hfac)CuMHY、(hfac)CuDMCOD和(hfac)CuVTMOS，以及其它Cu基的前体作为Cu薄膜15。Cu薄膜15是通过基于直接的液体喷射(DLI)的MOCVD法、受控蒸发混合物(CEM)、喷嘴以及所有喷射类型的蒸发器来沉积的。可以用Al或W薄膜代替Cu薄膜。此时，薄片与喷头之间的距离为5-50mm。
图3e是示出通过抛光Cu薄膜15而形成的Cu线，化学增强剂膜层14和扩散隔膜层15的断面图。
形成扩散隔膜层13的过程、处理化学增强剂的过程、等离子体处理和形成Cu薄膜15的过程，均可以在现场内或现场外进行。
图4a和4b是示出具有超精细结构的接触孔在未进行等离子体处理和进行了等离子体处理时的掩埋特性的断面图。通过在100-220℃下使用0-1000W的高频和0-1000W的低频而进行所述等离子体处理1-100秒。
图5a和5b是示出纵横比为10∶1的0.16μm的接触孔在经化学增强剂处理之后再进行等离子体处理时的掩埋特性的断面图。这种情况下，纵横比为8∶1的0.16μm的接触孔可以完全被掩埋。
如前所述，本发明的形成半导体器件金属线的方法具有如下的优点。
由于等离子体处理是在化学增强剂处理之后进行的，因此能够提高具有超精细结构的接触孔的掩埋特性，借此提高器件的可靠性。
前述的实施方案和优点仅是示例性的，并且不应当作是对本发明的限制。本发明的教导可以很容易地应用于其它类型的设备中。本发明的说明书的是解释本发明而不是对本申请权利要求书范围的限制。对于本领域的技术人员而言，对本发明的很多选择、修改和变化均是显而易见的。在权利要求书中，方法加功能(means-plus-function)的项目的目的是覆盖本文中所描述的完成所述功能的结构，该结构不仅包括结构的等效物还包括相同的结构。

Claims (22)

1.一种形成半导体器件的金属线的方法，该方法包括如下步骤：
在具有预定低级结构的半导体衬底上形成中间绝缘膜层；
在所述中间绝缘膜层中形成镶嵌模型；
在具有镶嵌模型的整个结构上形成扩散隔膜层；
在所述扩散隔膜层上用化学增强剂进行处理，以在该扩散隔膜层之上形成化学增强剂膜层；
进行等离子体处理；
在整个结构上形成Cu薄膜，以掩埋镶嵌模型；和
进行抛光处理，以暴露出中间绝缘膜层的上表面，使Cu薄膜仅保留在镶嵌模型中。
2.权利要求1的方法，该方法进一步包括在形成镶嵌模型之后进行冲洗处理的步骤。
3.权利要求2的方法，其中所述冲洗处理在低级结构为W和Al结构时用RF等离子体进行，而在低级结构为Cu结构时则进行反应性的冲洗处理。
4.权利要求1的方法，其中所述扩散隔膜层是通过离子化PVD法、CVD法和MOCVD法中任意一种方法沉积TiN薄膜，通过离子化PVD法或CVD法沉积Ta薄膜，通过CVD法沉积WN薄膜，以及通过PVD法或CVD法沉积TiAlN薄膜、TiSiN薄膜和TaSiN薄膜中的任意一种而形成的。
5.权利要求1的方法，该方法进一步包括在进行化学增强剂处理之前进行等离子体处理的步骤。
6.权利要求1的方法，其中所述化学增强剂处理是用下列增强剂中的任意一种进行的：含碘、Hnfacl/2H2O、Hhfac、TMVS的液体化合物，纯碘气体，含碘的气体、蒸气、对应于第7族的元素F、Cl、Br、I和Ar的液体和气体，以及它们的化合物的液体和气体。
7.权利要求1的方法，其中所述化学增强剂处理进行1秒至10分钟。
8.权利要求1的方法，其中所述化学增强剂处理是在-20至300℃的温度下进行的。
9.权利要求8的方法，其中所述化学增强剂处理是在100至220℃的温度下进行的。
10.权利要求1或5的方法，其中所述的等离子体处理是通过双频等离子体、远距离等离子体或等离子体刻蚀法来进行的。
11.权利要求10的方法，所述双频等离子体处理通过使用0-1000W的高频和0-1000W的低频在-50至300℃的温度下进行1秒至10分钟。
12.权利要求10的方法，其中所述远距离等离子体处理或等离子体刻蚀是用H、N、Ar或He的单一气体或者H与Ar的混合气体进行的。
13.权利要求12的方法，其中所述H、N、Ar或He单一气体的流速为5-1000sccm。
14.权利要求12的方法，其中所述混合气体包括5-95％的H和5-95％的Ar。
15.权利要求10的方法，其中所述远距离等离子体处理或等离子体刻蚀法是通过一步或1-10次的多步完成的。
16.权利要求15的方法，其中所述单一步骤的等离子体处理是用单一气体或混合气体进行的。
17.权利要求15的方法，其中所述多步骤的等离子体处理是通过在Ar单一气体或混合气体处理之后进行H气体处理而进行的，并且重复1-10次。
18.权利要求10的方法，其中所述远距离等离子体处理或等离子体刻蚀法通过使用50-700W的功率进行1秒至10分钟。
19.权利要求10的方法，其中所述远距离等离子体处理或等离子体刻蚀法如此进行，使薄片保持10-350℃的温度，该薄片与喷头之间的距离保持为5-50mm，而且腔内的压力保持为0.3-10Torr。
20.权利要求1的方法，其中所述Cu薄膜是用(hfac)Cu(3-己炔)、(hfac)CuMHY、(hfac)CuDMCOD、(hfac)CuVTMOS、(hfac)CuDMB和(hfac)CuTMVS形成的。
21.权利要求1的方法，其中所述Cu薄膜是通过基于直接的液体喷射(DLI)的MOCVD法、受控蒸发混合物(CEM)、喷嘴以及喷射型的蒸发器来沉积的。
22.权利要求1的方法，其中用形成Al或W薄膜来代替形成Cu薄膜。
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