CN1340215A - 氮化半导体器件及其制造方法 - Google Patents
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Abstract
一种包括GaN基底的氮化半导体器件,在所述GaN基底的表面至少有一个单晶GaN层,在所述GaN基底上有多个氮化半导体器件形成层。与所述GaN基底接触的器件形成层的热胀系数小于GaN的热胀系数,从而使器件形成层受到压应力的作用。结果可防止器件形成层产生裂纹,从而可改善氮化半导体器件的工作寿命。
Description
技术领域
本发明涉及氮化半导体(InxALyGa1-x-yN,0≤x 0≤y,x+y≤1)器件,包括发光二极管(LED)、激光二极管(LD)或其它电子器件和功率器件。更具体地说,本发明提供了一种防止采用GaN基底的氮化半导体器件的氮化半导体层出现裂纹的方法。
背景技术
应用氮化半导体的兰色LED已被提供实际应用。近来,还可提供采用GaN基底的氮化半导体制作的兰色激光二极管。
本发明人在一些场合已介绍过采用GaN基底的氮化半导体激光二极管,例如,在《日本应用物理杂志》37卷(1998)L309-L312页。GaN基底可通过下述方法形成:在蓝宝石基底上形成一层GaN,然后在这层GaN的部分表面覆盖一层二氧化硅保护膜。GaN在GaN膜上可再次生长,蓝宝石基底可以拿开。二次生成的GaN层主要在侧向生长,因此可防止位错出现。采用这种方法可得到低位错率的GaN基底。采用这种低位错GaN基底的氮化半导体激光二极管器件具有连续波振荡功效,其连续工作时间可超过1万小时。
寿命超过1万小时的氮化半导体激光二极管已投入实际应用。但在某些应用场合希望器件有更长的工作寿命。本发明人对采用上述方法制造的氮化半导体激光器件进行了研究,发现在GaN基底生长的氮化半导体层中易产生微细裂纹,特别是在直接由GaN基底生长出的N型GaN接触层中。裂纹相当微细,用通常的光学显微镜难于发现,但可用荧光显微镜对其进行观察。在由相同结构的GaN基底上直接生长出来的GaN层中竟会产生小裂纹,这一事实是出乎人们意料的。这种微细裂纹的出现,被认为是侧生方法制造GaN基底中产生的一种特殊现象。但是,在较厚GaN基底生长出的GaN薄膜中也会产生原因不明的微细裂纹。不论如何,出现微细裂纹总会增加阈值,损害激光器件的寿命。除了激光器件之外,这种裂纹同样会减低其它氮化半导体器件的可靠性。
发明内容
因此,本发明的一个目的是降低在氮化半导体层出现上述裂纹的可能性,延长采用GaN基底的氮化半导体器件的工作寿命,从而提高氮化半导体器件的可靠性。为实现这一目的,本发明氮化半导体器件具有下述特点:在GaN基底上形成的器件形成层(氮化半导体层)之间,为由GaN基底上直接生成的器件形成层提供可减少裂纹出现的压应力。
使器件形成层的热胀系数小于GaN基底的GaN热胀系数即可获得所述压应力。在GaN基底上生长的器件形成层最好为GIaGa1-aN(0<a≤1)。因为GIaGa1-aN(0<a≤1)的热胀系数小于GaN,且可在GaN基底上生长为良好晶体。
由器件形成层构成的器件结构最好包括一个包含AL的N型覆盖层、一个包含InGaN的活化层和一个包含AL的P型覆盖层。采用这种结构及降低裂纹产生结构,可获得具有良好特性的器件。
根据器件的具体结构,在GaN基底生长的器件形成层—例如GIaGa1-aN层—可具有多种功能。例如,该层可作为防止细小裂纹的缓冲层或作为N型接触层。当整个GaN基底导电时,该层可为N型覆盖层。
GaN基底最好采用侧生法制造。采用侧生GaN基底不但可防止裂纹出现,而且可防止位错的蔓延。
本发明氮化半导体器件的制作方法包括以下步骤:
(A)在与氮化半导体不同的辅助材料基底—如蓝宝石或SiC-上生
成第一氮化半导体层;
(B)在所述第一氮化半导体层上形成条形或岛形的间隙凹凸结
构;
(C)在所述第一氮化半导体层上生成单晶GaN层,制作GaN基
底;
(D)在所述GaN基底上形成第二氮化半导体层,所述第二氮化半
导体层的热胀系数小于GaN的热胀系数。
在形成单晶GaN层后,从GaN基底取走辅助基底。
按本发明,与GaN基底接触的氮化半导体层的热胀系数小于GaN的热胀系数,从而可在氮化半导体层产生压应力。这个压应力可防止在氮化半导体层产生微细裂纹,其理由如下:若SiC,GaN和蓝宝石的热胀系数分别为ε1,ε2和ε3,且ε1<ε2<ε3,当GaN在SiC基底上生长时,在GaN层中易产生裂纹,因为此时的热胀系数关系为ε1<ε2,在SiC基底上生长的GaN层晶面存在张应力;另一方面,如果GaN层是生长在蓝宝石基底上,则GaN层不易产生裂纹,因为此时的热胀系数关系为ε2<ε3,在蓝宝石基底上生长的GaN层晶面上存在压应力。简言之,是否容易出现裂纹取决于存在的应力是张应力还是压应力。当在基底上生长的生长层热胀系数小于基底的热胀系数时存在压应力,此时可防止裂纹的产生。
当GaN生长在GaN基底上时,对生长的GaN层而言既不存在张应力又不存在压应力,在生长的GaN层中易产生裂纹。总而言之,当氮化半导体层在GaN基底上形成时,如果生成层的热胀系数等于或大于GaN的热胀系数,则氮化半导体层易出现裂纹;如果生成层的热胀系数小于GaN的热胀系数,则因存在压应力而是裂纹的出现受到抑制。
在本说明中,“GaN基底”是指表面具有低位错单晶GaN层的基底。GaN基底可以仅由单晶GaN层构成,也可包括一个由蓝宝石或碳化硅等不同氮化半导体材料制成的辅助基底,在该基底上形成低位错单晶GaN层。
GaN基底可采用任何适当的方法进行制造,只要其形成的单晶GaN具有足够小的位错,适合用于制造所需的电器件。但最好采用侧生法来制造单晶GaN层,因为这种方法可抑制位错在单晶GaN层的蔓延,从而可得到低位错GaN基底。“侧生法”包括可使单晶GaN层不但在垂直方向而且可沿基底表面平行方向生长以抑制垂直向位错的任何制造方法。
采用侧生法制造GaN基底,可选用ELOG生长法。这种方法在美国专利USP09/202,141,日本专利H11-312825,H11340508,H11-37827,H11-37826,H11-168079,H11-218122以及日本应用物理杂志(J.JAP)中均有介绍,在J.J.A.P中介绍的是用二氧化硅侧生GaN。
按上述各种ELOG生长法获得的GaN可作为低位错基底,采用这种基底对使用寿命等器件性能来说是很好的。在本发明中即采用了这种方法获得的基底,结果可具有更长的寿命。
在上述各种方法中,日本专利N0.H11-37827中所述的方法更为适用。GaN或ALGaN等氮化半导体层在蓝宝石等异种基底上生长,条形或岛形的间隙凹凸结构的形成可使单晶GaN层侧向生长。之后,生长的单晶GaN覆盖所述凹凸结构。通过采用这种方法,单晶GaN层可侧向生长,使得位错的蔓延受到抑制,从而得到低位错GaN基底。如果要求GaN基底仅由氮化半导体组成,单晶GaN层就要生长得厚些,然后可去掉辅助基底。
在侧生单晶GaN层上生长热胀系数小于GaN热胀系数的氮化半导体层,可防止在氮化半导体层中产生位错和裂纹,从而可改善氮化半导体器件的可靠性。本发明采用侧生GaN基底的具体实例将在以下的实施例中进行详细说明。
在上述制造方法中,在ELOG生长后去掉辅助基底以获得仅由氮化半导体组成的GaN基底。然而,在ELOG生长后也可留下辅助基底,在这种情况下,用做GaN基底的基底由辅助基底和氮化半导体层构成。
当采用仅由氮化半导体构成的GaN基底时,在与器件结构形成面对立的后表面上形成N电极。这样可减小芯片尺寸。而且,当GaN基底仅由氮化半导体构成时,还可获得良好的热辐射特性。此外,通过劈理也可易于形成共振面。从提高器件的性能来说,器件结构最好形成在与取走辅助基底对置的表面上。
另一方面,当采用由异质基底和氮化半导体组成的GaN基底时,可防止晶片的断裂和出现碎屑,从而易于处理。此外还可避免去掉辅助基底的步骤,从而可减少制造时间。即使在采用包含异质基底的GaN基底的情况下,如果所述基底导电,即可在基底的背面形成N电极。
在GaN基底上形成具有较小热胀系数的氮化半导体前,对GaN基底表面可进行刻蚀。由于在制造过程中GaN基底表面可能不平,因此最好通过刻蚀使GaN基底表面平滑后再形成氮化半导体。此处理可进一步抑制裂纹的出现。
附图描述
图1为说明GaN基底制造过程的剖视图。
图2为说明图1之后GaN基底制造过程的剖视图。
图3为说明图2之后GaN基底制造过程的剖视图。
图4为说明图3之后GaN基底制造过程的剖视图。
图5为按本发明实施例的氮化半导体激光器件的剖视图。
图6A-6F为说明陇条形成过程的部分剖视图。
具体实施方式
图5为本发明实施例中氮化半导体器件的剖视图。在GaN基底30上的器件成型层1-10构成一个半导体激光器件。与GaN基底30接触的器件成型层1具有小于GaN的热胀系数,从而使其受到压应力,抑制在器件形成层1中产生裂纹。
按本发明,热胀系数小于GaN热胀系数的任何氮化半导体均可用于作为在GaN基底上生长的氮化半导体层材料。然而,所采用的氮化半导体材料最好不包含有损晶体化的成分。例如,ALaGa1-aN(0<a≤1)即是适用材料。若其参数值为0<a<0.3则更好,若其值为0<a<0.1则最好。采用这种组成的氮化半导体可防止裂纹的出现,可获得良好晶体。
在具有较小热胀系数的氮化半导体在GaN基底上形成之前,对GaN基底表面可进行刻蚀,因为根据GaN基底的制造过程,GaN的表面有可能不平,因此从防止微细裂纹的出现起见,最好通过刻蚀使GaN基底表面平滑后再生成具有较小热胀系数的氮化半导体层。
直接在GaN基底生长的氮化半导体层的厚度不一定局限于某个特定值。但其厚度最好不小于1微米,若厚度在3-10微米则更好,这样的厚度有助于防止出现裂纹。
直接在GaN基底上生长的器件形成层可以在器件中起到各种功能,其具体功能取决于器件结构。按其功能,器件形成层1的厚度被适当控制在上述范围。在图5所示氮化半导体器件中,器件形成层1与器件形成层2一起起着N型接触层的作用,其上形成有N型电极21。在它们上边形成的包含AL的N型覆盖层4、包含InGaN的激化层6和P型覆盖层9构成了一个半导体激光器件。
如果GaN基底30为导电基底,例如是一个仅由单晶GaN层或在碳化硅上形成的单晶GaN层构成的基底,N电极可在GaN基底的后表面上形成。在这种情况下,与GaN基底接触的器件形成层1作为封闭光线的覆盖层。
当在GaN基底生成器件形成层1时,器件形成层1掺入杂质。掺入的杂质可以是N型或P型。掺杂量根据氮化半导体层的功能为接触层或覆盖层进行控制。
在图5所示氮化半导体器件中,未掺入N型ALaGa1-aN的器件形成层1作为接触层1,其上形成N型ALaGa1-aN接触层2。在未掺杂N型ALaGa1-aN上生成N型ALaGa1-aN基础层2,有助于防止裂纹出现和提高晶体质量。在这种情况下,未掺杂ALaGa1-aN层1还起到缓冲等作用。未掺杂N型ALaGa1-aN层的最佳厚度约为几个微米。
在N电极21直接形成在器件形成层1上的情况下,掺入N型杂质(一般为Si)的氮化半导体层在GaN基底30上生长,作为器件形成层1。掺入杂质的数量最好控制在1*1018/cm3到5*1018/cm3。仅作为N型接触层的器件形成层1的厚度最好为1-10微米。厚度控制在上述范围有助于防止微细裂纹,可使氮化半导体层起到N型接触层的作用。
所述GaN基底可以是仅由氮化半导体组成的基底,也可以是包含辅助基底和氮化半导体层的基底。GaN基底最好采用侧生法制造。采用侧生法制造的GaN基底可抑制器件形成层1-10产生位错,可改善期间特性。
例如,GaN基底30可按下述方法进行制造。首先,在用与氮化半导体不同的材料制成的辅助基底上形成GaN或ALGaN等氮化半导体层。所述辅助基底可用蓝宝石、碳化硅或尖晶石等材料制作。如图2所示,间隙条形或岛形凹凸结构形成在氮化半导体层12的表面,其后生成的单晶GaN层在水平方向生长。所形成的条形或岛形凹凸结构使半导体层12如图2所示。或者,形成的条形过岛形凹凸结构贯穿氮化半导体层12并可去掉辅助基底11。形成可去掉辅助基底11的较深凹凸结构,可在由凸出部分侧生的单晶GaN相会之处抑制晶体产生畸变。再一个选择,是使氮化半导体层12具有GaN和ALGaN双层结构,使形成凹凸结构的深度达到可去掉部分ALGaN。其次,如图3和图4所示,单晶GaN13的生长超过氮化半导体层12的凹凸结构。在这种情况下,可获得包含辅助基底和氮化半导体层的GaN基底。如果要求获得仅由氮化半导体构成的GaN基底,可通过HVPE等方法使单晶GaN层生长到一定厚度,使得可去掉蓝宝石等材料制成的辅助基底11。
当辅助基底11留在GaN基底30之中时,GaN基底的氮化半导体部分的厚度适宜控制到不大于100微米,其厚度小于50微米更好,小于20微米最好。厚度的低限可以更小,只要按ELOG法生长的GaN可使保护膜或不平整度达到降低位错的要求。例如,低限厚度不能小于几个微米。当厚度处在上述范围之内时,不但位错可得到降低,而且因氮化半导体与辅助基底热胀系数不同而可能产生的晶片翘曲也可得到抑制,从而使器件结构在GaN基底上生长良好。
当辅助基底11由GaN基底30中去掉时,本发明仅由氮化半导体组成的GaN基底厚度不局限于某个特定值,但适宜的厚度范围为50-500微米,厚度在100-300微米为最佳。当GaN基底厚度处于上述范围之内时,位错减少,并可保持适当的机械强度。
为提高基底中单晶GaN的晶体性能,可采用下述的另外一种制造方法。首先,与上述方法相同,在辅助基底11生长的氮化半导体层12中形成凹凸结构,在其上边通过HVPE法形成较厚的单晶GaN层13(单晶GaN的第一次生长)。然后,在单晶GaN层13上形成用二氧化硅等材料制造的间隙条形或岛形掩膜,应用CVD法使单晶GaN层通过掩膜侧生(单晶GaN的二次生长)。如果必须去掉辅助基底11,去掉过程最好在单晶GaN13的第一次生长后进行。在单晶GaN二次生长前,最好通过刻蚀使一次生长的单晶GaN表面平滑。
通过形成凹凸结构的单晶GaN一次生长和按HVPE法的GaN生长,可很容易地得到较厚的单晶GaN层。然而,这种单晶GaN层在凹陷结构附近易出现孔隙,晶体特性较差。采用二氧化硅掩膜和应用MOCVD法,可使二次生长的单晶GaN层具有较好的晶体特性。
当由GaN基底30去掉辅助基底11时,GaN基底表面可能产生轻微翘曲。这表明去掉辅助基底的GaN层表面在物理性质上与GaN层生长面有所不同。表面物理性质不同有可能引起裂纹的产生。在任何情况下,在GaN基底上生长具有较小热胀系数的半导体层—例如ALaGa1-aN时,可防止裂纹的出现和得到具有良好晶体特性的半导体器件。
按本发明,使与GaN基底接触的器件形成层受到压应力可抑制微细裂纹的出现。对任何种类的器件来说,都可具有这一优点。特别对于包括包含AL的N型覆盖层、包含IN GaN的活化层和包含AL的N性覆盖层的发光器件而言,上述结构安排和防止裂纹出现的特点可得到具有良好特性的器件。对于制造器件形成层而言,可采用已知的各种生长氮化半导体方法,如MOVPE(有机金属-蒸汽-相外延)、MOCVD(有机金属-化学蒸汽沉积)、HVPE(卤素蒸汽-相外延)、MBE(分子束外延)等。
以下将叙述本发明的实施例,但本发明并不仅仅局限于这些实施例。
实施例1:
在实施例1中,将叙述图5所示氮化半导体激光器件的制造过程。(GaN基底制造方法)
GaN基底按图1-4所示步骤制造。
直径为2英寸的蓝宝石基底11具有用C表示的主面和用A表示的定向平面,将其置入反应器中,并将温度调节到510℃。采用阿摩尼亚和TMG(trimethylgallium)作为GaN的源并用氢为载气,使GaN组成的厚度为200埃的缓冲层(未画出)在蓝宝石基底上生长。
在缓冲层生长之后,仅停止供给TMG并将温度增加到1050℃。在温度为1050℃的条件下,采用阿摩尼亚和TMG作为GaN的源,使由未掺杂GaN组成的第一氮化半导体层12生长到厚度为2微米(图1)。
在第一氮化半导体层12生长之后,形成具有条纹的光掩膜。采用溅射装置形成具有一定模式的二氧化硅膜,使其凸起部分上部条宽为5微米、凹入部分底部条距为15微米。再用RIE装置对第一氮化半导体层12未用二氧化硅膜掩盖的部分进行刻蚀,刻蚀深度适当控制,勿使半导体层被刻透,从而使其形成凹凸结构,如图2所示。在图2所示凹凸结构形成之后,去掉凸起部分上部的二氧化硅。这样,便形成了与定向面垂直的条陇结构。
其次,将晶片放入反应器中,温度为1050℃,采用阿摩尼亚和TMG为GaN的源,使由未掺杂GaN组成的第二氮化半导体层13生长到厚度约为320微米(图3和图4)。
在第二氮化半导体层生长之后,晶片移出反应器,得到由未掺杂GaN组成的GaN基底30。由得到的GaN基底30去掉蓝宝石基底,以下说明的器件结构将在与去掉面对置的生长面生长,如图5所示。由GaN构成的基底厚度约为300微米。(本发明未掺杂N型接触层1:ALaGa1-aN)
采用TMA(trimethylalminium)、TMG和阿摩尼亚作为源气,在1050℃条件下,使由未掺杂AL0.05Ga0.95N构成的未掺杂N型接触层1在GaN基底30上生长到厚度1微米。(本发明N型接触层2:ALaGa1-aN)
其次,在相同温度下,采用TMA、TMG和阿摩尼亚为源气,用硅烷(SIH4)为掺杂气,使由AL0.05Ga0.95N构成并掺杂Si到3*1018/cm3的N型接触层2生长到厚度3微米。
现在,在上述N性接触层(包括N型接触层1)中没有小裂纹,从而有效防止了微细裂纹的出现。如果在GaN基底中存在小裂纹,通过N型氮化半导体层2的生长也可防止这种裂纹的蔓延,从而可得到具有良好晶体特性的器件结构。与仅形成N型接触层2的情况比较起来,如上所述既形成N型接触层2又形成未掺杂N型接触层1,可使晶体特性得到很好的改善。(裂纹防止层3)
其次,将温度降至800℃。采用TMG、TMI(trimethylidium)和阿摩尼亚作为源气,用硅烷作为掺杂气,使由In0.08Ga0.92N构成并掺杂Si到5*1018/cm3的裂纹防止层3生长到0.15微米。(N型覆盖层4)
其次,在1050℃温度下,采用TMA、TMG和阿摩尼亚作为源气,使由未掺杂AL0.14Ga0.86N构成的覆盖层4生长到25埃。然后停止供给TMA,使用硅烷作为掺杂气,使由GaN构成并掺杂Si到5*1018/cm3的B层生长到厚度25埃。这些操作重复160次,使A层和B层互相重叠以形成多重膜叠压的N型覆盖层4(超点阵结构),总厚度为8000埃。(N型波导层5)
其次,在相同温度下,采用TMG和阿摩尼亚作为源气,使由未掺杂GaN构成的N型波导层5生长到0.075微米。(活化层6)
其次,在800℃温度下,采用TMI、TMG和阿摩尼亚作为源气,用硅烷作为掺杂气,使由In0.01Ga0.99N构成并掺杂Si到5*1018/cm3的势垒层生长到厚度为100埃。然后停止供给硅烷气,使由未掺杂In0.01Ga0.99N构成的势阱层生长到厚度50埃。这些操作重复3次使势垒层互相重叠,最后形成多量子阱(MQW)结构的活化层6,总厚度为550埃。(P型电子约束层7)
其次,在相同温度下,采用TMA、TMG和阿摩尼亚作为源气,用Cp2Mg(cyclopentadienylmagnesium)作为掺杂气,使AL0.4Ga0.6N构成并掺杂Mg到1*1019/cm3的P型电子约束层7生长到厚度100埃。(P型波导层8)
其次,在1050℃温度下,采用TMG和阿摩尼亚作为源气,使由未掺杂GaN构成的P型波导层8生长到厚度0.075微米。
这一P型波导层8是未掺杂的,但由于Mg由P型电子约束层7的扩散可使Mg的浓度达到5*1016/cm3,结果使其表现出P型导电性。(P型覆盖层9)
其次,在相同温度下,采用TMA、TMG和阿摩尼亚作为源气,使由未掺杂AL0.1Ga0.9N构成的一层生长到25埃。然后停止供给TMA,使用Cp2Mg作为掺杂气,使由GaN构成并掺杂Mg到5*1018/cm3的B层生长到厚度25埃。这些操作重复100次,使A层和B层互相重叠以形成多重膜叠压的P型覆盖层9(超点阵结构),总厚度为5000埃。(P型接触层10)
其次,在相同温度下,采用TMG和阿摩尼亚作为源气,用CP2Mg作为掺杂气,使由GaN构成并掺杂Mg到1*1020/cm3的P型接触层10生长到厚度150埃。
在反应完成后,晶片在反应器700℃氮气气氛中退火,以减少P型层的电阻性。
退火后,将晶片移出反应器。在最上层的P侧接触层顶面形成一个二氧化硅保护膜,采用RIE(活性离子刻蚀)装置和SiCI4进行刻蚀,以曝露出N电极在其上面形成的N侧接触层2的表面,如图5所示。
其次,如图6A所示,在最上面的P侧接触层10的几乎全部表面上,采用PVD设备形成由硅的氧化物(主要为二氧化硅)构成的第一保护膜61,其厚度为0.5微米。然后,将有预定形状的掩膜放置在第一保护膜61上,形成由抗光材料制成的第三保护膜63,其条宽为1.8微米,厚度为1微米。
其次,如图6B所示,在第三保护膜63形成之后,用第三保护膜作为掩膜,采用CF4气体对所述第一保护膜进行刻蚀使其形成条形结构。在用刻蚀剂进行处理时,只有抗光部分被腐蚀,使第一保护膜61在P型接触层10形成条宽为1.8微米,如图6C所示。
在第一保护膜61形成条形结构之后,如图6D所示,使用RIE设备和SiCI4气体对P侧接触层10和P侧覆盖层9进行刻蚀,使其形成条宽为1.8微米的条形结构。
在条形结构形成之后,将晶片置入PVD设备中,如图6E所示,在因刻蚀而曝露的P侧覆盖层9上的第一保护膜61上形成由Zr的氧化物(主要为ZrO2)构成的第二保护膜62,其厚度为0.5微米。当如此形成Zr的氧化物膜时,可建立P-N面之间的绝缘和形成横模。
其次,将晶片浸在氢氟酸中,如图6F所示,用去除法去掉第一保护膜61。
其次,如图5所示,在由所述P侧接触层去掉第一保护膜61后而曝露的P侧接触层10的表面形成由Ni/Au构成的P电极20。P电极条宽为100微米,且如图所示凸出超过第二保护膜。
在形成第二保护膜62之后,如图5所示,形成由Ti/AL构成的与N侧接触层上条形结构平行的N电极21。
在其上按上述方式形成N电极和P电极的晶片GaN基底被抛光到厚度约为100微米。此后,晶片沿与基底条形电极垂直的方向被切割成一些小的条形结构并在切割面(11-00面,相当于具有六晶面结构晶体的侧面=M面)形成谐振器。由SiO2和TiO2构成的多层介电膜形成在谐振器的刻面上,对小的条形结构按与P电极平行的方向进行切割,最后形成如图5所示的激光器件。谐振器的长度最好控制在300-500微米的范围之内。
将得到的激光器件置入热潭并将各电极用导线连接起来。激光振荡试验在室温下进行。
波长500nm的连续振荡试验在室温下采用2.5kA/cm2阈电流强度和5V阈电压进行。在室温下,工作寿命为1万小时或更长。
实施例2
采用与实施例1相同的方式制造激光器件,只是不再使未掺杂N型接触层1生长,只生长N型接触层2。
所获得的器件在晶体特性上要比实施例1中的器件稍差,但基本可像实施例1那样防止裂纹的产生,得到性能良好的器件。
实施例3
采用与实施例1相同的方式制造激光器件,只是未掺杂N型接触层1和掺Si的N型接触层2中的AL的含量比率由0.05变为0.02。
所得到的器件表现出基本与实施例1相同的良好性能。
实施例4
采用与实施例1相同的方式制造激光器件,只是未掺杂N型接触层1和掺Si的N型接触层2中的AL的含量比率由0.05变为0.5。
所获得的器件在晶体特性上要比实施例1中的器件稍差,因为AL的含量大于实施例1。但基本可像实施例1那样防止裂纹的产生,得到性能良好的器件。
实施例5
采用与实施例1相同的方式制造激光器件,只是未掺杂N型接触层1和掺Si的N型接触层2由ALN构成。
所获得的器件在晶体特性上要比实施例1中的器件稍差,因为N型接触层1和N型接触层2中的AL含量大于实施例1,但基本可像实施例1那样防止裂纹的产生,得到像实施例1那样长寿命的器件。
实施例6
采用与实施例1相同的方式制造激光器件,只是第二氮化半导体层13的厚度为15微米,并且不去掉蓝宝石基底。所获得的GaN基底包括辅助基底和氮化半导体。
与实施例1比较起来,所获得的激光器件晶片稍大,但基本可像实施例1那样防止裂纹的产生。由于实施例6中的激光器件具有绝缘性蓝宝石基底,器件的热辐射性能较实施例1稍差。但也可得到如实施例1那样长的器件寿命。
以上,参阅附图描述了本发明的最佳实施例,但熟悉本门技术的人们都很清楚,对其进行增减和修改是可能的。应当了解,本发明的权利要求将所有这些增减和修改包括在本发明的要义和范围内。
Claims (8)
1.一种包括GaN基底的氮化半导体器件:
在所述GaN基底的表面至少有一个单晶GaN层,在所述GaN基底上形成多个氮化半导体器件形成层;
与所述GaN基底接触的所述器件形成层受到压应力的作用。
2.如权利要求1所述氮化半导体器件,其中所述与GaN基底接触的器件形成层的热胀系数小于GaN的热胀系数。
3.如权利要求1所述氮化半导体器件,其中所述与GaN基底接触的器件形成层由
ALaGa1-aN(0<a≤1)构成。
4.如权利要求3所述氮化半导体器件,其中所述器件形成层包括包含AL的N型覆盖层、包含InGaN的活化层和包含AL的P型覆盖层。
5.如权利要求4所述氮化半导体器件,其中所述由ALaGa1-aN构成的器件形成层起N型接触层的作用。
6.如权利要求1所述氮化半导体器件,其中所述单晶GaN层通过侧生法形成。
7.一种具有GaN基底的氮化半导体器件的制造方法,其中在所述GaN基底的表面至少有一个单晶GaN层,在所述GaN基底上形成多个氮化半导体器件形成层,所述制造方法包括以下步骤:
在由与氮化半导体不同的材料制成的辅助基底上形成第一氮化半导体层;
在所述第一氮化半导体层上形成条形或岛形间隙凹凸结构;
形成一个单晶GaN层以制作GaN基底;
在所述GaN基底上形成热胀系数小于GaN热胀系数的第二氮化半导体层。
8.如权利要求7所述氮化半导体器件制造方法,其中所述辅助基底在形成为制造GaN基底所需的所述单晶GaN层后被去掉。
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- 2000-02-08 KR KR1020017009965A patent/KR100634340B1/ko active IP Right Grant
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- 2000-02-08 CN CNB008035571A patent/CN1157804C/zh not_active Expired - Fee Related
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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US7485902B2 (en) | 2002-09-18 | 2009-02-03 | Sanyo Electric Co., Ltd. | Nitride-based semiconductor light-emitting device |
CN100440542C (zh) * | 2003-05-15 | 2008-12-03 | 松下电器产业株式会社 | 半导体装置 |
CN100461468C (zh) * | 2003-08-08 | 2009-02-11 | 住友电气工业株式会社 | 发光半导体器件及其制造方法 |
TWI586060B (zh) * | 2011-06-15 | 2017-06-01 | 歐斯朗奧托半導體股份有限公司 | 光電半導體本體及光電元件 |
CN110783176A (zh) * | 2019-10-30 | 2020-02-11 | 广西大学 | 一种低应力半导体材料制备方法 |
Also Published As
Publication number | Publication date |
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US6835956B1 (en) | 2004-12-28 |
JP3770014B2 (ja) | 2006-04-26 |
EP1184913A4 (en) | 2007-07-04 |
JP2000299497A (ja) | 2000-10-24 |
AU2327200A (en) | 2000-08-29 |
EP1184913A1 (en) | 2002-03-06 |
KR100634340B1 (ko) | 2006-10-17 |
EP1184913B1 (en) | 2018-10-10 |
CN1157804C (zh) | 2004-07-14 |
TW443018B (en) | 2001-06-23 |
KR20010110430A (ko) | 2001-12-13 |
AU771942B2 (en) | 2004-04-08 |
US20050054132A1 (en) | 2005-03-10 |
WO2000048254A1 (fr) | 2000-08-17 |
US7083996B2 (en) | 2006-08-01 |
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