CN1333449C - Semiconductor package piece - Google Patents

Semiconductor package piece Download PDF

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Publication number
CN1333449C
CN1333449C CNB200310113271XA CN200310113271A CN1333449C CN 1333449 C CN1333449 C CN 1333449C CN B200310113271X A CNB200310113271X A CN B200310113271XA CN 200310113271 A CN200310113271 A CN 200310113271A CN 1333449 C CN1333449 C CN 1333449C
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CN
China
Prior art keywords
substrates
substrate
shell body
chip
semiconductor package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB200310113271XA
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Chinese (zh)
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CN1617315A (en
Inventor
江政嘉
黄致明
张锦煌
萧承旭
蔡敏南
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Siliconware Precision Industries Co Ltd
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Siliconware Precision Industries Co Ltd
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Publication date
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Priority to CNB200310113271XA priority Critical patent/CN1333449C/en
Publication of CN1617315A publication Critical patent/CN1617315A/en
Application granted granted Critical
Publication of CN1333449C publication Critical patent/CN1333449C/en
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Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires

Abstract

The present invention relates to a semiconductor encapsulation member which comprises two substrates, at least two semiconductor chips, two encapsulation colloids and an outer shell body, the two semiconductor chips are respectively arranged on an arrangement region for a chip of the substrates and are electrically connected with electrical connection pads on the substrates; the two encapsulation colloids are respectively formed on the two substrates in order to coat the two semiconductor chips in order to form two encapsulation units; the outer shell body respectively accommodate the two encapsulation units; long sides of the two substrates are perpendicular to the long side of the outer shell body, and the electrical connection pads of the two substrates are respectively exposed out of the same outer surface or two opposite outer surfaces of the outer shell body. Thus, the chip capacitance and the operation function of the semiconductor encapsulation member can be increased, and the material cost of the substrates is saved.

Description

Semiconductor package part
Technical field
The invention relates to a kind of semiconductor package part, particularly about a kind of card-typed circuit module that is used to encapsulate storage chip, for example multimedia card (Multi-Media Card, MMC).
Background technology
Multimedia card (Multi-Media Card, MMC) be meant a kind of flash memory circuit module of high power capacity, this circuit module can be coupled to electronic information platform, for example PC, personal digital assistant (Personal Digital Assistant, PDA), digital camera, multimedia browser, can store various digital multimedia datas, for example digital photo data, video signal data or voice data.At present, the specification of multimedia card meets multimedia card alliance (Multimediacard Association, MMCA) standard of being formulated basically.
Multimedia card (Multi-Media Card, MMC) packaging part is a kind of Small Scale Integration (Integrated Circuit), have storage chip (Memory Chip) and/or control chip (Controller Chip), to store and to handle multimedia messagess such as relevant digital picture and image.Wherein, this storage chip and/or control chip carry and are connected to chip carrier (Chip Carrier), on substrate (Substrate) or lead frame (Lead frame), make chip be electrically connected to external device so that operation and performance chip functions.Existing structure can be referring to United States Patent (USP) the 5th, 677, No. 524 " CHIPCARD AND A METHOD FOR PRODUCING IT ", United States Patent (USP) the 6th, 040, No. 622 " SEMICONDUCTOR PACKAGE USING TERMINALS FORMEDON A CONDUCTIVE LAYER OF A CIRCUIT BOARD ", and Japan Patent 62-239554 number " IC CARD TYPEEP-ROM STRUTURE ".
Figure 1A to Fig. 1 C is a kind of manufacturing process of existing multimedia card.This processing procedure is to be used for making the multimedia card that length is of a size of 32 * 24 * 1.4mm of standard.
At first see also Figure 1A, the initial step of this existing processing procedure is that prefabricated a series of substrates 10 mark off at least one chip placing district 11 and a plurality of passive components settlement 12 in advance on each substrate 10, and a plurality of electric connection pads 13 are set; These electric connection pads 13 are from the straight-through back side, the front of substrate 10, as the external electric connection point of the multimedia card of finishing at last.Because this processing procedure is to be used for making the multimedia card that length is of a size of 32 * 24 * 1.4mm of standard, so the length and width size of aforesaid substrate 10 is to cooperate this standard size to be designed to 30.25 * 21.25mm.
As Figure 1B, bonding resistor, capacitor or inductor 30 on this passive component settlement 12 then, are settled chip program, settle at least one semiconductor chip 20 in the chip placing district 11 on the substrate 10; Adopt for example bonding wire (Wire Bond) technology again, apply one group of for example bonding wire 40 of gold thread, chip 20 is electrically coupled to electric connection pad 13 on the substrate 10; Then carry out the packing colloid processing procedure, on substrate 10, form a packing colloid 50, coat chip 20 and the bonding wire 40 settled on the substrate 10.
For another example shown in Fig. 1 C, on substrate 10, cover a shell body 60 that is coated with adhesive-layer 51, with whole base plate 10 and on packing colloid 50 embed and adhere in these shell body 60 formed spatial accommodations 61, promptly finish the processing procedure of multimedia card.Fig. 1 D is the face upwarding assumption diagram after display base plate 10 is embedded in shell body 60.
Because above-mentioned processing procedure is to be used to make the multimedia card that length and width is of a size of 32 * 24mm, therefore the length and width size of above-mentioned shell body 60 is 32 * 24mm, and the length and width size of spatial accommodation 61 wherein cooperates the length and width of substrate 10 to be of a size of 30.25 * 21.25mm.
The shortcoming of above-mentioned processing procedure is that substrate 10 length and width that adopted are oversize, far surpass the length and width size of chip 20, so cost of manufacture is very high, and the monolithic cost does not meet the cost economic benefit up to NT$20.0, has limited its commercialization yet; In addition, the shell body 60 of existing specification, for example accommodation space shown in Fig. 1 C 61, also form the waste on the chip configuration space, do not meet the semiconductor development trend of current integrated (Integration), significantly reduced the operation usefulness of multimedia card, have much room for improvement.
Summary of the invention
For overcoming the shortcoming of above-mentioned prior art, main purpose of the present invention is to provide a kind of semiconductor package part of for example multimedia card, by the length and width size of change substrate and the location positioning in shell body thereof, increase the memory capacity and the operation function of this multimedia card.
Another purpose of the present invention is promptly at the semiconductor package part that a kind of for example multimedia card is provided, with the quantity of the built-in chip that increases this multimedia card.
A further object of the present invention is promptly at the semiconductor package part that a kind of for example multimedia card is provided, to reduce substrate production cost.
Semiconductor package part of the present invention comprises: two substrates, and each substrate comprises a chip placing district and a plurality of electric connection pad that is arranged on this substrate; At least two semiconductor chips, this semiconductor chip are placed in respectively in the chip placing district of this substrate, and electrically connect with the electric connection pad of this substrate; Two packing colloids are formed at respectively on these two substrates, and coat this semiconductor chip respectively, to form two encapsulation units; And a shell body, this shell body is contained in these two encapsulation units in it; Wherein, the long limit of these two substrates is all perpendicular to the long limit of this shell body, and the electric connection pad of these two substrates exposes outside the same outer surface of this shell body respectively and is the diagonal angle setting.
Semiconductor package part of the present invention also can comprise: two substrates, and each substrate comprises a chip placing district and a plurality of electric connection pad that is arranged on this substrate; At least two semiconductor chips, this semiconductor chip are placed in respectively in the chip placing district of this substrate, and electrically connect with the electric connection pad of this substrate; Two packing colloids are formed at respectively on these two substrates, and coat this semiconductor chip respectively, to form two encapsulation units; And a shell body, this shell body is contained in these two encapsulation units in it; Wherein, the long limit of these two substrates is all perpendicular to the long limit of this shell body, and the electric connection pad of these two substrates exposes outside two opposing outer face up and down of this shell body respectively and is and is symmetrical arranged.
The characteristics of semiconductor package part of the present invention are to adopt array substrate matrix, to make a plurality of packaging parts in batch, again in the encapsulation unit embedding shell body of specification with maximum quantity according to shell body.Compared with prior art, because card-typed circuit module of the present invention can adopt the littler substrate of length and width size, the substrate of 18 * 10mm for example, as chip carrier, rather than the substrate of 21.25 * 30.25mm of prior art; And the substrate of this miniaturization can adopt the array mode to make in batch, can significantly reduce production costs like this, and when specifically implementing, the monolithic cost of the substrate of above-mentioned 18 * 10mm only is about NT$4.0, and the monolithic cost of the substrate of 21.25 * 30.25mm that prior art adopted then is about NT$20.0.In addition, by the length and width size of change substrate and the storehouse setting of location in shell body and built-in semiconductor chip thereof, also make storage chip quantity that each multimedia card can be ccontaining reach the twice to four times of existing multimedia card, fully solved prior art problems.
Description of drawings
Figure 1A to Fig. 1 C uses prior art) produce the processing procedure schematic diagram of multimedia card;
Fig. 1 D is the upward view of this existing multimedia card;
Fig. 2 A to Fig. 2 D is the processing procedure schematic diagram of the embodiment 1 of multimedia card of the present invention;
Fig. 2 E is the upward view of the embodiment 1 of this multimedia card;
Fig. 3 A is the cutaway view of the multimedia card of the embodiment of the invention 2; And
Fig. 3 B is the upward view of the multimedia card of the embodiment of the invention 2.
Embodiment
Embodiment 1
Below promptly cooperate Fig. 2 A to Fig. 2 E, describe the embodiment 1 of card-typed circuit module of the present invention in detail.In the present embodiment, card-typed circuit module of the present invention be used for making the multimedia card that planar dimension is 32 * 24mm (Multi-Media Card, MMC); But basic conception of the present invention also can be used to manufacture the circuit card with other function or other size.In addition, Fig. 2 A to Fig. 2 E is the schematic diagram of simplifying, and only is that basic conception of the present invention is described in a schematic way; Therefore it only shows the assembly relevant with the present invention, and shown assembly is not, and number, shape and dimension scale when implementing according to reality drawn, number, shape and dimension scale during actual enforcement can be other designs, and its assembly layout form also may be complicated more.
At first consult Fig. 2 A, at first prefabricated an array formula substrate matrix 100 marks off a plurality of base board units 110 in advance on this array substrate matrix 100.On each base board unit 110, mark off at least one chip placing district 111 and a plurality of passive components settlement 112 (this passive component settlement 112 can have selectivity) in advance, and be provided with a plurality of electric connection pads 113.These electric connection pads 113 are from the straight-through back side, the front of base board unit 110, as the external electric connection point of the card-typed circuit module of finishing at last.
The length and width of above-mentioned array substrate matrix 100 are dimensioned to 56 * 56mm, and its entire area is divided into the base board unit 110 that 15 (5 * 3) length and width are of a size of 18 * 10mm in advance.
Then shown in Fig. 2 B, settle chip program, in the chip placing district 111 of each base board unit 110 on the array substrate matrix 100, settle the semiconductor chip 120 (Fig. 2 B only shows that a base board unit 110 is as representative) of two storehouses; Then, for example adopt that wire soldering technology applies two assembly welding lines 140 respectively, gold thread for example is electrically coupled to electric connection pad 113 on the base board unit 110 with the chip 120 of two storehouses; In addition, if chip 120 needs the external passive component 130 of collocation, also can be coupled to the passive component settlement 112 on each base board unit 110 in advance with required passive component 130 before settling chip program.But, then need not carry out this step if the internal circuit of chip 120 has been integrated required passive component.
Then shown in Fig. 2 C, carry out packing colloid processing procedure (Fig. 2 C is representative with a base board unit 110 only also).On this array substrate matrix, form a packing colloid 150, in order to encapsulate the semiconductor chip of being settled on each base board unit 110 on this array substrate matrix 120 simultaneously.Then cut the one way preface,, cut into a plurality of encapsulation units shown in Fig. 2 C the line of demarcation of this packing colloid 150 along a plurality of substrates 110 on this array substrate matrix 100; Wherein each encapsulation unit is promptly with the substrate of a base board unit 110 on original this array substrate matrix as carries chips 120.Owing to be that length and width size with each base board unit 110 is decided to be 18 * 10mm among this embodiment, the length and width size of therefore cutting each encapsulation unit after single also is 18 * 10mm.
Then shown in Fig. 2 D, the common-use size that cooperates card-typed circuit module, choose the above-mentioned encapsulation unit of cutting after single, add a cover a rectangular enclosure body 160 on per two encapsulation units, its mode is that these two encapsulation units are embedded in these shell body 160 formed spatial accommodations; This shell body 160 can be prefabricated into a spare part, or directly is formed on these two encapsulation units in injection molding mode in processing procedure.
So, promptly finish the processing procedure of the multimedia card of the embodiment of the invention 1, shown in the upward view of the cutaway view of Fig. 2 D and Fig. 2 E, this multimedia card comprises two substrates 110, these two substrates 110 all are approximate rectangular shape, and each substrate 110 all comprises a chip placing district and a plurality of electric connection pad 113; Two semiconductor chips 120, this semiconductor chip 120 is placed in respectively in the chip placing district of this substrate, and electrically connects with the electric connection pad 113 of this substrate 110; Two packing colloids 150, this packing colloid 150 are formed at respectively on these two substrates 110, and coat this semiconductor chip 120; And a rectangular enclosure body 160, this shell body 160 is with two substrates 110, semiconductor chip 120 and packing colloid 150,150 ' be contained in it.Wherein the long limit of two substrates 110 is all vertical with the long limit of shell body 160, and the electric connection pad 113 of two substrates 110 is exposed to the same outer surface of shell body 160 respectively and is the diagonal angle setting, reaching the double-purpose plant function of this multimedia card, and the chip storage capacity of this multimedia card is doubled on same surface.
Embodiment 2
Fig. 3 A and Fig. 3 B are the embodiment 2 of multimedia card of the present invention.For convenience of description, assembly identical with embodiment 1 in the present embodiment 2 is still quoted same numeral, the multimedia card of the structure of this multimedia card and embodiment 1 is roughly the same, it also is the common-use size that cooperates card-typed circuit module, choose two encapsulation units of cutting after single, and on these two encapsulation units, add a cover a rectangular enclosure body.This multimedia card comprises two substrates 110, and this substrate 110 all is the shape that is similar to rectangle, and each substrate 110 comprises a chip placing district and a plurality of setting electric connection pad 113 thereon; At least two semiconductor chips 120, this semiconductor chip 120 is placed in respectively in the chip placing district of this substrate, and electrically connects with the electric connection pad 113 of this substrate 110; Two packing colloids 150, it is formed at respectively on two substrates 110, and coats semiconductor chip 120; And rectangular enclosure body 160, this shell body 160 is contained in these two substrates 110, semiconductor chip 120 and packing colloid 150 in it, wherein, the long limit of two substrates 110 is perpendicular to the long limit of shell body 160, but, the electric connection pad 113 of two substrates of the multimedia card of present embodiment is exposed to two relative up and down outer surfaces of shell body 160 respectively, and be the mirror image symmetry, with two apparent surfaces' reaching multimedia card double-purpose plant function, and the chip storage capacity of this multimedia card can be doubled.
Compared with the prior art, because card-typed circuit module of the present invention only can adopt the length and width size Be the substrate of 18 * 10mm as chip carrier, rather than adopt of the prior art 21.25 * 30.25mm substrate, therefore can fully use the shell body size of existing specification, make this shell The space of body obtains the most sufficient utilization, can save baseplate material and cost, also can make this shell The accommodating number of chips of body increases the double-purpose function and the operation that have improved this card-typed circuit module Usefulness, and because the substrate available array mode of this miniaturization is made in batch, therefore also can show Reduce whole production cost outstandingly; On implementation, the substrate list of above-mentioned 18 * 10mm The monolithic cost of unit only is roughly NT $ 4.0, and 21.25 * 30.25mm that prior art adopts The monolithic cost of base board unit then be roughly NT $ 20.0, its cost is far above product of the present invention Product; In addition, length and width size and the location in shell body and built-in half by changing substrate The storehouse setting of conductor chip can make the accommodating storage chip quantity of each multimedia card reach existing The twice to four times that multimedia card is arranged, the restriction that has fully solved prior art.

Claims (10)

1. a semiconductor package part is characterized in that, this packaging part comprises:
Two substrates, each substrate all comprise a chip placing district and a plurality of electric connection pad that is arranged on this substrate;
At least two semiconductor chips are placed in respectively in the chip placing district of these two substrates, and electrically connect with the electric connection pad of substrate separately;
Two packing colloids are formed at respectively on these two substrates, and coat this semiconductor chip, to form two encapsulation units respectively; And
Shell body is contained in these two encapsulation units in it;
Wherein, the long limit of these two substrates is all vertical with the long limit of this shell body, and the electric connection pad of these two substrates exposes outside the same outer surface of this shell body respectively and is the diagonal angle setting.
2. semiconductor package part as claimed in claim 1 is characterized in that the length and width of this shell body are of a size of 32 * 24mm.
3. semiconductor package part as claimed in claim 1 is characterized in that the length and width of this substrate are of a size of 18 * 10mm.
4. semiconductor package part as claimed in claim 1 is characterized in that, also is formed with a plurality of passive components settlement outside the chip placing district of this substrate.
5. semiconductor package part as claimed in claim 1 is characterized in that, in the chip placing district of each substrate respectively storehouse be provided with two semiconductor chips, and these two semiconductor chips electrically connect with this electric connection pad respectively.
6. a semiconductor package part is characterized in that, this packaging part comprises:
Two substrates, each substrate include a chip placing district and a plurality of electric connection pad that is arranged on this substrate;
At least two semiconductor chips are placed in respectively in the chip placing district of these two substrates, and electrically connect with the electric connection pad of substrate separately;
Two packing colloids are formed at respectively on these two substrates, and coat this semiconductor chip, to form two encapsulation units respectively; And
Shell body is contained in these two encapsulation units in it;
Wherein, the long limit of these two substrates is all vertical with the long limit of this shell body, and the electric connection pad of these two substrates exposes outside two opposing outer face of this shell body respectively and is and is symmetrical arranged.
7. semiconductor package part as claimed in claim 6 is characterized in that the length and width of this shell body are of a size of 32 * 24mm.
8. semiconductor package part as claimed in claim 6 is characterized in that the length and width of this substrate are of a size of 18 * 10mm.
9. semiconductor package part as claimed in claim 6 is characterized in that, also is formed with a plurality of passive components settlement outside the chip placing district of this substrate.
10. semiconductor package part as claimed in claim 6 is characterized in that, in the chip placing district of each substrate respectively storehouse be provided with two semiconductor chips, and these two semiconductor chips electrically connect with this electric connection pad respectively.
CNB200310113271XA 2003-11-10 2003-11-10 Semiconductor package piece Expired - Fee Related CN1333449C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB200310113271XA CN1333449C (en) 2003-11-10 2003-11-10 Semiconductor package piece

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB200310113271XA CN1333449C (en) 2003-11-10 2003-11-10 Semiconductor package piece

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CN1617315A CN1617315A (en) 2005-05-18
CN1333449C true CN1333449C (en) 2007-08-22

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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017107174A1 (en) * 2015-12-25 2017-06-29 Intel Corporation Flip-chip like integrated passive prepackage for sip device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6040622A (en) * 1998-06-11 2000-03-21 Sandisk Corporation Semiconductor package using terminals formed on a conductive layer of a circuit board
US6548911B2 (en) * 2000-12-06 2003-04-15 Siliconware Precision Industries Co., Ltd. Multimedia chip package
US6603196B2 (en) * 2001-03-28 2003-08-05 Siliconware Precision Industries Co., Ltd. Leadframe-based semiconductor package for multi-media card

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6040622A (en) * 1998-06-11 2000-03-21 Sandisk Corporation Semiconductor package using terminals formed on a conductive layer of a circuit board
US6548911B2 (en) * 2000-12-06 2003-04-15 Siliconware Precision Industries Co., Ltd. Multimedia chip package
US6603196B2 (en) * 2001-03-28 2003-08-05 Siliconware Precision Industries Co., Ltd. Leadframe-based semiconductor package for multi-media card

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