CN1294650C - Method for preparing high quality GaN base material on specific saphire pattern substrate - Google Patents
Method for preparing high quality GaN base material on specific saphire pattern substrate Download PDFInfo
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- CN1294650C CN1294650C CNB2004100585740A CN200410058574A CN1294650C CN 1294650 C CN1294650 C CN 1294650C CN B2004100585740 A CNB2004100585740 A CN B2004100585740A CN 200410058574 A CN200410058574 A CN 200410058574A CN 1294650 C CN1294650 C CN 1294650C
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Abstract
The present invention discloses a method for preparing high quality GaN base materials on specific sapphire pattern substrates. The method can obtain a sapphire substrate with a specific pattern via adopting a wet corrosion technique, and a bridging epitaxial growth technique is used for depositing a GaN bridging epitaxial layer and a required component structure layer on the sapphire substrate. The present invention overcomes the lattice orientation tilting problem of epitaxial materials prepared by the existing ELOG and CE techniques, and meanwhile, the present invention overcomes the disadvantage of material wastage of the CE technique. The present invention not only has the advantages of simple operation and no substrate pollution nor damage, and meanwhile, the present invention also reduces the penetration dislocation density in the epitaxial layer of GaN groups and avoids lattice orientation tilting.
Description
Technical field
The present invention relates to the preparation method of a kind of low-dislocation-density, high quality GaN sill.
Background technology
Wide bandgap semiconductor GaN material makes it be widely used at photoelectron and microelectronic because of its distinctive physical property.But lack the suitable epitaxial substrate that is complementary with the GaN lattice constant at present, its epitaxial film can only be grown in its mismatch bigger such as on the substrates such as sapphire, silicon, carborundum.The lattice constant of these substrates differs greatly with comparing of GaN with thermal coefficient of expansion, and the threading dislocation density that causes GaN basal growth layer is up to 10
8-10
10Cm
-2The existence of these dislocations has limited the further raising of opto-electronic device performance, particularly is difficult to realize high-power device so far for ultraviolet light-emitting diode.Therefore, the dislocation density that reduces in the GaN sill is the basis of preparation high performance device.
The process that discovery at present can effectively reduce dislocation density in the GaN base epitaxial material mainly contains epitaxial lateral overgrowth (epitaxial lateral overgrowth is abbreviated as ELOG), pendeo epitaxy technology such as (cantileverepitaxy are abbreviated as CE).Wherein, the ELOG growth method will prepare mask (employing SiO on epitaxial substrate
2Or Si
3N
4Mask material etc.), though the pendeo epitaxy growing method is the growth technology of no mask, these two kinds of growing methods all need to adopt the technology of dry etching, technology cost height, to wanting the etch material surface damage big, introduce impurity easily, increase stress and pollute substrate.Though above-mentioned method has obviously reduced the dislocation density in the GaN base epitaxial loayer and has improved the quality of material in the epitaxial lateral overgrowth zone, but the most significant weakness is to have a small angle between the crystal lattice orientation in direct epitaxial growth district and epitaxial lateral overgrowth district, promptly so-called crystal lattice orientation relative tilt (inclination angle be about ± 0.25 °).The inclination deterioration of this crystal lattice orientation the lattice quality behind the epitaxial lateral overgrowth, be unfavorable for obtaining large-area, low-dislocation-density, equally distributed high-quality GaN sill.In the pendeo epitaxy growth technique of second kind of no mask, before horizontal extension merged, trench area still had the accumulation of epitaxial material in addition, and the waste raw material are unfavorable for reducing production costs and saving resource.
Summary of the invention
At problems of the prior art, the object of the present invention is to provide a kind of method that on the sapphire graphical substrate, prepares the high-quality GaN sill, this method overcomes the crystal lattice orientation tilt problem of epitaxial material of the technology preparation of existing ELOG and CE, also overcome simultaneously the drawback of CE technology waste of raw materials, not only simple, avoid contamination of substrate and damage, also reduce the threading dislocation density in the GaN base epitaxial loayer simultaneously, and avoided the crystal lattice orientation inclination.
For achieving the above object, the present invention provides a kind of method for preparing the high-quality GaN sill on the sapphire graphical substrate, comprises the steps:
1) chemical vapor deposition techniques (PECVD) the evaporation thickness on the C surface sapphire that adopts plasma to strengthen is the earth silicon mask layer of 100～500nm;
2) utilize photoetching technique at this evaporation make bar shaped earth silicon mask figure along [11 20] direction on the C surface sapphire of earth silicon mask layer by lithography, the length of this earth silicon mask layer striated pattern is 15～100mm, width is 1～20 μ m, and the window area width is 1～50 μ m;
3) this substrate being put into by volume ratio was the corrosive liquid that 1～100: 1 sulfuric acid and phosphoric acid mix, and adopts the temperature controlling stove heating, 200～500 ℃ of corrosion 1～10 hour;
4) take out substrate, rinse well with deionized water, then this substrate being put into by volume ratio is 1～100: 1 deionized water and the formulated hydrofluoric acid solution of hydrofluoric acid, corrodes 1～1000 second;
5) take out substrate, used deionized water rinsing again 1～100 minute, the sapphire graphical substrate that obtains cleaning, the table top of this sapphire graphical substrate is periodically adjacent with groove shape striated pattern, groove shape striped is in the Sapphire Substrate upper edge [11 20] of C planar orientation direction, groove be shaped as triangle, the width of groove is 1 μ m～50 μ m, its length is 1mm～10cm, the mesa width of table top striped is 1 μ m～20 μ m, table top striped length is 1mm～10cm, the table top fringe depths is 0.8～10 μ m, the crystal face of the triangular-section correspondence of groove be sapphire R face or the 1-10k} face, to form leg-of-mutton two crystal faces be identical crystal face or belong to { two different crystal faces of 1-10k}, wherein integer k=2～6;
6) adopt metal organic chemical vapor deposition technology (MOCVD) the sapphire graphical substrate to be handled at 900～1200 ℃;
7) reduce underlayer temperature to 400～650 ℃ of the growth temperatures of low temperature nucleating layer, the low temperature nucleating layer of the 10～100nm that grows;
8) this low temperature nucleating layer was annealed 2～60 minutes at 900～1200 ℃, annealing back is at grow bridging epitaxial loayer more than the 2 μ m of this temperature, the device architecture layer that deposit thereon afterwards is required.
Further, described low temperature nucleating layer can be GaN, InGaN, AlGaN, InAlGaN or AlN.
Further, described bridging epitaxial loayer can be GaN, AlN, AlGaN, InGaN, InAlN or InAlGaN.
Further, described device architecture layer can be light-emitting diode (LED) material structure or laser (LD) material structure or ultraviolet detector (UV-detector) material structure or microelectronic component material structure.
Further, described light-emitting diode is the light-emitting diode of amber, ruddiness, blue light, green glow, purple light or ultraviolet light, described laser is the laser of amber, blue light, green glow, purple light or ultraviolet light, and described microelectronic component is High Electron Mobility Transistor (HEMT) or field-effect transistor (FET).
Further, described bridging epitaxial loayer and device architecture layer adopt wherein one or both of metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), chemical vapor deposition (CVD) or hydride gas-phase epitaxy (HVPE) to make up in-situ preparing.
The prepared Sapphire Substrate of the present invention has the special pattern structure, no etching injury, no mask, the half-peak breadth of the symmetrical X-ray diffraction of epitaxial growth GaN material only is 0.04 ° thereon, not only avoided the inclination of epitaxial growth film orientation, even it is also littler than the half-peak breadth (being generally 0.05 °) of epitaxial grown material on the plane sapphire substrate, result with the X ray asymmetrical diffraction (0002) of the GaN material of 4 μ m of the inventive method preparation shows: also be perpendicular to the stripe direction of figure no matter the X ray of incident is the stripe direction that is parallel to figure, the half-peak breadth of its (0002) diffraction only is about 150 second of arcs.In addition, the dislocation density that the epitaxy method of the threading dislocation density of the GaN sill of direct extension and routine obtains on table top is suitable, is about 5 * 10
8～10
10/ cm
2, and the dislocation in the GaN sill of trench lateral bridging extension mostly is the dislocation of deflection horizontal direction, thus reduced the threading dislocation density of bridging epitaxial part, be about 5 * 10
6～10
8/ cm
2, therefore reduced the non-radiative recombination center in the semiconductor device structure material of extension on it, improved the quality of epitaxial material.
Description of drawings
Fig. 1 is the vertical view with Sapphire Substrate of cycle striated pattern;
Fig. 2 is the sectional view with Sapphire Substrate of cycle striated pattern;
Fig. 3 is the GaN sill of bridging extension on the sapphire graph substrate;
Fig. 4 is the schematic cross-section of the GaN base device structural material of bridging extension on sapphire graph substrate.
Embodiment
Chemical vapor deposition techniques (PECVD) the evaporation thickness on the C surface sapphire that adopts plasma to strengthen is the earth silicon mask layer of 200nm; Utilize again photoetching technique at this evaporation make bar shaped earth silicon mask figure along [11 20] direction on the C surface sapphire of earth silicon mask layer by lithography, the length of this earth silicon mask layer striated pattern is 15mm, width is 2 μ m, and the window area width is 3 μ m; Putting into this substrate by volume ratio was the corrosive liquid that 20: 1 sulfuric acid and phosphoric acid mix, and adopts the temperature controlling stove heating, 200 ℃ of corrosion 1 hour; Take out substrate, rinse well with deionized water, then this substrate being put into by volume ratio is 10: 1 deionized water and the formulated hydrofluoric acid solution of hydrofluoric acid, corrodes 10 seconds; Take out substrate, used deionized water rinsing again 10 minutes, the sapphire graphical substrate that obtains cleaning, as shown in Figure 1, 2, the table top of this sapphire graphical substrate is periodically adjacent with groove shape striated pattern, groove shape striped is in the Sapphire Substrate upper edge [11 20] of C planar orientation direction, groove be shaped as triangle, the width of groove is 3 μ m, its length is 5cm, the mesa width of table top striped is 2 μ m, and its length is 5cm.Constitute leg-of-mutton two crystal faces and be respectively (1-102) and (1106) face; Adopt metal organic chemical vapor deposition technology (MOCVD) the sapphire graphical substrate to be handled at 1000 ℃; Reduce underlayer temperature then to 500 ℃ of the growth temperatures of low temperature nucleation, the GaN low temperature nucleating layer 1 of growth 15nm is low temperature nucleating layer 1 shown in Figure 4, and wherein, the Ga source is TMGa, and the N source is an ammonia; This low temperature nucleating layer 1 was annealed 5 minutes at 1200 ℃, annealing back is at grow GaN bridging epitaxial loayer 2 more than the 2 μ m of this temperature, the GaN sill of the bridging extension of growing on the sapphire graphical substrate as shown in Figure 3, dotted line among the figure is the interface of converging of side direction bridging extension, bridging epitaxial growth GaN sill along continuous straight runs can be regarded the cycle spatial distribution that two parts constitute as, a part is directly epitaxial growth on table top, the dislocation density that the epitaxy method of the threading dislocation density of the GaN sill of the direct extension of this part and routine obtains is suitable, is about 5 * 10
8～10
10/ cm
2, another part is in the side direction bridging epitaxial growth of the both sides of table top, dislocation mostly is the dislocation of deflection horizontal direction in the GaN sill of this part side direction bridging extension, thereby has reduced the threading dislocation density of bridging epitaxial part, is about 5 * 10
6～10
8/ cm
2The purple LED device architecture layer 3 that deposit thereon afterwards is required, the schematic cross-section of the GaN base device structural material of bridging extension on the sapphire graphical substrate as shown in Figure 4.
Chemical vapor deposition techniques (PECVD) the evaporation thickness on the C surface sapphire that adopts plasma to strengthen is the earth silicon mask layer of 100nm; Utilize again photoetching technique at this evaporation make bar shaped earth silicon mask figure along [11 20] direction on the C surface sapphire of earth silicon mask layer by lithography, the length of this earth silicon mask layer striated pattern is 50mm, width is 4 μ m, and the window area width is 8 μ m; Putting into this substrate by volume ratio was the corrosive liquid that 10: 1 sulfuric acid and phosphoric acid mix, and adopts the temperature controlling stove heating, 300 ℃ of corrosion 2 hours; Take out substrate, rinse well with deionized water, then this substrate being put into by volume ratio is 5: 1 deionized water and the formulated hydrofluoric acid solution of hydrofluoric acid, corrodes 5 seconds; Take out substrate, used deionized water rinsing again 10 minutes, the sapphire graphical substrate that obtains cleaning, the table top of this sapphire graphical substrate is periodically adjacent with groove shape striated pattern, and groove shape striped is in the Sapphire Substrate upper edge [11 20] of C planar orientation direction, groove be shaped as triangle, the width of groove is 8 μ m, and its length is 5cm, and the mesa width of table top striped is 4 μ m, its length is 5cm, constitutes leg-of-mutton two crystal faces and is respectively (1-102) and (1104) face; Adopt metal organic chemical vapor deposition technology (MOCVD) the sapphire graphical substrate to be handled at 1050 ℃; Reduce underlayer temperature to 600 ℃ of the growth temperatures of low temperature nucleating layer, the GaN low temperature nucleating layer of the 25nm that grows, wherein, the Ga source is TMGa, the N source is an ammonia; This low temperature nucleating layer was annealed 10 minutes at 1100 ℃, and annealing back is at grow GaN bridging epitaxial loayer more than the 3 μ m of this temperature, the blue light LD device architecture layer that deposit thereon afterwards is required.
Chemical vapor deposition techniques (PECVD) the evaporation thickness on the C surface sapphire that adopts plasma to strengthen is the earth silicon mask layer of 300nm; Utilize again photoetching technique at this evaporation make bar shaped earth silicon mask figure along [11 20] direction on the C surface sapphire of earth silicon mask layer by lithography, the length of this earth silicon mask layer striated pattern is 100mm, width is 1 μ m, and the window area width is 10 μ m; Putting into this substrate by volume ratio was the corrosive liquid that 5: 1 sulfuric acid and phosphoric acid mix, and adopts the temperature controlling stove heating, 400 ℃ of corrosion 3 hours; Take out substrate, rinse well with deionized water, then this substrate being put into by volume ratio is 20: 1 deionized water and the formulated hydrofluoric acid solution of hydrofluoric acid, corrodes 20 seconds; Take out substrate, used deionized water rinsing again 10 minutes, the sapphire graphical substrate that obtains cleaning.The table top of this sapphire graphical substrate is periodically adjacent with groove shape striated pattern, groove shape striped is in the Sapphire Substrate upper edge [11 20] of C planar orientation direction, groove be shaped as triangle, the width of groove is 10 μ m, its length is 5cm, the mesa width of table top striped is 1 μ m, and its length is 5cm, constitutes leg-of-mutton two crystal faces and is respectively (1-102) and (1102) face; Adopt metal organic chemical vapor deposition technology (MOCVD) the sapphire graphical substrate to be handled at 1100 ℃; Reduce underlayer temperature to 650 ℃ of the growth temperatures of low temperature nucleating layer, the AlN low temperature nucleating layer of the 22nm that grows, wherein, the Al source is TMAl, the N source is an ammonia; This low temperature nucleating layer was annealed 12 minutes at 1200 ℃, and annealing back is at grow AlGaN bridging epitaxial loayer more than the 4 μ m of this temperature, the device architecture layer of the ultraviolet detector that deposit thereon afterwards is required.
Claims (7)
1, a kind of method for preparing the high-quality GaN sill on the sapphire graphical substrate is characterized in that, comprises the steps:
1) the chemical vapor deposition techniques evaporation thickness on the C surface sapphire that adopts plasma to strengthen is the earth silicon mask layer of 100～500nm;
2) utilize photoetching technique at this evaporation make bar shaped earth silicon mask figure along [11 20] direction on the C surface sapphire of earth silicon mask layer by lithography, the length of this earth silicon mask layer striated pattern is 15～100mm, width is 1～20 μ m, and the window area width is 1～50 μ m;
3) this substrate being put into by volume ratio was the corrosive liquid that 1～100: 1 sulfuric acid and phosphoric acid mix, and adopts the temperature controlling stove heating, 200～500 ℃ of corrosion 1～10 hour;
4) take out substrate, rinse well with deionized water, then this substrate being put into by volume ratio is 1～100: 1 deionized water and the formulated hydrofluoric acid solution of hydrofluoric acid, corrodes 1～1000 second;
5) take out substrate, used deionized water rinsing again 1～100 minute, the sapphire graphical substrate that obtains cleaning, the table top of this sapphire graphical substrate is periodically adjacent with groove shape striated pattern, groove shape striped is in the Sapphire Substrate upper edge [11 20] of C planar orientation direction, groove be shaped as triangle, the width of groove is 1 μ m～50 μ m, its length is 1mm～10cm, the mesa width of table top striped is 1 μ m～20 μ m, table top striped length is 1mm～10cm, the table top fringe depths is 0.8～10 μ m, the crystal face of the triangular-section correspondence of groove be sapphire R face or the 1-10k} face, to form leg-of-mutton two crystal faces be identical crystal face or belong to { two different crystal faces of 1-10k}, wherein integer k=2～6;
6) adopt the metal organic chemical vapor deposition technology sapphire graphical substrate to be handled at 900～1200 ℃;
7) reduce underlayer temperature to 400～650 ℃ of the growth temperatures of low temperature nucleating layer, the low temperature nucleating layer of the 10～100nm that grows;
8) this low temperature nucleating layer was annealed 2～60 minutes at 900～1200 ℃, annealing back is at grow bridging epitaxial loayer more than the 2 μ m of this temperature, the device architecture layer that deposit thereon afterwards is required.
2, a kind of method for preparing the high-quality GaN sill on the sapphire graphical substrate according to claim 1 is characterized in that, described low temperature nucleating layer is GaN, InGaN, AlGaN, InAlGaN or AlN.
3, a kind of method for preparing the high-quality GaN sill on the sapphire graphical substrate according to claim 1 is characterized in that, described bridging epitaxial loayer is GaN, AlN, AlGaN, InGaN, InAlN or InAlGaN.
4, a kind of method that on the sapphire graphical substrate, prepares the high-quality GaN sill according to claim 1, it is characterized in that described device architecture layer can be light LED material structure or laser material structure or ultraviolet detector material structure or microelectronic component material structure.
5, a kind of method that on the sapphire graphical substrate, prepares the high-quality GaN sill according to claim 4, it is characterized in that, described light-emitting diode is the light-emitting diode of amber, ruddiness, blue light, green glow, purple light or ultraviolet light, described laser is the laser of amber, blue light, green glow, purple light or ultraviolet light, and described microelectronic component is High Electron Mobility Transistor or field-effect transistor.
6, a kind of method that on the sapphire graphical substrate, prepares the high-quality GaN sill according to claim 1, it is characterized in that described bridging epitaxial loayer adopts wherein one or both of metal organic chemical vapor deposition, molecular beam epitaxy, chemical vapor deposition or hydride gas-phase epitaxy to make up in-situ preparing.
7, a kind of method that on the sapphire graphical substrate, prepares the high-quality GaN sill according to claim 1, it is characterized in that described device architecture layer adopts wherein one or both of metal organic chemical vapor deposition, molecular beam epitaxy, chemical vapor deposition or hydride gas-phase epitaxy to make up in-situ preparing.
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Cited By (1)
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