CN1222995C - 混合集成电路装置 - Google Patents

混合集成电路装置 Download PDF

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Publication number
CN1222995C
CN1222995C CNB011045515A CN01104551A CN1222995C CN 1222995 C CN1222995 C CN 1222995C CN B011045515 A CNB011045515 A CN B011045515A CN 01104551 A CN01104551 A CN 01104551A CN 1222995 C CN1222995 C CN 1222995C
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mentioned
metal fine
semiconductor device
semiconductor element
integrated circuit
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CN1329362A (zh
Inventor
坂本则明
小林义幸
前原荣寿
酒井纪泰
高岸均
高桥幸嗣
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/202—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern

Abstract

已存在有在印刷电路板、陶瓷板、软性板等上装配电路装置的混合集成电路装置。但其中具有大量电路元件，其中的半导体元件要用多种金属细线来焊接。例如将小信号系列的电路用的半导体元件和连接它们的Au线形成1个组件，作为半导体装置(30A等)。这就省略Au的焊接，仅进行小直径的A1线和大直径的A1线的焊接，即可完成金属细线的连接。这些半导体装置是以多个电路元件形成1个组件，所以也大幅度减少向装配基板上的固定次数。

Description

混合集成电路装置
技术领域
本发明涉及混合集成电路装置，特别是通过减少金属细线的焊接从而可以减少组装工时的混合集成电路装置。
背景技术
以往，设置在电子仪器中的混合集成电路装置是在例如印刷电路板、陶瓷板或金属基板上形成导电图形、并在其上装配LSI或分立TR等有源元件、片状电容器、片状电阻或线圈等无源元件而构成的。并且，上述导电图形和上述元件电气相连接从而实现指定功能的电路。
图19示出一例电路，给出了图19。该电路是声频电路，图中所示的元件实际装配成图20的情况。
在图20中，最外侧的矩形线是至少表面进行了绝缘处理的装配基板1。并且，在其上粘贴了由Cu形成的导电图形2。该导电图形2由外部取出用电极2A、配线2B、缓冲垫2C、焊接垫片2D、和固定无源元件3的电极4等构成。
TR、二极管、复合元件或LSI等以裸片状通过焊锡固定到缓冲垫2C上。并且，固定的芯片上的电极和上述焊接垫片2D通过金属细线5A、5B、5C实现电气连接。该金属细线通常分为小信号和大信号用的两种，小信号部使用φ20～80μm的金属细线。并且，这里采用由约φ40μm的Au线5A或Al线。另外，大信号部采用约φ100～300μm的Au线或Al线。特别是大信号的线径大，所以，考虑到成本，选择φ150μm的Al线5B、φ300μm的Al线5C。
另外，为了防止芯片的温度上升，流过大电流的功率TR6固定在缓冲垫2C上的散热片7上。
并且，为了使上述外部取出用电极2A、缓冲垫2C、焊接垫片2D和电极4形成电路，配线2B延伸到各个地方。另外，由于芯片的位置、配线的延伸方式的需要而配线之间发生交叉时，就采用跨越线8A、8B。
由图20可知，大量采用片状电容器、片状电阻、小信号用TR芯片、大信号用TR芯片、二极管以及LSI等，它们分别用焊料等进行固定。并且，TR芯片等半导体元件使用金属细线实现电气连接。该金属细线根据电流容量分为多种，该金属细线的数量也非常多。由此可知，芯片的固定、金属细线的连接将招致组装工序非常长，从而成本提高。
另外，最近市售芯片的尺寸已达到0.45×0.5mm、厚度达到0.25mm，非常小，价格非常便宜。但是用焊锡固定该芯片时，焊锡将扩散到芯片的侧面而造成短路，所以，在混合集成电路基板上也就不能采用。
另外，如果把将半导体元件固定到引线框架上的组件装配到混合集成电路基板上，由于该组件的尺寸非常大，混合集成电路基板的尺寸将增大。
如上所述，即使采用混合集成电路基板想降低成本，由于不能装配非常小的芯片和组装工序长等原因也将招致成本上升。
发明内容
本发明就是鉴于上述问题而提案的，其目的在于，第1，在至少具有至少表面进行了绝缘处理的有多个导电图形的装配基板、与上述导电图形电连接的半导体元件、焊接上述半导体元件的焊接电极或上述导电图形的金属细线的混合集成电路装置中，将上述金属细线和用上述金属细线焊接的半导体元件封装的半导体装置装配到上述装配基板上。
如果预先准备已封装组好的半导体装置并将该半导体装置装配到装配基板上，混合集成电路装置的组装工序就可以减少金属细线的焊接次数，从而可以缩短组装工序。
第2，上述金属细线使用材料不同的多种金属细线，至少将一种金属细线全部被封装到上述半导体装置中。
例如，利用Au线和Al线构成混合集成电路装置时，如果预先将采用Au线的半导体元件作为半导体装置准备好，混合集成电路装置的组装工序就可以去掉Au线的焊接，而只进行Al线的焊接。因此，Au线的焊接就从组装工序中省略了，从而可以实现组装工序的简化。
第3，上述金属细线使用线径不同的多种金属细线，至少将一种金属细线全部被封装到上述半导体装置中。
例如，使用300μm和150μm的金属细线时，通过准备用150μm的金属细线焊接的半导体装置，组装工序就可以省略150μm的焊接工序。
第4，所有上述金属细线均被封装到上述半导体装置中。
在混合集成电路装置的组装中，可以全部去掉金属细线的焊接工序。
此外，本发明还提供了一种混合集成电路装置，在有多个导电图形的装配基板上安装有：安装了第1半导体元件的半导体装置、以及电流容量与上述第1半导体元件不同的第2半导体元件，其特征在于：上述半导体装置具备：多条导电路；电连接上述导电路和上述第1半导体元件的第1金属细线；以及覆盖上述第1半导体元件、上述导电路、上述第1金属细线并使上述导电路的背面露出的绝缘性树脂，上述第2半导体元件经由与上述第1金属细线不同的第2金属细线与上述装配基板电连接。
第5，是至少具有至少表面进行了绝缘处理的有多个导电图形的装配基板、与上述导电图形电气连接的小信号系列列的半导体元件、与上述导电图形电气连接的大信号系列列的半导体元件、至少具有将上述小信号系列的半导体元件的焊接电极与上述导电图形焊接的Au线和与上述导电图形焊接的Al线的混合集成电路装置，把将上述Au线和用上述Au线焊接的半导体元件封装的半导体装置装配到上述装配基板上。
第6，与上述导电图形焊接的金属细线采用上述Al线。
第7，是至少具有至少表面进行了绝缘处理的有多个导电图形的装配基板、与上述导电图形电气连接的小信号系列的半导体元件、与上述导电图形电气连接的大信号系列的半导体元件、焊接上述导电图形的Au线和至少将上述大信号系列的半导体元件与上述导电图形焊接的Al线的混合集成电路装置，把将上述Al线和用上述Al线焊接的大信号系列的半导体元件封装的半导体装置装配到上述装配基板上。
第8，与上述导电图形焊接的金属细线采用上述Au线。
第9，是至少具有至少表面进行了绝缘处理的有多个导电图形的装配基板、与上述导电图形电气连接的小信号系列的半导体元件、与上述导电图形电气连接的大信号系列的半导体元件、至少将上述小信号系列的半导体元件的焊接电极与上述导电图形焊接的小直径的金属细线和焊接上述导电图形的大直径的金属细线的混合集成电路装置，把将上述小直径的金属细线和用上述小直径的金属细线焊接的半导体元件封装的半导体装置装配到上述装配基板上。
第10，与上述导电图形焊接的金属细线采用上述大直径的金属细线。
第11，是至少具有至少表面进行了绝缘处理的有多个导电图形的装配基板、与上述导电图形电气连接的小信号系列的半导体元件、与上述导电图形电气连接的大信号系列的半导体元件、焊接上述导电图形的小直径的金属细线和至少将上述大信号系列的半导体元件的焊接电极与上述导电图形焊接的大直径的金属细线的混合集成电路装置，把将上述大直径的金属细线和用上述大直径的金属细线焊接的半导体元件封装的半导体装置装配到上述装配基板上。
第12，与上述导电图形焊接的金属细线采用上述小直径的金属细线。
第13，是至少具有至少表面进行了绝缘处理的有多个导电图形的装配基板、与上述导电图形电气连接的小信号系列的半导体元件、与上述导电图形电气连接的大信号系列的半导体元件、至少将上述小信号系列的半导体元件的焊接电极与上述导电图形焊接的Au线和焊接上述导电图形的Al线的混合集成电路装置，把具有用分离沟电气分离的多个导电路、固定在上述导电路上的小信号系列的半导体元件、将上述小信号系列的半导体元件与上述导电路连接的Au线、将该半导体元件和Au线覆盖并且填充到上述导电路间的上述分离沟的使上述导电路的背面露出从而一体地支持的绝缘性树脂的半导体装置装配到上述装配基板上，除了装配上述半导体装置的区域以外的区域，用除了上述Au线的连接手段进行连接。
第14，是至少具有至少表面进行了绝缘处理的有多个导电图形的装配基板、与上述导电图形电气连接的小信号系列的半导体元件、与上述导电图形电气连接的大信号系列的半导体元件、焊接上述导电图形的Au线和至少将大信号系列的半导体元件与上述导电图形焊接的Al线的混合集成电路装置，把具有用分离沟电气分离的多个导电路、固定在上述导电路上的大信号系列的半导体元件、将上述大信号系列的半导体元件与上述导电路连接的Al线、将该半导体元件和Al线覆盖并且填充到上述导电路间的上述分离沟的使上述导电路的背面露出从而一体地支持的绝缘性树脂的半导体装置装配到上述装配基板上，除了装配上述半导体装置的区域以外的区域，用除了上述Al线的连接手段进行连接。
第15，是至少具有至少表面进行了绝缘处理的有多个导电图形的装配基板、与上述导电图形电气连接的小信号系列的半导体元件、与上述导电图形电气连接的大信号系列的半导体元件、至少将上述小信号系列的半导体元件的焊接电极与上述导电图形焊接的小直径的金属细线和焊接上述导电图形的大直径的金属细线的混合集成电路装置，把具有用分离沟电气分离的多个导电路、固定在上述导电路上的小信号系列的半导体元件、将上述小信号系列的半导体元件与上述导电路连接的小直径的金属细线、将该半导体元件和小直径的金属细线覆盖并且填充到上述导电路间的上述分离沟的使上述导电路的背面露出从而一体地支持的绝缘性树脂的半导体装置装配到上述装配基板上，除了装配上述半导体装置的区域以外的区域，用除了上述小直径的金属细线的连接手段进行连接。
第16，是至少具有至少表面进行了绝缘处理的有多个导电图形的装配基板、与上述导电图形电气连接的小信号系列的半导体元件、与上述导电图形电气连接的大信号系列的半导体元件、焊接上述导电图形的小直径的金属细线和将大信号系列的半导体元件与上述导电图形焊接的大直径的金属细线的混合集成电路装置，把具有用分离沟电气分离的多个导电路、固定在上述导电路上的大信号系列的半导体元件、将上述大信号系列的半导体元件与上述导电路连接的大直径的金属细线、将该半导体元件和大直径的金属细线覆盖并且填充到上述导电路间的上述分离沟的使上述导电路的背面露出从而一体地支持的绝缘性树脂的半导体装置装配到上述装配基板上，除了装配上述半导体装置的区域以外的区域，用除了上述大直径的金属细线的连接手段进行连接。
第17，是至少具有至少表面进行了绝缘处理的有多个导电图形的装配基板、与上述导电图形电气连接的小信号系列的半导体元件、与上述导电图形电气连接的大信号系列的半导体元件、将上述小信号系列的半导体元件与上述导电图形焊接的小直径的金属细线、将上述大信号系列的半导体元件与上述导电图形焊接的大直径的金属细线的混合集成电路装置，把具有用分离沟电气分离的多个导电路、固定在上述导电路上的半导体元件、将上述半导体元件与上述导电路连接的金属细线、将该半导体元件和金属细线覆盖并且填充到上述导电路间的上述分离沟内的使上述导电路的背面露出从而一体地支持的绝缘性树脂的半导体装置装配到上述装配基板上，上述小直径的金属细线和大直径的金属细线使用在上述半导体装置内，在除了装配上述半导体装置的区域以外的区域中不使用上述金属细线。
第18，上述导电路的侧面由弯曲结构构成。
第19，在上述导电路上，设置导电被覆膜。
第20，除了上述半导体元件外，有源元件和/或无源元件与上述导电路电气连接而内藏，也包含上述有源元件和/或上述无源元件而形成电路。
第21，上述导电路由Cu、Al、Fe-Ni合金、Cu-Al的集层体、Al-Cu-Al的集层体构成。
第22，上述导电被覆膜由Ni、Au、Ag或Pd构成，形成遮檐形。
附图说明
图1是说明本发明的混合集成电路装置的图。
图2是说明图1的装配基板和半导体装置的结构的图。
图3是说明图2的A-A线的剖面图的图。
图4是说明本发明的半导体装置的制造方法的图。
图5是说明本发明的半导体装置的制造方法的图。
图6是说明本发明的半导体装置的制造方法的图。
图7是说明本发明的半导体装置的制造方法的图。
图8是说明本发明的半导体装置的制造方法的图。
图9是说明本发明的半导体装置的制造方法的图。
图10是说明本发明的半导体装置的图。
图11是说明本发明的半导体装置的图。
图12是说明本发明的半导体装置的图。
图13是说明本发明的半导体装置的图。
图14是说明本发明的半导体装置的图。
图15是说明本发明的半导体装置的图。
图16是说明本发明的半导体装置的图。
图17是说明本发明的半导体装置的图。
图18是说明本发明的半导体装置的图。
图19是说明装配到本混合集成电路装置中的电路的一例的图。
图20是说明先有的混合集成电路装置的图。
图21是将先有的半导体装置与本发明的半导体装置比较的图(以差动电流镜电路为例)。
具体实施方式
本发明涉及可以简化组装工序的混合集成电路装置，特别是可以减少金属细线的焊接、半导体元件的焊接的混合集成电路装置。
通常，混合集成电路装置利用各种电路元件构成电子电路，根据需要装配TR芯片、IC芯片或LSI芯片等有源元件、片状电容器或片状电阻等无源元件。并且，这些电路元件与在装配基板上形成的导电图形电气连接。另外，为了实现电路功能，在导电图形上设置配线，另外，电路元件通过焊料、导电球、焊锡球、导电胶或金属细线进行电气连接。
特别是金属细线根据金属细线连接的电路元件或使用金属细线的电路块的电流容量，分别使用不同的金属细线的材料和/或金属细线的线径。
作为第1例，有用40μm、150μm和300μm的3种Al线电气连接的情况。其理由在于，Al线便宜。
另外，作为第2例，有用40μm的Au线、150μm和300μm的Al线电气连接的情况。其理由在于，Au线的焊接时间比Al线短。Al线通常采用楔形焊接，必须使超声波持续指定时间。另外，大直径的金属细线如果采用Au线，由于线直径粗，价格高，所以从成本方面考虑，采用Al线。
另外，TR、IC、LSI等半导体元件，芯片表面的焊接点小，通常采用Au线。但是，流过大电流的功率晶体管、功率MOS、IGBT、SIT、半导体开关元件等由于芯片本身大、电流容量也大，所以，焊接点的尺寸也大，考虑成本，采用Al线。
如上所述，根据电流容量、成本、焊接所需要的面积、强度或焊接的半导体元件的种类等来选择金属细线的材料及金属细线的线径。
本发明的关键在于，通过将封装的半导体装置固定到装配基板上，来减少连接到装配基板上的金属细线的种类。
例如，如果按照第1例所述，具有首先另外准备40μm的Al线和用该40μm的Al线连接的半导体元件成为1个组件的半导体装置的特征。并且，通过用焊料等装配该半导体装置，在装配基板上的金属细线的连接就仅仅是150μm和300μm的Al线，可以全部省略40μm的Al线的连接。
根据组装方法不同，焊接装置也有分别随3种线径而不同的情况。这时，混合集成电路装置的组装具有可以全部省略将装配基板向40μm用的焊接装置上放置的工序和进行焊接的工序的优点。特别是将装配基板向焊接装置上放置的作业需要流水作业线，结构组装工序将延长。
另外，在第2例中，关键在于另外准备40μm的Au线和用该40μm线连接的半导体元件成为1个组件的半导体装置。并且，通过用焊料等装配该半导体装置，在装配基板上可以省略Au线的连接，而只留下150μm和300μm的Al线的焊接工序。
Au线的焊接方法与Al线的焊接方法不同，焊接装置也不同。因此，如果Au线的连接全部将所需要的部分形成组件，在混合集成电路装置的组装工序中，Au线的焊接将完全不需要了。因此，混合集成电路装置就只需要Al线的焊接，从而具有可以减少装配工时的优点。
另外，虽然是特殊的例子，但是，如果所有的金属细线与半导体装置一起形成组件，在混合集成电路装置的组装工序中，就只是装配半导体装置的工序了，金属细线的焊接可以全部省略。
本发明考虑了各种组合，分别具有各自的效果，下面进行简单说明。
第1组合：在装配基板上采用N种线径不同的金属细线。
通过将至少1种金属细线和该金属细线连接的半导体元件形成组件，在装配基板上的金属细线的连接仅(N-1)种金属细线的连接就可以了。如图1所示，在1个组件中，至少封装进了1个半导体元件。另外，作为混合型，也可以装配无源元件或IC芯片。
第2组合：在装配基板上采用N种金属细线的材料。
通过将至少1种金属细线和该金属细线连接的半导体元件形成组件，在装配基板上的金属细线的连接仅(N-1)种金属细线的连接就可以了。如图1所示，准备采用了Au线的组件，在装配基板侧，仅进行Al线的焊接。也可以准备采用了Al线的组件，而在装配基板侧仅进行Au线的焊接。
第3组合：金属细线的有N种，各种材料的金属细线采用多个线径。
以简单的组合进行说明。
材料Al    线径300μm、200μm、150μm
材料Au    线径40μm
这时，将材料和线径组合时，就成为4种。因此，在这4种金属细线内，通过将至少1种金属细线形成上述组件，在装配基板侧就可以采用3种以下的金属细线。
另外，可以大幅度降低向装配基板上配置的元件的焊接片的传送损失。在图20所示的先有的装配基板上，必须放置到各种地方，从而必须将元件移动到指定的位置。但是，如果采用本发明的半导体装置，由于多种半导体装置形成1个组件，所以，一次便可传送多个元件。
下面，参照图1说明采用40μ的Au线、150μm的Al线和300μm的Al线的混合集成电路装置。
该混合集成电路装置13至少由装配到装配基板10上的导电图形21、固定在其上的裸芯片40及41、无源元件23及24、形成组件的半导体装置30A、31A、32、33A、34A、38和用于作为电路而连接的金属细线42及43构成。
导电图形21由例如缓冲垫21A、配线21B、焊接片21C、无源元件用的电极21D、固定半导体装置30A、31A、32、33A、34A和38的电极21E、与其一体的配线21B(由于图面的关系，示于图2)和外部引线等用的外部连接电极21F构成。另外，裸芯片40是BIP型的功率晶体管，裸芯片41是功率MOS。无源元件23是片状电阻，无源元件24是片状电容器。此外，金属细线42是大直径(300μm)的Al线，金属细线43是小直径(150μm)的Al线。
本发明的特征在于上述半导体装置30A、31A、32、33A、34A和38。该半导体装置用粗线将外形包围来表示。这里，将图19所示的电路作为一例来采用，将小信号系列的电路以各种规模形成组件。即，小信号系列使用的金属细线可以用小直径，该小直径的金属细线和半导体元件全部形成1个组件，作为半导体装置而进行装配。因此，通过装配半导体装置，在装配基板上的组装作业就完全不需要小直径的焊接了。另外，由于将多个半导体元件形成组件，所以，具有可以大幅度削减焊接点个数的特征。另外，在半导体装置中也可以装配无源元件。假定也包含无源元件形成1个组件时，可以减少无源元件的装配次数。
另外，在组装工序中，不需要Au的焊接装置，从而也就不需要装配基板向焊接装置上的安放作业。
下面，参照图2～图19说明形成1个组件的半导体装置。这里，以图1的右下角的半导体装置38为例进行说明。
图2是半导体装置38的平面图，图3是说明该薄型半导体装置38的装配结构的3种类型的图。此外，图4～图9是说明该半导体装置的制造方法的图，图10～图18是说明根据右侧的电路形成的半导体装置的图，图19是说明在装配基板10上构成的电路的图。
半导体装置的说明
在图9中，符号53所示的半导体装置是在本发明中采用的半导体装置。首先，参照图9A说明第1半导体装置53A的具体的结构。该半导体装置53A具有埋入到绝缘性树脂50中的导电路51A～51C，半导体芯片52A固定在上述导电路51A上，另外，根据需要，无源元件52B固定到导电路51B、51C上。并且，由上述绝缘性树脂50支持导电路51A～51C。
本结构由半导体芯片52A、由无源元件和/或有源元件构成的电路元件52B、多个导电路51A、51B及51C和将该导电路51A、51B及51C埋入其中的绝缘性树脂50等3种材料构成，在导电路51间设置了用该绝缘性树脂50填充的分离沟54。并且，利用绝缘性树脂50支持上述导电路51A～51C。
作为绝缘性树脂，可以使用环氧树脂等热硬化性树脂、聚酰亚铵树脂、硫化聚苯等热可塑性树脂。另外，绝缘性树脂只要是可以使用模具强固的树脂、能进行浸渍或涂布而被覆的树脂，所有的树脂都可以采用。另外，作为导电路51，可以使用以Cu为主材料的导电箔、以Al为主材料的导电箔或由Fe-Ni等合金构成的导电箔、Al-Cu的积层板、或Al-Cu-Al的集层板等。特别是Al-Cu-Al是抗弯曲能力很强的结构。当然，也可以是其他的导电材料，特别是可以蚀刻的导电材料、可以利用激光而蒸发的导电材料，或者可以通过冲压而形成分离沟54的比较软的物质。
另外，半导体元件52A和电路元件52B的连接手段是金属细线55A、由焊料构成的导电球、扁平的导电球、焊锡等焊料55B、Ag胶等导电胶55C和导电被覆膜或各向异性导电性树脂等这些连接手段根据半导体元件及电路元件52的种类和装配形式进行选择。例如，如果是裸的半导体芯片，表面的电极与导电路51B的连接就选择金属细线55A，如果是CSP及SMD，就选择焊锡球或焊锡突起。另外，片状电阻和片状电容器就选择焊锡55B。如果面朝下装配时，由于金属细线不会从芯片中露出，所以实际上可以形成接近芯片尺寸的组件。
另外，半导体元件52A与导电路51A的固定，采用导电被覆膜。这里，该导电被覆膜至少有1层。
作为该导电被覆膜，可以考虑的材料是Ag、Au、Pt、Pd或焊料等，利用蒸发、溅射、CVD等的低真空或高真空下的镀膜、电镀、烧结或涂布等方法进行被覆。
例如，Ag与Au胶合，或者也与焊料胶合。因此，如果Au被覆膜被覆到芯片背面，通过直接将Ag被覆膜、Au被覆膜、焊锡被覆膜被覆到导电路51A上，便可将半导体芯片进行热压固定，另外，也可以通过焊锡等焊料将芯片固定。这里，上述导电被覆膜可以在集层为多个层的导电被覆膜的最上层形成。例如，可以在Cu的导电路51A之上形成顺序被覆Ni被覆膜、Au被覆膜的2层导电被覆膜、顺序被覆Ni被覆膜、Cu被覆膜、焊锡被覆膜的3层导电被覆膜，或者顺序被覆Ag被覆膜、Ni被覆膜的2层导电被覆膜。导电被覆膜的种类和集层结构除了上述情况以外，还有很多种，这里将省略了。
本半导体装置53A使用作为密封树脂的绝缘性树脂50支持导电路51，所以，不需要粘合支持导电路的支持基板，由导电路51、元件52和绝缘性树脂50构成。该结构是本发明的特征。先有的电路装置的导电路使用支持基板(印刷电路板、陶瓷基板或软性板)支持而粘合，或者使用引线框架进行支持，所以，附加了本来不需要的结构。但是，本半导体装置由所需最小限度的要素构成，可以不需要支持基板，具有薄型而廉价的特征。
另外，除了上述结构外，还具有覆盖电路元件52并且填充在上述导电路51间的上述分离沟54中而一体地支持的绝缘性树脂50。
该导电路51之间成为分离沟54，通过绝缘性树脂50填充到其中，具有实现相互绝缘的优点。
另外，具有将元件52覆盖并且填充在导电路51间的分离沟54中使导电路51的背面露出而一体地支持的绝缘性树脂50。
使该导电路的背面露出，是本发明的特征之一。导电路的背面可以提供与外部的连接，具有可以不需要在采用支持基板的印刷电路板中所采用的通孔的特征。
而且，半导体元件52A通过焊料、Au、Ag等导电被覆膜直接固定时，由于露出导电路51的背面，所以，可以将半导体元件52A发生的热通过导电路51A向装配基板传递。特别是通过放热，对于可以改善驱动电流的上升等特性的半导体芯片是有效的。这就是本半导体装置53A的关键，关于这一点，后面进行说明。
另外，本半导体装置53A是分离沟54与导电路51的背面实际上一致的结构。本结构是本发明的特征，在导电路51的背面不设置台阶，所以，具有可以使半导体装置53直接在水平方向移动的特征。
另外，本发明为了实现装配基板和多层结构，涂布了焊锡抗蚀剂等绝缘被覆膜RF。并且，通过使导电路51的一部分露出，使装配基板10的配线延伸到半导体装置53A的背面。本半导体装置通过固定到装配基板10上，导电路51、金属细线55A就起先有的跨越线的作用，实现了多层结构。关于这一点，在后面进行说明。
此外，如图10～图18所示，本发明将采用小直径的金属细线的小信号系列的半导体元件和/或无源元件形成组件。由于是小信号系列，金属细线采用小直径的Al或Au线。这里，采用40μm的Au线。
下面，说明采用该Au线的理由。
其理由在于，绝缘性树脂是利用转移模塑进行封装的，而Au对注入压力的耐变形性优异。Al线通过楔形焊接而连接，颈部脆弱，另外，焊接区域必须比Au大，从而具有半导体装置的尺寸的增大的缺点。此外，由图1及图20可知，Al线相对楔形焊接部的引出方向是固定的。而Au线是球形焊接，线的引出方向可以是自由的，焊接速度比Al快，另外，对焊接的导电路的位置没有限制，具有可以自由配置的优点。因此，可以将作为焊接点的导电路的位置配置到空闲区域，从而可以缩小半导体装置。
半导体装置53B的说明
图9B所示的半导体装置53B的导电路51的背面结构与图9A所示的半导体装置51A不同，除此以外，实际上是相同的。这里，仅说明该不同的部分。
由图可知，导电路51的背面比绝缘性树脂50的背面(填充在分离沟54中的绝缘性树脂50的背面)凹进去一些。通过采用这样的结构，可以实现多层配线。详细情况，在后面说明。
半导体装置53C的说明
图9C所示的半导体装置53C的导电路51的背面结构与图9A、图9B所示的半导体装置51A、51B不同，除此以外，实际上是相同的。这里，仅说明该不同的部分。
由图可知，导电路51的背面比绝缘性树脂50的背面(填充在分离沟54中的绝缘性树脂50的背面)突出。通过采用这样的结构，可以实现多层配线。详细情况，后面说明。
半导体装置53A～53C的制造方法的说明
下面，参照图4～图9说明半导体装置53的制造方法。
首先，准备图4所示的片状的导电箔60。该导电箔60考虑焊料的附着性、焊接性、电镀性来选择其材料，作为材料，可以采用以Cu为主材料的导电箔、以 Al为主材料的导电箔或由Fe-Ni的合金构成的导电箔、Al-Cu的集层体、Al-Cu-Al的集层体等。
导电箔的厚度，考虑到后面的蚀刻，最好约为35μm～300μm，这里，采用70μm(2盎司)的铜箔。但是，大于300μm、小于10μm基本上也是可以的。如后面所述，只要能形成比导电箔60的厚度浅的分离沟61就行。
片状的导电箔60可以准备成以指定的宽度卷成滚筒状并向后面所述的各工序传送，也可以准备裁剪成指定的大小的导电箔而向后面所述的各工序传送(以上，参见图4)。
然后，有将除了至少成为导电路51的区域的导电箔60除去一层比导电箔60的厚度薄的工序。
首先，在Cu薄60之上形成感光性树脂(耐蚀刻掩膜)PR，将感光性树脂PR形成使除了成为导电路51的区域的导电薄60露出的图形(以上，参见图5)。并且，可以通过上述感光性树脂PR进行蚀刻(以上，参见图6)。
通过蚀刻而形成的分离沟61的深度为例如50μm，由于其侧面成为粗糙面，所以，提高了与绝缘性树脂50的粘接性。
另外，该分离沟61的侧壁成为随除去方法而不同的结构。该除去工序，可以采用湿腐蚀、干腐蚀、利用激光的蒸发和切割等方法。另外，也可以通过冲压而形成。利用湿腐蚀时的蚀刻，主要采用氯化铁或氯化铜，上述导电箔浸渍到该腐蚀液中，或用该腐蚀液进行喷射。这里，湿腐蚀通常非各向异性地进行腐蚀，所以，侧面如图6B所示的那样成为弯曲结构。
另外，在利用干腐蚀时，可以按各向异性和非各向异性进行腐蚀。现在，不能用反应性离子腐蚀除去Cu，但是，可以利用溅射方法除去。另外，可以根据溅射的条件不同而按各向异性和非各向异性进行腐蚀。
另外，在利用激光时，可以通过直接照射激光而形成分离沟，这时，不管哪边分离沟61的侧面都是笔直的。
另外，在利用切割方法时，不可能形成弯曲的复杂的图形，但是，可以形成格子状的分离沟。
在图6中，也可以选择性地被覆对腐蚀液有耐腐蚀性的导电被覆膜来取代感光性树脂PR。如果选择性地被覆到成为导电路的部分，该导电被覆膜就成为腐蚀保护膜，从而不采用抗腐蚀剂就可以腐蚀出分离沟。可以考虑作为该导电被覆膜的材料是Ni、Ag、Au、Pt或Pd等。而且，这些耐腐蚀性的导电被覆膜具有可以直接作为缓冲垫和焊接片使用的特征。
例如，Ag被覆膜与Au胶合，或者也与焊料胶合。因此，如果Au被覆膜被覆到芯片背面，可以直接将芯片热压固定到导电路51上的Ag被覆膜上，另外，也可以通过焊锡等焊料将芯片固定。另外，由于Au细线可以与Ag的导电被覆膜粘接，所以，也可以进行丝焊。因此，具有可以将这些导电被覆膜直接作为缓冲垫、焊接片使用的优点(以上，参见图6)。
然后，有图7所示的将电路元件52与形成了分离沟61的导电箔60电气连接而装配的工序。
作为电路元件52，是晶体管、二极管、IC芯片等半导体元件52A、片状电容器、片状电阻等无源元件52B。另外，虽然厚度将增大，但是，也可以装配CSP、BGA、SMD等面朝下型的半导体元件。
这里，作为裸的半导体芯片，晶体管芯片52A可以焊接到导电路51A上，发射极和导电路51B、基极和导电路51B在利用热压的球形焊接中，使用Au线55A进行连接。
另外，也可以采用利用超声波的楔形焊接等进行固定的Al线。另外，52B是片状电容器等无源元件和/或有源元件，这里，采用片状电容器，使用焊锡等焊料或导电胶55B进行固定。
此外，如图8所示，还有将绝缘性树脂50附着到上述导电箔60和分离沟61上的工序。这可以利用转移模塑、注入模塑或浸渍方法而实现。作为树脂材料，环氧树脂等热硬化性树脂利用转移模塑可以实现，聚酰亚铵树脂、硫化聚苯等热可塑性树脂利用注入模塑可以实现。
在本实施例中，被覆到导电箔60表面上的绝缘性树脂的厚度调整为从电路元件的最顶部开始大约被覆100μm厚。该厚度考虑强度后可以增厚，也可以减薄。
本工序的特征在于，在被覆绝缘性树脂50之前，作为导电路51的导电箔60是支持基板。例如，在采用印刷电路板或软性板的CSP中，是采用本来不需要的支持基板(印刷电路板或软性板)形成导电路的，但是，在本发明中，作为支持基板的导电箔60是作为导电路所需要的材料。因此，具有可以尽可能节省构成材料而进行作业的优点，从而可以降低成本。另外，在切割线的地方没有导电箔，所以，可以防止刀口堵塞。此外，将采用陶瓷基板的组件进行模压并切割时，刀口的破坏和磨损非常厉害，但是，在本发明中，由于仅切割树脂，所以，具有可以延长刀口的寿命的优点。
另外，分离沟61形成为比导电箔的厚度浅的沟，所以，导电箔60作为导电路51并不各个分离。因此，作为薄片状的导电箔60，一体地从电路元件的装配到切割处理特别是模塑绝缘性树脂时，具有模具的传送和模具的装配作业非常轻松的特征(参见图8)。
然后，有对导电箔60的背面进行化学的和/或物理的去除从而分离出导电路51的工序。这里，该去除工序通过研磨、研削、腐蚀、激光的金属蒸发等方法进行。
在实验中，利用研磨装置或研削装置将整个面研磨到约30μm厚，使绝缘性树脂50从分离沟61中露出。该露出的面在图8中用虚线表示。另外，如图9A所示，为了使装配基板上的配线延伸，在半导体元件53A的背面形成绝缘被覆膜RF。结果，就分离为约40μm厚的导电路51。
另外，如图9B所示的那样，由于绝缘性树脂50露出，并且采用导电路51的背面比绝缘性树脂50的背面凹进去的结构，所以，也可以将导电箔60进行全面腐蚀。
此外，也可以如图9C所示的那样，在导电路的背面形成耐腐蚀掩膜，通过腐蚀而使导电路的一部分露出。这时，导电路51比绝缘性树脂50的背面突出。
无论是哪种结构，都是导电路51的背面从绝缘性树脂50露出的结构。并且，分离沟61被切削成分离沟54(以上，参见图9)。
最后，根据需要将焊锡等导电材料被覆到露出的导电路51上，进而考虑到装配基板的多层结构，根据需要将绝缘性树脂被覆到半导体装置53的背面，从而完成半导体装置。
在将导电被覆膜向导电路51的背面被覆时，也可以预先在图4的导电箔的背面形成导电被覆膜。这时，可以选择性地被覆与导电路对应的部分。被覆方法例如是电镀。另外，该导电被覆膜可以是对腐蚀具有耐蚀性的材料。另外，采用该导电被覆膜或感光性树脂时，不进行掩膜而只进行腐蚀就可以分离为导电路51，从而可以实现图9C的结构。
在本制造方法中，只将半导体芯片和片状电容器装配到导电箔60上，但是，也可以把它作为1个单位配置成矩阵状。
另外，作为有源元件(半导体芯片)，也可以装配1个晶体管、二极管、IC或LSI一个一个进行，形成分立型(参见图13～图14)。
另外，也可以装配多个上述有源元件，作为复合型的半导体装置(参见图11、图12、图14)。
此外，作为有源元件(半导体芯片)，装配晶体管、二极管、  IC或LSI，作为无源元件，装配片状电阻和片状电容器，作为导电路，通过形成配线，也可以构成为混合IC型(参见图10、图12、图16、图17、图18)。
并且，配置成矩阵状时，在分离导电路后，可以利用切割装置分离为一个一个的组件。
利用以上的制造方法，导电路51埋入到绝缘性树脂50中，从而可以实现绝缘性树脂50的背面与导电路51的背面实际上一致的平坦的半导体装置53。
本制造方法具有可以将绝缘性树脂50作为支持基板灵活运用并能够进行导电路51的分离作业的特征。绝缘性树脂50作为将导电路51埋入的材料是必须的材料，不必采用不需要的支持基板。因此，可以用最小限度的材料进行制造，从而具有可以实现成本降低的特征。
在导电路51表面上形成的绝缘性树脂的厚度，可以在绝缘性树脂附着时进行调整。因此，随装配的电路元件而不同，但是，作为半导体元件53的厚度，具有可厚可薄的特征。这里，是形成40μm的导电路51和半导体元件埋入400μm厚的绝缘性树脂50中的半导体装置。
装配基板上的装配结构的说明
下面，参照图2和图3说明本发明的混合集成电路装置。图2是混合集成电路装置的平面图，图3是沿图2的A-A线的剖面图。将图9A的半导体装置53A、图9B的半导体装置53B和图9C的半导体装置53C固定到装配基板上的结构示于图3A、图3B和图3C。
首先，说明装配基板10。作为装配上述半导体装置53的装配基板10，可以考虑印刷电路基板、陶瓷板、软性薄板或金属基板。该装配基板10在表面形成了导电图形21，所以，考虑到电气的绝缘，至少基板的表面进行绝缘处理。印刷电路板、陶瓷板、软性薄板等基板本身就是由绝缘材料构成的，所以，可以在其表面直接形成导电图形21。但是，在使用金属基板时，至少其表面要被覆绝缘材料，然后再在其上形成导电图形21。在本实施例中，令在装配基板10上形成的导电图形为导电图形21，令由半导体装置53的绝缘性树脂50支持的导电图形为导电路51，将两种导电图形加以区别而进行说明。
由图1可知，在导电图形21中，设置了缓冲垫21A、配线21B、焊接片21C、固定片状电阻23和片状电容器24的电极21D、固定本半导体装置53的电极21E(由于在图1中难于判别，分别示于图2和图3)以及根据需要而设置的外部连接电极21F。固定本半导体装置53的电极21E和与其一体的配线21B在图2中用粗的实线表示。
另一方面，在半导体装置53中，在由绝缘性树脂50支持的导电路51中，有固定半导体芯片52A的导电路51A、成为焊接片的导电路51B和与导电路51A及51B一体设置的成为配线的导电路51E。
另外，图2的椭圆形的部分是表示在半导体装置53的背面与装配基板10上的电极21E电气连接的接触部24。并且，利用该接触部24和图3A～图3C所示的背面结构，装配基板10的配线21B在半导体装置53的背面可以延伸。
半导体装置53的结构已说明过了，所以，此处省略详细的说明。
图3A所示的半导体装置53A的背面结构
在本半导体装置53A的背面设置了绝缘被覆膜RF，上述接触部24通过该绝缘被覆膜RF而露出。由图8和图9可知，本半导体装置53本来是所有的导电路从背面露出的结构，但是，通过采用绝缘被覆膜RF，可以将导电路51覆盖。
因此，具有可以使在装配基板10上形成的配线21B在半导体装置53的背面延伸的特征。
本发明的第1个特征在于，作为半导体装置53，由绝缘性树脂50密封，固定半导体芯片52A的导电路51A与装配基板10上的导电路21固定在一起。
由图3的剖面图可知，在半导体芯片52A上发生的热通过导电路51A向装配基板10上的导电路21E放热。由于导电路21E是导电材料，热传导性能优异，所以，可以将半导体芯片52A的热向装配基板10侧传导。另外，传导给金属细线55A的热也可以通过尺寸比较大的立方体的导电路51B向导电路传导。这些导电路21与配线21B成为一体，所以，热就通过配线21B向外部环境放出。因此，可以防止半导体芯片52A的温度上升，与可以抑制半导体芯片的温度上升相应，可以增大驱动电流。
特别是用金属基板构成装配基板10时，可以将半导体芯片52A的热通过导电路21向金属基板传导。该金属基板作为大的散热片，起放热板的作用，从而可以比上述其他的装配基板更能防止半导体芯片的温度上升。
在采用金属基板时，考虑到导电路间的短路问题，在表面涂敷绝缘材料，作为绝缘材料，可以是无机物也可以是有机物。这里，采用环氧树脂和聚酰亚铵树脂等。该材料形成为薄薄的30～300μm厚，所以，可以使热阻比较小，此外，通过将二氧化硅、氧化铝等填充物混合到绝缘性树脂中，可以进一步减小热阻。
第2个特征在于绝缘被覆膜RF。通过被覆绝缘被覆膜RF，以使上述接触部24露出，可以使配线21B延伸到半导体装置53A之下。因此，通过利用半导体装置53A的导电路51和金属细线55A，可以实现多层配线结构，从而可以简化装配基板10上的配线。图20所示的先有的混合IC和图1所示的混合IC，其基板尺寸设计为相同的尺寸。比较它们的图形时，本发明的混合IC一方的配线图形的间隔宽，细的图形少了。这是由于半导体装置53侧的导电路51通过绝缘被覆膜RF的开口部与装配基板10上的导电图形21连接、而除此以外的部分则由绝缘被覆膜RF所覆盖的缘故。该导电路也可以作为配线而形成，所以，可以交叉，从而可以与金属细线一起实现多层结构。因此，在将元件装配到装配基板上的工序中，如果预先准备了半导体装置，就可以减少在装配基板上采用的交叉用的焊接次数。此外，在装配基板上，也可以减少为了避免交叉的复杂的配线图形。
此外，第3个特征在于金属细线，具有可以减少焊接工序的特征。在图20的混合IC中，分为处理小信号的半导体元件和处理大信号的半导体元件，从而将线径不同的金属细线分开使用。即，处理小信号的半导体元件用的金属细线用细的实线表示，采用40μm的Au线。并且，该Au线进行球形焊接。另外，处理大信号的半导体元件用的金属细线用粗线表示，采用100μm～300μm的Al线。这里，作为功率MOS的栅极用的跨越线，采用150μm的Al线，作为功率MOS的源极、功率晶体管的基极、发射极用的跨越线，采用300μm的Al线。并且，这些Al线进行楔形焊接。另外，也可以采用Au线来取代Al线。
本发明的特征在于，半导体装置是将Au线连接的半导体元件、Au线连接的焊接点、与焊接点一体地延伸的配线51E和缓冲垫用绝缘性树脂50一体地封装而形成的。
采用该Au的金属细线的半导体元件通过全部作为半导体装置53而预先进行准备，在装配基板10上的Au的焊接就不需要了，从而具有可以削减焊接工序的优点。此外，也可以大幅度地减少包含该半导体元件的电路元件的装配次数。另外，以往，通过采用上述3种金属细线而准备3种连接器，各个连接器都必须进行焊接，但是，在本发明中，具有可以省略Au线的连接器的优点。因此，可以简化设备，而且装配基板仅放置到2种连接器上就行了，从而可以简化工序。
特别是半导体装置既可以作为分立元件而形成，也可以作为复合元件而形成，此外，还可以作为混合IC而形成，在理论上，可以将所有的电路元件封装为半导体装置，从而可以大幅度地减少向装配基板上的元件固定数。
第5个特征是，可以采用大小为0.45×0.5mm、厚度0.25mm等小的半导体元件，从而可以降低成本。
如在先有例中说明的那样，即使想采用价格便宜的小的芯片，以往在0.45×0.5mm、厚度0.25mm的小的芯片上，焊锡将扩散到芯片的侧面，从而存在短路的问题。
但是，在本发明中，将Au突起被覆到半导体芯片52A上，通过该突起将导电路51和半导体芯片52A固定，在作为半导体装置53而完成之后，固定到装配基板10上。因此，即使使用焊锡固定本半导体装置53，因为半导体芯片52A的侧面也由绝缘性树脂50所被覆，所以，不存在上述短路的问题，从而可以采用尺寸小的半导体芯片。
图3B所示的半导体装置53B的背面结构
本半导体装置53B与图3A的半导体元件53A实际上是相同的，所不同的地方，就是在半导体装置53B的背面露出的导电路51比绝缘性树脂50凹进去。
本发明的特征，就在于上述导电路51的凹陷。由于该凹陷，半导体装置53B的导电路51与上述装配基板10侧的导电图形21可以具有所希望的间隔。因此，和半导体装置53A一样，配线21B可以延伸到半导体装置53B之下。于是，通过利用半导体装置53B的导电路51、金属细线55A，可以实现多层配线结构，从而可以简化装配基板10上的配线。
此外，和半导体装置53A一样，也可以将绝缘被覆膜RF被覆到背面。
图3C所示的半导体装置53C的背面结构
本半导体装置53C与图3A、图3 B的半导体元件53A、53B实际上是相同的，所不同的地方，就是在半导体装置53B的背面露出的导电路51比绝缘性树脂50突出。
本发明的特征，就在于上述导电路51的突出。该突出结构可以在半导体装置53C的导电路51和上述装配基板10侧的导电图形21上设置所希望的间隔。因此，和半导体装置53A、53B一样，配线21B可以延伸到半导体装置53C之下。于是，通过利用半导体装置53C的导电路51、金属细线55A，可以实现多层配线结构，从而可以简化装配基板10上的配线。
此外，和半导体装置53A一样，也可以将绝缘被覆膜RF被覆到背面。
下面，参照图10～图18说明采用图19在本混合集成电路装置中采用的电路和在该电路中作为半导体装置而构成的部分。
图19是音频电路，从左开始，将音频放大1信道电路部、音频放大2信道电路部、切换电源电路部用粗的虚线包围表示。
另外，在各个电路部中，用实线包围的电路形成为半导体装置。首先，在音频放大1信道电路中，准备了3种半导体装置和与2信道电路部成为一体的2个半导体装置。
如图19所示，第1半导体装置30A是由TR1、TR2构成的电流镜电路与由TR3、TR4构成的差动电路成为一体的结构。该半导体装置30A示于图10。这里，0.55×0.55×0.24mm的晶体管芯片采用4个，用Au细线进行焊接。此外，半导体装置30A的尺寸为2.9×2.9×0.5mm。
另外，用虚线所示的接触部是φ0.3mm。图中所示的数字是端子号码，B、E表示基极和发射极。这些符号，在图11以后也是一样的。
第2半导体装置31A利用图19的TR6、D2构成预驱动器电路一部分。预驱动器电路由TR6、D2、R3、R8构成，驱动输出级的TR9和TR10。该半导体装置31A示于图11，二极管D2采用2个TR用1个芯片构成的半导体芯片，利用基极·发射极间的PN结而形成。这里，D2的芯片尺寸为0.75×0.75×0.145mm，TR6的芯片尺寸为0.55×0.55×0.24mm，半导体装置31A的外形尺寸为2.1×2.5×0.5mm。
第3半导体装置32构成用于对于电源电压的变化而在差动电路中流过稳定的电流的差动恒定电流电路，由图19的TR5、TR15、D1构成。此外，D1是差动电路和预驱动器电路的恒定电流旁路二极管。该半导体装置32示于图12，TR5、TR15的尺寸为0.55×0.55×0.24mm，D1的尺寸为0.75×0.75×0.145mm，半导体装置32的外形尺寸为2.1×3.9×0.5mm。
第4半导体装置33A是图19所示的温度补偿晶体管TR8，对装配基板的温度变化补偿空载电流。该TR8由图13所示的1个芯片半导体元件(0.75×0.75×145mm)构成。用它形成半导体装置33A时，其外形尺寸为2.3×1.6×0.5mm。
第5半导体装置34是由图19的TR7、R6、R7构成的预驱动器恒定电流电路的TR7和构成音频放大2信道电路部的预驱动器恒定电流电路的TR17的2个芯片成为1个组件。如图14所示，该半导体装置34A的单个的晶体管(0.55×0.55×0.24mm)成为双连结构，其外形尺寸为2.3×3.4×0.5mm。
此外，双连结构的半导体装置34A也可以个别地构成。这时，采用仅封装图15所示的1个芯片的半导体装置35。该半导体装置35的外形尺寸为2.3×1.6×0.5mm。
另外，图19所示的30B、31B、33B是和30A、31A、33A相同的电路，所以，省略其说明。
此外，TR9、TR10是输出级功率晶体管，R1、C1和C2是防止发生异常振荡用的元件。
另一方面，图19的左侧是音频放大一通道，中间是音频放大二通道，其右侧所示的切换电源电路部由电源电压切换电路、电源电压切换用比较电路、高频补偿电路和整流用二极管等构成，电源电压切换电路由TR41、TR51、R41、R43、R51、R53构成，电源电压切换用比较电路由TR43、TR53、R40、R42、R50、R52构成，高频补偿电路由二极管D45、D55、C43、C53构成，整流用二极管由二极管D42、D43、D52、D53构成。
第6半导体装置36，在图19的电源电路中，二极管D42、D43和齐纳二极管D45成为1个组件。作为半导体装置而装配的半导体芯片由TR芯片构成，由基极·集电极间的PN结构成二极管D42、D43。另外，在图16中，用虚线包围的TR和齐纳二极管用1个芯片装配，D45利用该元件的齐纳二极管。另外，为了补偿由于齐纳二极管的温度上升引起的电压降低，利用一起内藏的TR的基极·发射极间二极管。
此外，带齐纳的TR的外形尺寸为0.6×0.6×0.24mm，其他的TR的外形尺寸为0.35×0.35×0.24mm。并且，封装它们的组件的外形尺寸为1.9×4.4×0.5mm。
第7半导体装置37，在图19的电源电路中，二极管D52、D53和齐纳二极管D55成为1个组件。作为半导体装置而装配的半导体芯片其与D53和D52对应的晶体管为PNP型，构造上有些不同，装配形式和图16实际上一样。
图18的第8半导体装置38的图16、图17的电路和TR43、TR53成为1个组件。此外，封装它们形成的组件的外形尺寸为4×5.7×0.5mm。并且，该半导体装置38作为图1、图2的半导体装置53而进行装配。
如上所述，本半导体装置可以由装配1个TR的分立型或装配多个TR而构成所希望的电路的混合IC型构成。这里，仅由TR构成，但是，也可以包含IC、LSI、系统LSI、无源元件而装配多个元件。在实验上，5×5.7×0.5mm是最大尺寸，但是，也可以增加装配的电路元件，而成为比其大的规模。
将这些半导体装置装配到装配基板10上的情况示于图1，与图20的先有型的装配基板相比可知，配线图形简化了。
图21是说明通过采用本发明的半导体装置能减小到多么小的尺寸的图。图示的三张照片倍率相同，从左开始，分别表示采用引线框的单个SMD、采用引线框的复合SMD 以及本发明的半导体装置。单个SMD是1个TR，复合TR是模制了2个TR。本发明的半导体装置构成图10所示的电路，封装了4个TR。由图可知，尽管封装了复合SMD的2倍的元件，本半导体装置的尺寸也仅比包含引线框的复合SMD略大一点。封装了1个TR的图15的半导体装置35示于最右边。由此可知，按照本发明，可以实现小型、薄型的半导体装置，极适合于便携式的电子仪器。
由上述说明可知，在本发明中，通过预先准备将作为混合集成电路装置而采用的多种金属细线中至少1种金属细线和与其连接的半导体元件一体地封装的半导体装置，可以大幅度地减少装配基板的组装工序数。
例如，在采用40μm的Au线、150μm的Al线和300μm的Al线的混合集成电路装置中，将Au线连接的半导体元件也包含Au线作为1个组件固定到装配基板上，所以，在装配基板上的金属细线的连接仅丝焊Al线将可以了。因此，Au线用的丝焊装置在该组装工序中省略了，也省略了该焊接工序。另外，只要容易获得多个半导体元件、由多个半导体元件和多个无源元件成为1个组件的半导体装置，就不需要半导体元件及无源元件的焊接。
因此，组装工序缩短，从而流水作业线也缩短，所以，向用户的交货期缩短，而且制造成本也降低。
另外，通过在本半导体装置的背面被覆绝缘性树脂并使背面的导电路凹陷或突出，便可使设置在装配基板上的配线延伸到半导体装置的背面。因此，可以利用半导体装置的导电路、金属细线和装配基板上的配线实现多层结构。因此，作为装配基板，不采用高价的多层基板就可以构成电子电路。另外，以往，有时也采用2、3、4层…的多层结构，但是，通过采用本半导体装置，可以采用减少层数的装配基板。
另外，由于采用以所需最小限度的半导体元件、导电路和绝缘性树脂的构成的薄型、轻量的电路装置，而且上述半导体元件背面固定的导电路从绝缘性树脂露出，所以，可以提供能与装配基板侧的导电路固定的混合集成电路装置。
因此，可以使内藏的电路元件的热向装配基板侧放热，而且可以提供薄而轻量的混合集成电路装置。
另外，由于导电路的侧面是弯曲结构，所以，即使电路装置全体发热，也可以防止导电路的脱落或翘起。而且，作为混合集成电路装置，具有优异的放热结构，所以，可以抑制电路装置本身的温度上升，从而可以防止导电路的脱落或翘起。因此，可以提高装配了薄型、轻量的电路装置的混合集成电路装置全体的可靠性。
此外，如果采用金属基板作为装配基板，就可以抑制装配的电路装置的放热，从而可以提供流通驱动电流的混合集成电路装置。

Claims (14)

1.一种混合集成电路装置，至少具有：至少表面进行了绝缘处理且有多个导电图形的装配基板；与上述导电图形电连接的半导体元件；焊接上述半导体元件的焊接电极或上述导电图形的金属细线，其特征在于：把将上述金属细线和用上述金属细线焊接的半导体元件封装的半导体装置装配到上述装配基板上。
2.按权利要求1所述的混合集成电路装置，其特征在于：上述金属细线使用材料不同的多种金属细线，至少一种金属细线全部被封装到上述半导体装置中。
3.按权利要求1或权利要求2所述的混合集成电路装置，其特征在于：上述金属细线使用线径不同的多种金属细线，至少一种金属细线全部被封装到上述半导体装置中。
4.按权利要求1所述的混合集成电路装置，其特征在于：所有上述金属细线均被封装到上述半导体装置中。
5.一种混合集成电路装置，在有多个导电图形的装配基板上安装有：安装了第1半导体元件的半导体装置；以及电流容量与上述第1半导体元件不同的第2半导体元件；其特征在于：
上述半导体装置具备：多条导电路；电连接上述导电路和上述第1半导体元件的第1金属细线；以及覆盖上述第1半导体元件、上述导电路、上述第1金属细线并使上述导电路的背面露出的绝缘性树脂；
上述第2半导体元件经由与上述第1金属细线不同的第2金属细线与上述装配基板电连接。
6.按权利要求5所述的混合集成电路装置，其特征在于：上述第1半导体元件是电流容量比上述第2半导体元件小的半导体元件，上述第1金属细线的直径比上述第2金属细线的直径小。
7.按权利要求5所述的混合集成电路装置，其特征在于：上述第1金属细线由Au构成，上述第2金属细线由Al构成。
8.按权利要求5所述的混合集成电路装置，其特征在于：在上述半导体装置中，除上述第1半导体元件之外，还内置了有源元件和/或无源元件。
9.按权利要求5所述的混合集成电路装置，其特征在于：内置于上述半导体装置中的有源元件和/或无源元件经由上述导电路电连接。
10.按权利要求5所述的混合集成电路装置，其特征在于：上述导电路的侧面为弯曲构造。
11.按权利要求5所述的混合集成电路装置，其特征在于：在上述导电路上设置导电覆盖膜。
12.按权利要求5所述的混合集成电路装置，其特征在于：在上述导电路设有导电覆盖膜，上述导电覆盖膜由Ni、Au、Ag或Pd构成，并形成遮檐。
13.按权利要求5所述的混合集成电路装置，其特征在于：
除上述半导体元件之外，有源元件和/或无源元件也与上述导电路电连接并被内置，包含了上述有源元件和/或上述无源元件从而形成电路。
14.按权利要求5所述的混合集成电路装置，其特征在于：
上述导电路由Cu、Al、Fe-Ni合金、Cu-Al的层叠体、Al-Cu-Al的层叠体构成。
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