CN1203739C - 用于印制电路板的互连组件及其制造方法 - Google Patents
用于印制电路板的互连组件及其制造方法 Download PDFInfo
- Publication number
- CN1203739C CN1203739C CNB998105392A CN99810539A CN1203739C CN 1203739 C CN1203739 C CN 1203739C CN B998105392 A CNB998105392 A CN B998105392A CN 99810539 A CN99810539 A CN 99810539A CN 1203739 C CN1203739 C CN 1203739C
- Authority
- CN
- China
- Prior art keywords
- substrate
- contact element
- elastic contact
- height
- interconnecting assembly
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title description 5
- 239000000758 substrate Substances 0.000 claims abstract description 185
- 238000000034 method Methods 0.000 claims abstract description 38
- 239000004065 semiconductor Substances 0.000 claims abstract description 29
- 238000012360 testing method Methods 0.000 claims abstract description 13
- 239000000463 material Substances 0.000 claims description 24
- 239000004642 Polyimide Substances 0.000 claims description 5
- 229920001721 polyimide Polymers 0.000 claims description 5
- 239000012530 fluid Substances 0.000 claims description 4
- 238000000429 assembly Methods 0.000 abstract description 5
- 230000000712 assembly Effects 0.000 abstract description 5
- 235000012431 wafers Nutrition 0.000 description 49
- 239000002184 metal Substances 0.000 description 25
- 238000009826 distribution Methods 0.000 description 22
- 230000008878 coupling Effects 0.000 description 12
- 238000010168 coupling process Methods 0.000 description 12
- 238000005859 coupling reaction Methods 0.000 description 12
- 230000004888 barrier function Effects 0.000 description 11
- 230000015572 biosynthetic process Effects 0.000 description 11
- 239000000523 sample Substances 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 9
- 230000003287 optical effect Effects 0.000 description 8
- 230000032683 aging Effects 0.000 description 6
- 239000011230 binding agent Substances 0.000 description 5
- 230000006835 compression Effects 0.000 description 5
- 238000007906 compression Methods 0.000 description 5
- 238000001514 detection method Methods 0.000 description 5
- 230000002093 peripheral effect Effects 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 4
- 239000011324 bead Substances 0.000 description 3
- 238000005452 bending Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 229910000831 Steel Inorganic materials 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 229920001971 elastomer Polymers 0.000 description 2
- 239000000806 elastomer Substances 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 210000003205 muscle Anatomy 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 239000013536 elastomeric material Substances 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000008676 import Effects 0.000 description 1
- 238000007373 indentation Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000016507 interphase Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000009738 saturating Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
- G01R1/0433—Sockets for IC's or transistors
- G01R1/0441—Details
- G01R1/0466—Details concerning contact pieces or mechanical details, e.g. hinges or cams; Shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/70—Coupling devices
- H01R12/71—Coupling devices for rigid printing circuits or like structures
- H01R12/72—Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures
- H01R12/73—Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07342—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
- G01R1/07378—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate adapter, e.g. space transformers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/50—Fixed connections
- H01R12/51—Fixed connections for rigid printed circuits or like structures
- H01R12/55—Fixed connections for rigid printed circuits or like structures characterised by the terminals
- H01R12/57—Fixed connections for rigid printed circuits or like structures characterised by the terminals surface mounting terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/70—Coupling devices
- H01R12/71—Coupling devices for rigid printing circuits or like structures
- H01R12/712—Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit
- H01R12/714—Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit with contacts abutting directly the printed circuit; Button contacts therefore provided on the printed circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/02—Contact members
- H01R13/22—Contacts for co-operating by abutting
- H01R13/24—Contacts for co-operating by abutting resilient; resiliently-mounted
- H01R13/2407—Contacts for co-operating by abutting resilient; resiliently-mounted characterized by the resilient means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4092—Integral conductive tabs, i.e. conductive parts partly detached from the substrate
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05005—Structure
- H01L2224/05008—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body, e.g.
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/0502—Disposition
- H01L2224/05024—Disposition the internal layer being disposed on a redistribution layer on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/0502—Disposition
- H01L2224/05026—Disposition the internal layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05569—Disposition the external layer being disposed on a redistribution layer on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01051—Antimony [Sb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/70—Coupling devices
- H01R12/82—Coupling devices connected with low or zero insertion force
- H01R12/85—Coupling devices connected with low or zero insertion force contact pressure producing means, contacts activated after insertion of printed circuits or like structures
- H01R12/853—Fluid activated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10568—Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S439/00—Electrical connectors
- Y10S439/948—Contact or connector with insertion depth limiter
Abstract
本发明揭示一种用于印刷电路板的互连组件及其形成方法。本发明的一个例子中,互连组件包括基片、弹性接触元件和制动结构。弹性接触元件设置在基片上且其至少一部分可移至由制动结构限定的第1位置,在该位置,弹性接触元件与另一接触元件机械和电接触。本发明另一例子中,制动结构设置在具有第1接触元件的第1基片上,制动结构限定设置在第2基片上的弹性接触元件的第1位置,在该位置,弹性接触元件与第1接触元件机械和电接触。本发明的其它方面包含形成制动结构的方法及使用该结构以对集成电路及其晶片进行测试的方法。
Description
发明领域
本发明涉及互连组件及制造和使用互连组件的方法,尤其涉及用于以暂时或永久方式与半导体集成电路上的接触元件电接触的互连组件。具体而言,本发明涉及技术和组件,用于互连至半导体器件,以对该半导体器件进行测试和/或老化工序或建立与该半导体器件的永久互连。
发明的背景
在已有技术中,有多种互连组件及制造和使用这些组件的方法。例如通常希望在封装前且最好在从晶片中割出单块电路前,测试半导体晶片上的许多芯片以确定哪些芯片良好。为此,晶片测试器或探测器用于与芯片上的多个分离的接触元件(例如焊盘)形成多个分离的加压连接。以这种方式,可在从该晶片割出单块电路前测试半导体芯片。测试设计成用于确定芯片是否无功能(“坏”)。
常规的晶片测试器或探测器部件是探测插件,多个探测元件连在插件上。探测元件或接触元件的端部产生连至半导体芯片的相应焊盘的加压连接。图1表示已有技术探测插件的一个例子,即互连组件500。探测插脚或接触元件524连至半导体晶片508上的焊盘526。探测接插组件包含多个组装在一起的部件,包括探测插件502、内插器504和空间转换器506。探测插件502通常是印刷电路板,包含至各电元件的电路图形,这些电元件用于对探测的半导体芯片进行电测试。探测插件502上的接触元件510经一系列中介层与焊盘526接触,这些中介层包含图1所示的内插器504和空间转换器506。内插器504在垂直(Z)方向提供弹性、弹簧形定位,以对所有焊盘上的接触元件提供充分接触,而不管中介层中使用的接触元件(例如类似子弹簧的接触元件524)的长度。空间转换器506用于减小间距并且也是设置弹性接触元件的基片。示于图1的探测接插组件500的细节可参阅PCT国际公开号为WO96/38858的PCT专利申请文本。
图2A更详细显示具有基片302的内插器组件300,其上装有包含接触元件312、314、316和318的弹性接触元件。接触元件312和316通过贯穿连接304A从内插器300的一侧电耦合至另一侧,接触元件314和318通过贯穿连接306A电耦合。这些弹性接触元件的例子包括任何数量的各种弹簧类型元件,包含在国际公开号为WO96/38858的PCT申请文件中叙述的元件。内插器用于例如图1所示组件500之类的组件时,弹性接触元件弯曲成压缩状态,从而减小其垂直高度。该弯折状态产生一个力使接触元件驱动至其相应接触点,例如焊盘526。图2B和2C表示已有技术的另一内插器结构。内插器300A包含基片302A。在基片302A的一个表面装有两个弹性接触元件312A和314A。图中未显示基片302A底部的弹性接触元件。基片302A上表面的弹性接触元件由围绕该弹性接触元件312A和312B和槽结构302B加以保护。可从图2C所示的内插器300的俯视图看到上述结构。槽302B保护其中的弹性接触元件但设计成不接触另一基片,槽302C保护弹性接触元件314B但设计成不接触另一基片。
图3A显示已有技术内插器的另一例子。基片334置于互连元件332上,从而互连元件332经孔336延伸。互连元件322由弹性体之类的适当材料338松散地保持在基片中,该弹性体填入孔336中且从支持基片的顶面和底面延伸。图3B说明已有技术另一个内插器结构,在该结构中孔336中的互连元件例如通过焊接安装在基片364的孔366的中部。
图4说明已有技术的另一互连组件。该互连组件有时称为捆绑式连接器400。如图4所示,在基片401上设置两个接触元件406和407,以便与设置在另一基片402上的另两个接触元件408和409接触。中间层403包含孔404和405。孔404位于接触元件406和408之间,孔405位于接触元件407和409之间。各孔包含弹性材料,用于使各自的接触元件之间相互接触,如图4所示。基片401和402压在一起时,接触元件或焊盘406和408相互靠近移动,接触元件407和409也同样动作。当各元件与中间层403机械接触时,移动停止,通过设置在两个接触元件之间的各自的导电弹簧建立电接触。
从上述讨论可见,使用弹性接触元件与焊盘或其它接触元件接触在垂直方向或Z方向顾及裕量,以便如果不是全部也是多数接触元件能够接触,即使其长度稍有改变。但是,当弹性接触元件在垂直方向过渡压缩时,这种裕量有时导致弹性接触元件损坏。图2B和2C及图3A所示的组件,可能有助于保持弹性接触元件,但它们没有也不试图限定所有接触元件均已在垂直方向接触的位置。图4的捆绑式连接器通过防止基片401和402过份靠近,有助于保护弹性接触元件。但该组件要求各层中要有多个孔且每个孔包含并支持一个弹簧,从而其结构相对复杂。
因此。希望提供一种改进的互连组件,具有弹性接触元件特点带来的优点,Z向没有太多会产生弹性接触元件过弯折或损坏的裕量。这对大配合面积上(如在半导体晶片中)的互连尤重要,这种情况下裕量使互连元件的受控弯折困难。
发明概要
本发明提供多个互连组件及制造和利用这些组件的方法。在本发明的一个例子中,互连组件包括基片和弹性接触元件,该弹性接触元件至少其一部分可移至第1位置。弹性接触元件设置在基片上。制动结构也设置在基片上,限定弹性接触元件与另一接触元件机械和电接触的第1位置。
在该例子中,通常另一接触元件设置在另一基片上且制动结构限定当弹性接触元件与另一接触元件机械和电接触时,该基片与另一基片间的最小间隙。
根据本发明的另一例子,互连组件包括第1基片和设置在第1基片上的第1接触元件。制动结构限定弹性接触元件与第1接触元件机械和电接触时,设置在第2基片上的第1弹性接触元件的第1位置。弹性接触元件压缩时,其至少一部分通常可移至第1位置。
本发明还包括包含互连组件形成方法的各种方法。在该方法中,弹性接触元件形成在基片上。该弹性接触元件其至少一部分可移至第1位置。一制动结构也形成在基片上,在弹性接触元件与另一接触元件机械和电接触时,它限定第1位置。
根据本发明方法的另一例子,第1接触元件形成在第1基片上且制动结构也形成在第1基片上。在弹性接触元件与第1接触元件机械和电接触时,制动结构限定第1位置。
下面参照附图叙述各种组件和方法。
附图概述
通过附图举例说明但不限定本发明,图中相同标号表示相似部件。
图1表示已有技术探测接插组件的一个例子。
图2A例示作为已有技术探测组件一个部件的内插器。
图2B是可用于已有技术探测组件的内插器另一例子的剖面图。
图2C是图2B的俯视图。
图3A是已有技术内插器另一例子的剖面图。
图3B是已有技术另一内插器结构的剖面图。
图4表示已有技术互连组件的一个例子。
图5A是本发明一个实施例的透视图,其中,弹性接触元件与制动结构一起设置在基片上。图5B是本发明一个实施例的透视图,其中,弹性接触元件以扇状散布与制动结构一起设置在基片上。
图6A表示本发明一个实施例(进行机械和电接触前)。
图6B表示进行机械和电接触的图6A的互连组件,
图6C表示本发明另一实施例(在机械和电接触前)。
图6D表示进行电和机械接触的图6C互连组件。
图7表示根据本发明的互连组件的另一例子。
图8A是本发明互连组件另一实施例。
图8B是本发明制动结构的另一例子。
图9A表示可用于制造本发明制动结构的芯片(集成电路)层。
图9B是图9A的层沿线9b-9b的剖面图。
图9C表示根据本发明一实施例基片上同9A和9B的薄层的使用。
图9D表示根据本发明用于集成电路的制动结构的另一例子。
图9E说明同时形成多个制动结构的材料薄片的一个例子,每个制动结构类似于图9D的制动结构。
图9F是具有从焊盘扇形状散开的接触元件所用开口的制动结构的透视图。
图10A、10B和10C说明根据本发明的一个例子,用光刻制版形成接触元件和相应制动结构的一种方法。
图10D是用于说明根据本发明的一个例子用光刻制版形成的接触元件、另一接触元件和制动结构间相互作用的剖面图。
图10E是具有各种制动结构和两列弹性接触元件的芯片的俯视图。
图10F至10M是用于显示用光刻制版在集成电路之类的基片上形成弹性接触元件和制动结构的方法的剖面图。
图11显示配合波纹管卡盘使用本发明的互连组件的一种方法。
图12A表示与真空卡盘配合使用本发明互连组件的一个例子。
图12B表示与贮气卡盘系统配合使用本发明互连组件的一个例子。
图13表示具有本发明一个实施例的电路元件的制动结构例子。
图14说明两种制动结构,每种均包含至少一个本发明例举的电路元件。
详细说明
本发明涉及互连组件和方法,具体而言,涉及与集成电路上的接触元件进行机械和电连接的互连组件。下述说明及附图用于说明本发明而不构成对本发明的限定。叙述各种具体细节以彻底理解本发明。但是,在某些例子中,不叙述熟知的或常规的细节,以免不必要地以细节模糊了本发明。
图5A表示设置在基片102A上的8个弹性接触元件110的透视图。可用各种方法形成图5A所示的互连组件。例如,可通过丝焊操作把弹性接触元件机械地固定至焊盘103。或者,可用光刻制版形成弹性接触元件。在基片102A上还设置多个制动结构。左列制动结构105突出基片102A顶面一预定量,通常该预定量与右列制动结构104突出该顶面的量相同。这些制动结构设计成确定/限定弹性接触元件可能发生的压缩或弯曲的最大量。每个弹性接触元件包括至少一部分,该部分在弹性接触元件在垂直方向往基片102A的顶面压缩时可移动至第1位置。各制动结构垂直尺寸使得在弹性接触元件与其它接触元件机械和电接触时限定第1位置。在一个实施例中,各制动结构设计成使其高于基片的垂直高度小于最短弹性接触元件的垂直高度,该最短元件是统计上合理地可能存在的(例如制动结构高度小于弹性接触元件可能高度的99.9%)。
图5B表示本发明另一实施例的透高图,其中,通过扇形散开的线条103A把一字排列的焊盘列103耦联至若干弹性接触元件110。扇形散开线条103A使弹性接触元件可相对焊盘列作空间分布而不需使用不同长度的弹性接触元件(如图5A所示情况,在该情况中,弹性接触元件110有不同长度,以与空间散布的元件接触)。每个焊盘103电耦联至相应的扇形散开线条103A,后者电耦联至相应焊盘103B,各弹性接触元件110A电及机械地耦联至相应焊盘103B。若干制动结构105设置在集成电路102B的表面上。
图6A表示本发明互连组件601的一个例子。该互连组件601包含基片602和603。基片603包含两个接触元件604和605,它们安装在基片603上从而设置在该基片上。基片602包含两个制动结构606和607,它们可设置成相对靠近弹性接触元件608和609。这些弹性接触元件可是公开号为WO96/38858号的PCT申请文件中描述的弹簧互连元件。各弹性接触元件包含顶端或最远端,通常如图6A所示,延伸超出各自制动结构的顶端。例如,弹性接触元件608的顶端608A延伸超过制动机构606的顶端,从而弹性接触元件608的总垂直长度超过制动结构606的总垂直长度。预定制动结构的高度,以限定弹性接触元件与另一接触元件机械和电接触时的第1位置。进而,制动结构的高度限定弹性接触元件与另一接触元件(例如接触元件604和605)机械和电接触时一基片602与另一基片603之间的间隙,上述情况进一步示于图6B,图中,基片602和603压紧在一起构成互连组件601A。从图6B可知,制动结构606和607与基片603机械接触,具体而言,各制动结构的顶面机械地紧靠基片603的顶面。从而当弹性接触元件608和609与接触元件604和605接触时,分别限定了它们顶端608A和609A的第1位置。
应理解,互连组件601可用于各种情况。例如,基片602可是耦联至晶片探测器或晶片测试器的探测接插组件的一部分,基片603可是一块半导体集成电路或半导体晶片上多块集成电路。或者,基片602可是一块半导体集成电路或半导体晶片上的多块集成电路的一部分。在这种情况下,弹性接触元件耦联至集成电路上的焊盘或其它接触元件,制动结构安装至该集成电路的顶面。基片603可是探测插件结构的一部分,该插件设计成与各种弹性接触元件电接触以测试或老化半导体晶片上的一块或多块集成电路。或者,基片603可是封装组件的一部分,用于通过例如图6A所示的元件608和609等的弹性接触元件形成永久接触。
图6C和6D表示使用直线(悬臂式)弹性接触元件608B和609B的本发明的另一个例子。这些直线弹性接触元件固定在基片602上且当基片602压向基片603时弯成图6D所示的压缩状态。制动结构606和607确定当各弹性接触元件与其相应的焊盘机械和电接触时两基片的间距及各弹性接触元件的压缩量。
图7表示本发明另一互连组件的例子。图7的该互连组件621包含基片622和623。两弹性接触元件628和629安装至基片622的表面以与基片623的接触元件624和625分别接触。两个制动结构626和627也安装至基片623并位于相对靠近相应接触元件624和625处。当基片622和623压在一起时,弹性接触元件628和629将挠曲至由制动结构高度所确定的位置。在一个特定实施例中,制动结构的高度大致为5至40密耳,弹性接触元件在压缩前的高度可大致为45密耳。制动结构相对于弹性接触元件压缩前高度的具体高度,部分取决于控制各弹性接触元件压缩前的各顶端平面性的能力。若该平面性可控制得更精确,则制动结构的高度可稍低于弹性接触元件压缩前的高度。另一方面,较小的制动结构对把弹性接触元件阵列形成为特定高度中的误差提供较大的裕量。制动结构的高度通常小于150密耳。最好小于40密耳。
应理解,本发明可用于具有设置在同一或不同基片上的大量或少量弹性接触元件及若干制动结构的情况。本发明可用于具有含一个制动结构和一个弹性接触元件的单块IC或具有半导体晶片上的多块IC且各IC均包含一个制动结构和弹性接触元件的情况。各弹性接触元件可具有相应的制动结构(例如如图5B所示的柱形制动结构)或一个制动结构被几个弹性接触元件共用(如图9D所示)。进而,应理解,接触元件和弹性接触元件可耦联至各种电路元件,不管这些电路元件是设置在测试的集成电路上、探测插件电路中,还是设置在包括封装的集成电路的最终组合系统所用的电路中。
图8A说明本发明的互连组件的另一个例子。互连组件801包含安装两个制动结构805和806的基片802。基片802上还安装两个弹性接触元件803和804。应理解,基片802可是集成电路或探测接插组件或其它测试或老化装置的一部分。图8A所示的各制动结构包含粘附层和设置在该粘附层上的覆盖。制动结构806包含设置在其顶面的粘附层807和设置在粘附层807上的覆盖809。该覆盖可是金属箔或可从粘附层剥离或去除的塑料等构成的层。类似地,制动结构805包含粘附层808和覆盖层810。该覆盖层可剥脱以暴露粘附层,接着粘附层可用于把制动结构及组件801的其余部分粘附至另一基片等的其它物体。例如,基片802可附于一集成电路(未图示),使集成电路的焊盘与弹性接触元件配对以与那些元件进行机械和电接触。通过去除制动结构顶端的覆盖层并把基片802压向集成电路,使制动结构上的粘附层与集成电路顶面接触,基片802可粘附于集成电路的顶面。这样,制动结构顶端上的粘附层把基片802粘结至集成电路,使弹性接触元件与集成电路上的焊盘或其它接触元件进行机械和电接触。以这种方式,在基片802及其相应结构和集成电路之间可形成集成电路封装。应理解,在该例子中,基片802包含各弹性接触元件至其它接触点的互连,从而可互连至由基片802和附于该基片的集成电路构成的封装组件外部的电元件。
图8A所示互连组件801的其它应用包含下述情况:基片802是集成电路本身,且弹性接触元件803和804及连接所需的其它接触元件附于集成电路上的各焊盘或其它接触元件。如图8A所示,制动结构可粘附于集成电路的顶面。在粘附层上的覆盖层去除后,集成电路可压向另一布线基片,以在本例基片802上的集成电路的电路与各外部电元件之间,经另一基片形成电接触。这另一基片可是探测接插组件或老化组件的一部分,或是含与“外部”环境互连的最终封装集成电路的一部分。
图8B表示制动结构821的另一实施例,其中,粘附层加至制动结构822的顶层和底层。粘附层824形成在制动结构822的顶面,可去掉的覆盖826置于该粘附层上。另一粘附层823形成在制动结构822的底面并由覆盖层825覆盖。该制动结构可以片或膜构成并加至基片,以在基片上形成多个制动结构。参照图9A、9B和9C对此作进一步说明。
示于图9A的层903,在薄片或薄膜上有两列开口,这些开口如图9C所示,设计成围绕至少一个弹性接触元件。图9A表示在薄片或薄膜上形成的四个开口905、907、909和911。在图9A所示实施例中,层903是薄片的一部分,该薄片设计成贴合在集成电路的半导体晶片902上。该层903可由含例如聚酰亚胺材料的任何可能材料加以形成。开口可在层903中通过蚀刻、冲压或切割形成。在层中形成这些开口是为半导体晶片的集成电路上的接触元件或其它类型基片上的接触元件提供通路。应理解,在一个变换实施例中,层903可设计成仅加至并覆盖晶片上的单块集成电路,而不加至并覆盖晶片上的多块集成电路。图9A所示的线9b-9b表示层903的剖切线,其剖视图示于图9B。
如图9C所示,层903加至基片915。开口905和907用于例如接触元件912和911等接触元件。图9C表示一种混合结构,其中,某些接触元件,例如接触元件912不含弹性接触元件,而另一接触元件,例如接触元件911包含弹性接触元件。应理解,通常这种混合结构不是最好,虽然它仍然在本发明的范围内。基片915可是包含多块集成电路的半导体晶片、单块集成电路、或探测接插组件或老化测试组件的接点式互连结构。通过在层903和基片915接触面间使用粘结剂可把层903设置在基片915上。在这种情况下,层903可是成形材料的薄片并通过两接触面之间的粘结剂附于基片915。或者,层903通过光刻制版形成在基片915上,在这种情况下,可由光刻胶负图案形成层903,该光刻胶图案化并固化形成制动结构。层903也可在其顶面上包含粘附层,如同图8A和8B的制动结构包含这种粘附层一样。应理解,形成在基片915上的层903提供根据本发明的制动结构,例如围绕接触元件912的制动结构916。
应理解,层903可用于密封由它覆盖的IC,从而保护IC免受环境条件(湿度)影响。例如,如果层903的底面粘附于IC或以光刻制版在IC上形成,则层903的顶可粘附(或其它方法固定)于基片,例如附于用于气密IC的覆盖层。
图9D是平面图,表示围绕多个弹性接触元件的制动结构。具体而言,图9D说明具有围绕多个弹性接触元件923的周边制动结构922的IC921。该周边制动结构922可由薄片形成,该薄片固定在IC921顶面或例如以光刻制版形成在IC921的某处。可用粘结剂覆盖制动结构922的顶面,该粘结剂用于把制动结构922固定于覆盖层或其它封装上。
图9E表示包含由互连材料筋936保持在一起的多个周边制动结构932、933、934和935的薄片931的一个例子。薄片可由聚酰亚胺材料、环氧树脂材料或其它材料构成。薄片931可加至IC的晶片上以在晶片上的多块集成电路的每一块上同时设置周边制动结构。可通过粘结剂把薄片931固定在晶片上。应理解,薄片931可包含晶片上各IC的制动结构。在薄片931设置在晶片上后,通常在从晶片切割各IC的标准单块电路分割工序中切割筋936。分割后,各IC包含图9D所示的周边制动结构。
图9F是本发明另一例子的透视图。在该例子中,薄片953加至基片952的顶面,该基片可是IC(或空间变换器或其它结构)。薄片953包含诸如开口956和963等开口,这些开口通过切割或其它方式形成在薄片953上。开口对准扇形散布的焊盘,例如,薄片953上的开口956对准扇形散布的焊盘956A的至少一部分,以在该焊盘956A的至少一部分上提供开孔。类似地,开口963对准扇形散布的焊盘963A的至少一部分,以在扇形散布的焊盘上提供开孔。弹性接触元件例如元件957或964机械和电耦联至其相应的扇形散布的焊盘,该焊盘电耦联至扇形散布的线条,例如线条955或962。每个扇形散布线条把其相应的焊盘(例如焊盘954或961)电耦联至相应的扇形散布焊盘。从而,弹性接触元件对例如焊盘954和961等的一字排列的焊盘列提供分散、远距电接触。环绕弹性接触元件的各开口提供围绕弹性接触元件的制动结构。应理解,在图9F所示的变换实施例中,薄片953可代之以在基片952顶面某处形成的层(例如由光刻胶或绝缘材料(如二氧化硅)构成的图案层)。
图10A、10B和10C表示用光刻制版形成弹性接触元件和相应制动结构的方法。示于图10A的方法假设基片1001是包含设置在其上的接触元件1002(例如焊盘)的半导体晶片,虽然该方法可用于具有接触元件的其它基片。图10A和10B是剖切接触元件1002的剖面图,应理解,该接触元件构成与基片1001中形成的集成电路的未图示电路元件的电接触。涂敷层或表面1000加至基片1001的顶面,通过把导电金属溅射至基片1001形成涂敷表面1000。该涂敷表面1000用作后续电镀处理的电极。在涂敷表面1000上形成抗蚀剂层1003并布图,使在接触元件1002上存在抗蚀剂层的开口。第1金属层1004淀积并布图在抗蚀剂层1003的开口中的接触元件1002(及涂敷表面1000)上,且如图10A所示,覆盖抗蚀剂层1003的一部分。然后应用电镀操作在金属层1004上形成电镀的金属层1005。接着剥离抗蚀剂层1003和涂敷表面1000,留下弹性接触元件,在该弹性接触元件附近形成制动结构1003A。可用掩模为抗蚀剂层1003A中的制动结构形成图形,然后蚀刻抗蚀剂层1003A,留下图10B所示的制动结构1003A。图10C是图10B的弹性接触元件和其相应制动结构的俯视图。
图10B的弹性接触元件通常在离附于涂敷表面1000的剩余部分的基底最远范围中是可压缩且有弹性的。这样,从基底垂直竖起的元件部分通常不会发生弹性接触元件的挠曲(至较低高度)。从而,对这种弹性接触元件的制动结构其高度应高于所有可能的弹性接触元件(顾及因形成这种元件的裕量而产生的元件高度范围)。用光刻制版形成弹性接触元件的各种方法在本申请受让人的几个申请,包括1998年2月26日递交的序号为09/032473的共同待批美国专利申请及公开日为1997年11月20日、公开号为WO97/43654的PCT申请中加以描述。这种不同方法可用于本发明以形成具有制动结构的、用光刻制版形成的弹性接触元件。
图10D表示用光刻制版形成的弹性接触元件的另一个基片1021上的接触元件1023间互连的例子。制动结构1003A的尺寸(弹性接触元件上方的高度)限定在两结构压在一起时基片1001和1021间的间隔,该间隔确定表示弹性接触元件最远范围1025的虚线所示弹性接触元件的挠曲量。在基片1001和1021相互压紧至制动结构1003A所限定的点时,与弹性接触元件机械和电接触的接触元件1023使弹性接触元件挠曲到该点。
图10E表示本发明的一个例子,其中,在基片1031上使用两种不同类型的制动结构。在基片1031上形成或附有柱状制动结构列1034、柱状制动结构列1035和一个柱状制动结构。在基片1031上形成或附有几个周边状制动结构1037、1038、1039和1040和1041。通常,这些制动结构具有相同的基片1031顶面以上的高度。在基片1031上设置两列弹性接触元件1031和1033。
用光刻制版形成弹性接触元件的另一种方法示于图10F至10M。根据该方法,弹性接触元件形成在扇形散布焊盘或扇形散布线条上,从而构成类似于图5B所示组件的组件。该方法在接触元件1046与可与另一基片上的其它接触元件电接触的弹性接触元件之间形成电连接。应理解,接触元件1046形成与未图示的其它电路元件的电接触,且基片1045可是IC的一部分或测试或互连组件(例如,内插器、空间转换器或探测插件)的一部分。如图10G所示,在基片1045的顶面上,(例如通过溅射覆盖金属)形成涂敷层1047(例如覆盖金属),由此,覆盖该顶面并与接触元件1046形成电接触。淀积并布图光刻胶层以在部分涂敷层1047上的光刻胶层1048中留有开口,并通过在涂敷层1047上电镀金属而形成另一金属层1049。图10H表示形成的结构。淀积并布图另一光刻胶层,以形成扩展的光刻胶层1050,如图10I所示,该层在金属层1049上有开口。然后使用溅射掩模1052,以在扩展的光刻胶层1050的一部分和金属层1049的暴露部分上有选择地溅射金属层1051。形成的结构(和相应的溅射掩模)示于图10J。在金属层1051上涂另一金属层1053,形成的结构示于图10K。接着,剥离光刻胶层并有选择地蚀刻未受层1049保护的部分涂层1047以取除所有该部分涂层1047,形成的结构示于图10L。如图10M所示,制动结构1055和顶端1054接着分别加至基片1045和弹性接触元件。
图11表示一种使用本发明互连组件的技术。该互连组件1101包括设置在半导体晶片1111上的卡盘结构1117,晶片由波纹管结构1103支撑。波纹管结构1103包含可膨胀的波纹管1105和进入口及输出口1107A和1107B。在该波纹管结构的一种应用中,水之类的液体1106流入并流出波纹管结构1103。薄钢隔板1109焊接或附于波纹管1105。该薄隔板用于对晶片1111的底面施加均匀压力以把晶片顶面压向制动结构1121和1123,从而改进晶片上的弹簧(或其它弹性接触元件)与基片1117上接触元件的电连接。该均匀压力通常克服接触面(例如晶片1111的顶面与支持制动结构1121和接触元件1125与1127的面)之间的平直度变化。该薄钢隔板1109也允许与设置在隔板1109顶面的半导体晶片1111进行热交换。水1106之类的液体在压力下导入波纹管以迫使隔板1109与晶片1111的底侧直接接触。
可加热或冷却该流体以控制或影响晶片温度。例如,在老化试验中,液体加热以升高晶片温度,然后冷却,该过程循环若干周期。卡盘1117包括分别靠近接触元件1125和1127的制动结构1121和1123。可能希望在隔板1109与晶片1111的背面间设置传热层以改进流体与晶片1111之间的传热效率。接触元件1125和1127设计成形成与晶片1111上的弹性接触元件1115和1113的接触。应理解,有比图11所示多得多的弹性接触元件和接触元件。卡盘1117包含引线或其它互连单元以经接触元件1125和1127,把弹性接触元件1115和1113连至测试器,从而可在测试器与半导体晶片间进行功率、信号等的通信。卡盘1117可由支柱1118保持,以可通过波纹管1105膨胀,把晶片1111压向卡盘1117。或者,卡盘1117可加压并由钳夹支持件保持,该钳夹支持件用背板接触并覆盖卡盘1117的顶端,也可围绕波纹管1105的侧面与底面。
图12A表示本发明互连组件1201的另一例子。在该例中,卡盘1203支持半导体器件1204的晶片。该晶片包含多个接触元件,例如接触元件1210A,它们设计并配置成相对于布线基片1206上的弹性接触元件形成接触。弹性接触元件1207、1209和1210是弹性接触元件的另一例子,在这种情况下,它们通常具有直悬臂结构。制动结构1214、1216和1218安装在布线基片1206上并设计成限定布线基片1206与晶片1204之间的Z间隔。布线基片1206上的抽真空口1212使在布线基片1206与卡盘1203间的空间可形成真空。O形密封环1205确保在布线基片1206与卡盘1203间形成的真空。真空形成时,布线基片1206压低朝向晶片1204,在各弹性接触元件与晶片1204上的相应接触元件间形成接触。
图12B表示本发明的互连组件1251的另一例子。在该例中,压力囊1255迫使布线基片1254与晶片1253接触。压板1255A用于压基片1254上的气囊。晶片1253放置在卡盘1252的顶面上并包含例如接触元件1257A等接触元件,如图12B所示。当气囊1255迫使布线基片1254与晶片1253接触时,制动结构1258、1259和1260与晶片1253的顶面接触。该接触限定布线基片1254与半导体晶片1253之间的间隔。产生该接触时,弹性接触元件1257与晶片1253上的相应接触元件产生机械和电接触。
图13表示互连组件1301的一个例子,它包括容纳电路元件的制动结构1310,在此例子中,此电路元件为耦合至基片1302的集成电路中的电路上的电容。制动结构1310设计成在弹性接触元件1304和1305与基片1302的相应接触元件1306和1307机械和电接触时,限定基片1302与1303间的最小垂直间隔。接触元件1307与1306包含在绝缘材料1308中,该材料可是制造集成电路中的常规介质材料。应理解,连至基片1302上集成电路中电路元件的互连单元在图13中未图示,该图是经制动结构1310和基片1302的剖面图。制动结构1310是多层结构,包含多个介质层和多个可是金属层的导电层。在示于图13的例子中,绝缘层1316间隔金属(或其它导电)层1314和1318以形成电容。金属层1314和1318及绝缘层1316和1322封装在绝缘层1312中。制动结构1310本身可类似于柱形或圆柱形或其它形状(例如矩形、任意图形、矩形连成的曲折形),并完全由封装的绝缘层1312覆盖。该绝缘层可是聚酰亚胺材料、二氧化硅或其它绝缘材料。在一定实施例中,通过焊珠1321,金属层1318电耦联至基片1302的柱形或其它形接触元件1320。通过延伸进基片1302的柱结构1314A耦联金属层1314。以这种方式,制动结构1310中的电容电耦合至基片1302中的电路元件。应理解,有多种熟知的技术可用于制造制动结构1310以包含例如电容器等电元件。在一个例子中,可在基片1302中形成柱结构1314A和1320。接着,形成并布图介质层以对例如焊珠1321等焊珠提供开口。或者,在整个表面上溅射金属层1318,填满绝缘层1322中的开口。接着,以示于图13的方式对金属层1318布图,并在金属层1318上淀积另一绝缘层。然后,对该绝缘层布图,以形成绝缘层1316,接着,在表面上淀积另一金属层并布图,以形成金属层1314。最后,施加绝缘层或其它钝化层并布图,形成绝缘层1312,以完成制动结构1310。
图14表示互连组件另一例子。该互连组件中1401包括两个制动结构1404和1405,每个均包含耦合至基片1402电路元件的电路元件。基片1402也包含与弹性接触元件1403机械和电耦联的柱形或其它形接触元件1403A。
制动结构1404包含接地屏蔽部件1411,该部件耦联至地线或基片1402的其它电路。在本应用中,术语电路元件包含接地屏蔽层或屏蔽面。从而,制动结构可包含如图14所示的本发明的接地屏蔽。制动结构1414还包含具有电耦联至基片1402中至少一个电路元件的导电板1413和1415的电容器。
制动结构1405还包含电耦联至基片1402地电路的接地屏蔽1421。制动结构1405还包含由电耦联至基片1402中至少一个电路元件的导电板1427和1429形成的电容器。此外,制动结构1405包含导电元件1423和1425,用于提供基准电压,例如Vss和Vdd。该电压通过制动结构由总线传到制动结构中的电元件或制动结构外的电元件。
关于图13和图14组件的进一步内容可在与本申请同时递交的、发明人为Igor Y.Khandros,David V.pedersen,Benjamin N.Eldridge,Richard S.Roy及Gaetan Mathieu专利申请号为No____的共同待批美国专利申请中给出。
应理解,上述说明提供本发明实施例的描述,而不试图提供可用于形成本发明互连组件的各种材料的方法的穷举。例如,虽然聚酰亚胺材料可用于形成本发明的制动结构,但应理解,也可用其它材料,包括例如SU8等光刻胶,该材料可产生高纵横比且可适当固化并留作机械部件。或者,也可用填充固化环境树脂片、聚合材料或某些金属作为形成制动结构的材料。实际上,制动结构可由任何在该结构所经受期望温度稳定的材料构成,该温度环境包含测试和/或老化环境及期望使用环境。可以预料,根据本发明的制动结构具有约80微米的最小高度,虽然更小高度的制动结构也在本发明的范围中。
在上述说明中,已参照特定的示范实施例描述了本发明。但显然,对实施例的各种修改和变换不脱离后附权利要求所述的本发明的精神和范围。因而,说明书和附图仅作为说明而非限定。
Claims (32)
1.一种互连组件,其特征在于,它包括:
基片;
弹性接触元件,所述弹性接触元件设置在所述基片上且相对于所述基片具有第1高度;
设置在所述基片上的制动结构,所述制动结构相对于所述基片具有第2高度,所述第1高度大于所述第2高度;
其中,所述制动结构包含具有开口的薄层材料,所述弹性接触元件设置在所述开口中。
2.如权利要求1所述的互连组件,其特征在于,所述制动结构限定所述弹性接触元件与另一基片上的另一接触元件接触时所述基片和另一基片间的间距。
3.如权利要求1所述的互连组件,其特征在于,所述制动结构设置在所述基片上的所述弹性接触元件附近。
4.如权利要求1所述的互连组件,其特征在于,所述弹性接触元件包含弹簧结构。
5.如权利要求1所述的互连组件,其特征在于,所述制动结构包含粘附层。
6.如权利要求5所述的互连组件,其特征在于,所述粘附层用于粘附至所述基片。
7.如权利要求2所述的互连组件,其特征在于,通过所述基片和所述另一基片之间形成的真空,迫使两者趋近。
8.如权利要求2所述的互连组件,其特征在于,通过加压的气囊或波纹管之一迫使所述基片和所述另一基片相互靠近;所述气囊或波纹管中的流体可控制所述基片和所述另一基片中的至少一个的温度。
9.如权利要求1所述的互连组件,其特征在于,所述互连组件是探测接插组件的一部分。
10.如权利要求1所述的互连组件,其特征在于,所述互连组件是晶片级测试组件的一部分。
11.如权利要求1所述的互连组件,其特征在于,所述薄层材料包含多个开口,多个弹性接触元件设置在所述基片上的所述开口中。
12.如权利要求11所述的互连组件,其特征在于,所述薄片材料包含一粘附层。
13.一种互连组件,其特征在于,它包括:
第1基片;
设置在所述第1基片上的弹性接触元件,该弹性接触元件相对于所述第1基片具有第1高度;
设置在第2基片上的制动结构,所述制动结构相对于所述第2基片具有第2高度,所述第1高度大于所述第2高度;
其中,所述制动结构包含具有开口的薄层材料,所述弹性接触元件设置在所述第1基片上,设置成使接触所述第2基片端时内配合至所述开口中。
14.如权利要求13所述的互连组件,其特征在于,所述弹性接触元件包含弹簧结构。
15.如权利要求13所述的互连组件,其特征在于,所述制动结构包含粘附层。
16.如权利要求13所述的互连组件,其特征在于,所述粘附层用于粘附至第2基片。
17.如权利要求13所述的互连组件,其特征在于,通过所述第1基片和第2基片间形成的真空,迫使两者相互靠近。
18.如权利要求13所述的互连组件,其特征在于,通过加压的气囊或波纹管之一,迫使所述第1基片和第2基片相互靠近,所述气囊或波纹管中的流体可控制所述第1和第2基片中的至少一个的温度。
19.如权利要求13所述的互连组件,其特征在于,所述互连组件是探测接插组件的一部分。
20.如权利要求13所述的互连组件,其特征在于,所述互连组件是晶片级测试组件的一部分。
21.如权利要求1所述的互连组件,其特征在于,所述基片是半导体集成电路。
22.如权利要求13所述的互连组件,其特征在于,所述第1基片是半导体集成电路。
23.一种在基片上形成制动结构的方法,其特征在于,该方法包括下述步骤:
在薄片中形成多个开口;
把所述薄片加至所述基片,所述薄片相对于所述基片具有第1高度;
在所述基片上所述开口中形成多个弹性接触元件,所述弹性接触元件相对于所述基片具有第2高度,所述第2高度大于所述第1高度,其中,所述薄片包含所述制动结构。
24.如权利要求23所述的方法,其特征在于,所述基片是半导体集成电路的晶片。
25.如权利要求23所述的方法,其特征在于,所述薄片包含聚酰亚胺材料。
26.如权利要求23所述的方法,其特征在于,所述薄片包含粘附层,把所述薄片加至所述基片的步骤包括把所述粘附层粘附至所述基片。
27.一种形成互连结构的方法,其特征在于,该方法包括下述步骤:
向第1基片提供薄片,其中,所述薄片包含开口;
在所述第1基片上形成至少一个设置在所述开口中第1接触元件,第1接触元件设置成与第2基片上的第2接触元件对应,所述第1接触元件相对所述第1基片具有第1高度,所述薄片相对于所述第1基片具有第2高度,所述第2接触元件相对所述第2基片具有第3高度,所述第1高度或第3高度大于所述第2高度,由此,所述薄片限定所述第2接触元件与所述第1接触元件接触时,所述第1基片和第2基片间的最小间距。
28.如权利要求27所述的方法,其特征在于,所述薄片环绕所述第1基片周边设置。
29.如权利要求27所述的方法,其特征在于,所述第1接触元件是弹性接触元件,所述第1高度大于所述第2高度。
30.如权利要求27所述的方法,其特征在于,所述第2接触元件是弹性接触元件,所述第3高度大于所述第2高度。
31.如权利要求27所述的方法,其特征在于,所述薄片包含把所述薄片粘附于所述第1基片的粘结材料。
32.如权利要求27所述的方法,其特征在于,所述薄片仅覆盖所述基片一部分。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/114,586 | 1998-07-13 | ||
US09/114,586 US6705876B2 (en) | 1998-07-13 | 1998-07-13 | Electrical interconnect assemblies and methods |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1317224A CN1317224A (zh) | 2001-10-10 |
CN1203739C true CN1203739C (zh) | 2005-05-25 |
Family
ID=22356165
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB998105392A Expired - Fee Related CN1203739C (zh) | 1998-07-13 | 1999-01-04 | 用于印制电路板的互连组件及其制造方法 |
Country Status (9)
Country | Link |
---|---|
US (4) | US6705876B2 (zh) |
EP (2) | EP1583406A3 (zh) |
JP (2) | JP3949377B2 (zh) |
KR (1) | KR100423683B1 (zh) |
CN (1) | CN1203739C (zh) |
AU (1) | AU2107299A (zh) |
DE (1) | DE69926241T2 (zh) |
TW (1) | TW404033B (zh) |
WO (1) | WO2000003569A1 (zh) |
Families Citing this family (79)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6705876B2 (en) * | 1998-07-13 | 2004-03-16 | Formfactor, Inc. | Electrical interconnect assemblies and methods |
US7435108B1 (en) * | 1999-07-30 | 2008-10-14 | Formfactor, Inc. | Variable width resilient conductive contact structures |
US6468098B1 (en) * | 1999-08-17 | 2002-10-22 | Formfactor, Inc. | Electrical contactor especially wafer level contactor using fluid pressure |
US6827584B2 (en) * | 1999-12-28 | 2004-12-07 | Formfactor, Inc. | Interconnect for microelectronic structures with enhanced spring characteristics |
US6640432B1 (en) * | 2000-04-12 | 2003-11-04 | Formfactor, Inc. | Method of fabricating shaped springs |
US7458816B1 (en) | 2000-04-12 | 2008-12-02 | Formfactor, Inc. | Shaped spring |
JP4509437B2 (ja) * | 2000-09-11 | 2010-07-21 | Hoya株式会社 | 多層配線基板の製造方法 |
US7396236B2 (en) | 2001-03-16 | 2008-07-08 | Formfactor, Inc. | Wafer level interposer |
US6627980B2 (en) | 2001-04-12 | 2003-09-30 | Formfactor, Inc. | Stacked semiconductor device assembly with microelectronic spring contacts |
DE10143790B4 (de) * | 2001-09-06 | 2007-08-02 | Infineon Technologies Ag | Elektronisches Bauteil mit wenigstens einem Halbleiterchip |
US6759311B2 (en) | 2001-10-31 | 2004-07-06 | Formfactor, Inc. | Fan out of interconnect elements attached to semiconductor wafer |
US7385821B1 (en) | 2001-12-06 | 2008-06-10 | Apple Inc. | Cooling method for ICS |
US20060006888A1 (en) * | 2003-02-04 | 2006-01-12 | Microfabrica Inc. | Electrochemically fabricated microprobes |
US7273812B2 (en) * | 2002-05-07 | 2007-09-25 | Microfabrica Inc. | Microprobe tips and methods for making |
US7531077B2 (en) | 2003-02-04 | 2009-05-12 | Microfabrica Inc. | Electrochemical fabrication process for forming multilayer multimaterial microprobe structures |
US7363705B2 (en) * | 2003-02-04 | 2008-04-29 | Microfabrica, Inc. | Method of making a contact |
US7265565B2 (en) * | 2003-02-04 | 2007-09-04 | Microfabrica Inc. | Cantilever microprobes for contacting electronic components and methods for making such probes |
US20060051948A1 (en) * | 2003-02-04 | 2006-03-09 | Microfabrica Inc. | Microprobe tips and methods for making |
US20050104609A1 (en) * | 2003-02-04 | 2005-05-19 | Microfabrica Inc. | Microprobe tips and methods for making |
US20060238209A1 (en) * | 2002-05-07 | 2006-10-26 | Microfabrica Inc. | Vertical microprobes for contacting electronic components and method for making such probes |
US7412767B2 (en) * | 2003-02-04 | 2008-08-19 | Microfabrica, Inc. | Microprobe tips and methods for making |
US20060053625A1 (en) * | 2002-05-07 | 2006-03-16 | Microfabrica Inc. | Microprobe tips and methods for making |
US7640651B2 (en) * | 2003-12-31 | 2010-01-05 | Microfabrica Inc. | Fabrication process for co-fabricating multilayer probe array and a space transformer |
US20050184748A1 (en) * | 2003-02-04 | 2005-08-25 | Microfabrica Inc. | Pin-type probes for contacting electronic circuits and methods for making such probes |
US7723210B2 (en) * | 2002-11-08 | 2010-05-25 | Amkor Technology, Inc. | Direct-write wafer level chip scale package |
US6905914B1 (en) | 2002-11-08 | 2005-06-14 | Amkor Technology, Inc. | Wafer level package and fabrication method |
US7084650B2 (en) * | 2002-12-16 | 2006-08-01 | Formfactor, Inc. | Apparatus and method for limiting over travel in a probe card assembly |
US8088158B2 (en) * | 2002-12-20 | 2012-01-03 | Boston Scientific Scimed, Inc. | Radiopaque ePTFE medical devices |
US20080157793A1 (en) * | 2003-02-04 | 2008-07-03 | Microfabrica Inc. | Vertical Microprobes for Contacting Electronic Components and Method for Making Such Probes |
US10416192B2 (en) | 2003-02-04 | 2019-09-17 | Microfabrica Inc. | Cantilever microprobes for contacting electronic components |
US7567089B2 (en) * | 2003-02-04 | 2009-07-28 | Microfabrica Inc. | Two-part microprobes for contacting electronic components and methods for making such probes |
US20080211524A1 (en) * | 2003-02-04 | 2008-09-04 | Microfabrica Inc. | Electrochemically Fabricated Microprobes |
US8613846B2 (en) * | 2003-02-04 | 2013-12-24 | Microfabrica Inc. | Multi-layer, multi-material fabrication methods for producing micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties |
US9244101B2 (en) * | 2003-02-04 | 2016-01-26 | University Of Southern California | Electrochemical fabrication process for forming multilayer multimaterial microprobe structures |
TW579104U (en) * | 2003-04-09 | 2004-03-01 | Hon Hai Prec Ind Co Ltd | Electrical connector |
US9671429B2 (en) | 2003-05-07 | 2017-06-06 | University Of Southern California | Multi-layer, multi-material micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties |
TWM249244U (en) * | 2003-07-18 | 2004-11-01 | Hon Hai Prec Ind Co Ltd | Electrical connector |
US7345350B2 (en) | 2003-09-23 | 2008-03-18 | Micron Technology, Inc. | Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias |
US10641792B2 (en) | 2003-12-31 | 2020-05-05 | University Of Southern California | Multi-layer, multi-material micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties |
US20080108221A1 (en) * | 2003-12-31 | 2008-05-08 | Microfabrica Inc. | Microprobe Tips and Methods for Making |
JP4592292B2 (ja) * | 2004-01-16 | 2010-12-01 | 株式会社日本マイクロニクス | 電気的接続装置 |
US7282932B2 (en) * | 2004-03-02 | 2007-10-16 | Micron Technology, Inc. | Compliant contact pin assembly, card system and methods thereof |
US7128580B2 (en) * | 2004-04-09 | 2006-10-31 | Hon Hai Precision Ind. Co., Ltd. | Socket connector with supporting housing protrusions |
TWM267656U (en) * | 2004-08-20 | 2005-06-11 | Hon Hai Prec Ind Co Ltd | Land grid array electrical connector |
US7053644B1 (en) * | 2004-12-15 | 2006-05-30 | Aehr Test Systems | System for testing and burning in of integrated circuits |
US7442049B2 (en) * | 2005-02-09 | 2008-10-28 | International Business Machines Corporation | Electrical connecting device and method of forming same |
WO2006093704A1 (en) * | 2005-03-01 | 2006-09-08 | Sv Probe Pte Ltd. | Probe card with stacked substrate |
JP2006261565A (ja) * | 2005-03-18 | 2006-09-28 | Alps Electric Co Ltd | 電子機能部品実装体及びその製造方法 |
JP2006261566A (ja) * | 2005-03-18 | 2006-09-28 | Alps Electric Co Ltd | 電子部品用ホルダ及び電子部品用保持シート、これらを用いた電子モジュール、電子モジュールの積層体、電子モジュールの製造方法並びに検査方法 |
JP4036872B2 (ja) * | 2005-05-18 | 2008-01-23 | アルプス電気株式会社 | 半導体装置の製造方法 |
JP2007053071A (ja) | 2005-07-20 | 2007-03-01 | Alps Electric Co Ltd | 接続素子および前記接続素子を使用した回路接続装置 |
US7572681B1 (en) | 2005-12-08 | 2009-08-11 | Amkor Technology, Inc. | Embedded electronic component package |
US7382143B2 (en) * | 2006-05-18 | 2008-06-03 | Centipede Systems, Inc. | Wafer probe interconnect system |
US7902660B1 (en) | 2006-05-24 | 2011-03-08 | Amkor Technology, Inc. | Substrate for semiconductor device and manufacturing method thereof |
US7442045B1 (en) * | 2007-08-17 | 2008-10-28 | Centipede Systems, Inc. | Miniature electrical ball and tube socket with self-capturing multiple-contact-point coupling |
JP2009192309A (ja) * | 2008-02-13 | 2009-08-27 | Shinko Electric Ind Co Ltd | 半導体検査装置 |
US7936177B2 (en) * | 2008-03-07 | 2011-05-03 | Formfactor, Inc. | Providing an electrically conductive wall structure adjacent a contact structure of an electronic device |
US20100188825A1 (en) * | 2009-01-28 | 2010-07-29 | Honeywell International Inc. | Apparatus for isolating multiple circuit boards from vibration |
US8796561B1 (en) | 2009-10-05 | 2014-08-05 | Amkor Technology, Inc. | Fan out build up substrate stackable package and method |
US8937381B1 (en) | 2009-12-03 | 2015-01-20 | Amkor Technology, Inc. | Thin stackable package and method |
US9691734B1 (en) | 2009-12-07 | 2017-06-27 | Amkor Technology, Inc. | Method of forming a plurality of electronic component packages |
US8324511B1 (en) | 2010-04-06 | 2012-12-04 | Amkor Technology, Inc. | Through via nub reveal method and structure |
US8294276B1 (en) | 2010-05-27 | 2012-10-23 | Amkor Technology, Inc. | Semiconductor device and fabricating method thereof |
US8440554B1 (en) | 2010-08-02 | 2013-05-14 | Amkor Technology, Inc. | Through via connected backside embedded circuit features structure and method |
US8487445B1 (en) | 2010-10-05 | 2013-07-16 | Amkor Technology, Inc. | Semiconductor device having through electrodes protruding from dielectric layer |
US8791501B1 (en) | 2010-12-03 | 2014-07-29 | Amkor Technology, Inc. | Integrated passive device structure and method |
US8390130B1 (en) | 2011-01-06 | 2013-03-05 | Amkor Technology, Inc. | Through via recessed reveal structure and method |
DE102011109808B4 (de) | 2011-08-08 | 2022-09-22 | Volkswagen Aktiengesellschaft | Verfahren zur Herstellung einer Bauteilverbindung durch Elementreibschweißen |
US8552548B1 (en) | 2011-11-29 | 2013-10-08 | Amkor Technology, Inc. | Conductive pad on protruding through electrode semiconductor device |
US9048298B1 (en) | 2012-03-29 | 2015-06-02 | Amkor Technology, Inc. | Backside warpage control structure and fabrication method |
US9129943B1 (en) | 2012-03-29 | 2015-09-08 | Amkor Technology, Inc. | Embedded component package and fabrication method |
JP2013080938A (ja) * | 2012-11-26 | 2013-05-02 | Japan Electronic Materials Corp | 半導体検査装置 |
JP6500258B2 (ja) * | 2015-06-12 | 2019-04-17 | 北川工業株式会社 | 接触部材 |
US9876307B2 (en) | 2015-09-03 | 2018-01-23 | Apple Inc. | Surface connector with silicone spring member |
US9899757B2 (en) * | 2015-09-03 | 2018-02-20 | Apple Inc. | Surface connector with silicone spring member |
US9801269B1 (en) * | 2016-05-10 | 2017-10-24 | Northrop Grumman Systems Corporation | Resilient miniature integrated electrical connector |
CN109313217B (zh) * | 2016-06-09 | 2021-06-25 | 日本电产理德股份有限公司 | 检查辅助具及检查装置及探针 |
DE102017002150A1 (de) * | 2017-03-06 | 2018-09-06 | Rosenberger Hochfrequenztechnik Gmbh & Co. Kg | Elektrisches Kontaktelement |
US11262383B1 (en) | 2018-09-26 | 2022-03-01 | Microfabrica Inc. | Probes having improved mechanical and/or electrical properties for making contact between electronic circuit elements and methods for making |
Family Cites Families (76)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US923327A (en) * | 1908-10-17 | 1909-06-01 | Frank A Champlin | Electrical-connection rosette. |
US4205588A (en) * | 1958-06-10 | 1980-06-03 | The United States Of America As Represented By The Secretary Of The Navy | Method and material for fuze render safe procedure |
US3193793A (en) * | 1963-03-14 | 1965-07-06 | Kenneth W Plunkett | Electronic connector |
US3290636A (en) * | 1963-09-30 | 1966-12-06 | Northern Electric Co | Thin-film circuit connector |
US3573617A (en) * | 1967-10-27 | 1971-04-06 | Aai Corp | Method and apparatus for testing packaged integrated circuits |
US3936930A (en) * | 1972-07-10 | 1976-02-10 | Rca Corporation | Method of making electrical connections for liquid crystal cells |
US3842189A (en) * | 1973-01-08 | 1974-10-15 | Rca Corp | Contact array and method of making the same |
US3794953A (en) * | 1973-01-22 | 1974-02-26 | Security Instr Inc | Electrical terminal for conductive foil |
US4029375A (en) * | 1976-06-14 | 1977-06-14 | Electronic Engineering Company Of California | Miniature electrical connector |
US4209745A (en) * | 1978-06-12 | 1980-06-24 | Everett/Charles, Inc. | Interchangeable test head for loaded test member |
US4239312A (en) * | 1978-11-29 | 1980-12-16 | Hughes Aircraft Company | Parallel interconnect for planar arrays |
US4202588A (en) * | 1978-11-29 | 1980-05-13 | Technical Wire Products | Electrical connector and support means therefor |
US4352061A (en) * | 1979-05-24 | 1982-09-28 | Fairchild Camera & Instrument Corp. | Universal test fixture employing interchangeable wired personalizers |
JPS56116282A (en) * | 1980-02-19 | 1981-09-11 | Sharp Kk | Electronic part with plural terminals |
US4403272A (en) * | 1980-06-02 | 1983-09-06 | Oak Industries Inc. | Membrane switch interconnect tail and printed circuit board connection |
US4428633A (en) * | 1982-03-01 | 1984-01-31 | Amp Incorporated | Dual-in-line socket assembly |
JPS5987842A (ja) * | 1982-11-10 | 1984-05-21 | Toshiba Corp | Ic/lsiソケツト |
US4553192A (en) * | 1983-08-25 | 1985-11-12 | International Business Machines Corporation | High density planar interconnected integrated circuit package |
US4615573A (en) * | 1983-10-28 | 1986-10-07 | Honeywell Inc. | Spring finger interconnect for IC chip carrier |
US5917707A (en) | 1993-11-16 | 1999-06-29 | Formfactor, Inc. | Flexible contact structure with an electrically conductive shell |
US6043563A (en) | 1997-05-06 | 2000-03-28 | Formfactor, Inc. | Electronic components with terminals and spring contact elements extending from areas which are remote from the terminals |
US5476211A (en) | 1993-11-16 | 1995-12-19 | Form Factor, Inc. | Method of manufacturing electrical contacts, using a sacrificial member |
US6330164B1 (en) * | 1985-10-18 | 2001-12-11 | Formfactor, Inc. | Interconnect assemblies and methods including ancillary electronic component connected in immediate proximity of semiconductor device |
US5829128A (en) * | 1993-11-16 | 1998-11-03 | Formfactor, Inc. | Method of mounting resilient contact structures to semiconductor devices |
US4770641A (en) * | 1986-03-31 | 1988-09-13 | Amp Incorporated | Conductive gel interconnection apparatus |
US4988306A (en) * | 1989-05-16 | 1991-01-29 | Labinal Components And Systems, Inc. | Low-loss electrical interconnects |
US5264268B1 (en) * | 1986-07-15 | 1998-12-22 | Mcneil Ppc Inc | Sanitary napkin with composite cover |
US4813129A (en) | 1987-06-19 | 1989-03-21 | Hewlett-Packard Company | Interconnect structure for PC boards and integrated circuits |
JPS6447090A (en) * | 1987-08-18 | 1989-02-21 | Seiko Epson Corp | Circuit board |
JPS6447090U (zh) | 1987-09-17 | 1989-03-23 | ||
JPH01313969A (ja) * | 1988-06-13 | 1989-12-19 | Hitachi Ltd | 半導体装置 |
US4871316A (en) * | 1988-10-17 | 1989-10-03 | Microelectronics And Computer Technology Corporation | Printed wire connector |
US5366380A (en) * | 1989-06-13 | 1994-11-22 | General Datacomm, Inc. | Spring biased tapered contact elements for electrical connectors and integrated circuit packages |
US5030109A (en) * | 1990-08-24 | 1991-07-09 | Amp Incorporated | Area array connector for substrates |
US5136238A (en) * | 1990-11-26 | 1992-08-04 | Electro-Fix, Inc. | Test fixture with diaphragm board with one or more internal grounded layers |
US5172050A (en) | 1991-02-15 | 1992-12-15 | Motorola, Inc. | Micromachined semiconductor probe card |
FR2680284B1 (fr) | 1991-08-09 | 1993-12-03 | Thomson Csf | Dispositif de connexion a tres faible pas et procede de fabrication. |
JPH0564784A (ja) | 1991-09-04 | 1993-03-19 | Easy Net:Kk | 電極式水処理装置 |
DE4135887A1 (de) * | 1991-10-31 | 1993-05-06 | Wolfram Dr. 4040 Neuss De Seiler | Vorrichtung zum abtauen von kaeltetrocknern unter 0(grad) c |
US5199889A (en) * | 1991-11-12 | 1993-04-06 | Jem Tech | Leadless grid array socket |
US5309324A (en) * | 1991-11-26 | 1994-05-03 | Herandez Jorge M | Device for interconnecting integrated circuit packages to circuit boards |
US5252916A (en) * | 1992-01-27 | 1993-10-12 | Everett Charles Technologies, Inc. | Pneumatic test fixture with springless test probes |
US5338208A (en) * | 1992-02-04 | 1994-08-16 | International Business Machines Corporation | High density electronic connector and method of assembly |
JPH0669663A (ja) | 1992-08-18 | 1994-03-11 | Sony Corp | コンデンサ内蔵多層基板 |
EP0615131A1 (en) | 1993-03-10 | 1994-09-14 | Co-Operative Facility For Aging Tester Development | Prober for semiconductor integrated circuit element wafer |
US5373231A (en) | 1993-06-10 | 1994-12-13 | G. G. B. Industries, Inc. | Integrated circuit probing apparatus including a capacitor bypass structure |
JP3293334B2 (ja) * | 1993-08-25 | 2002-06-17 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
JP2963828B2 (ja) | 1993-09-24 | 1999-10-18 | 東京エレクトロン株式会社 | プローブ装置 |
US5573172A (en) * | 1993-11-08 | 1996-11-12 | Sawtek, Inc. | Surface mount stress relief hidden lead package device and method |
JP3400051B2 (ja) * | 1993-11-10 | 2003-04-28 | ザ ウィタカー コーポレーション | 異方性導電膜、その製造方法及びそれを使用するコネクタ |
US6482013B2 (en) | 1993-11-16 | 2002-11-19 | Formfactor, Inc. | Microelectronic spring contact element and electronic component having a plurality of spring contact elements |
US5974662A (en) | 1993-11-16 | 1999-11-02 | Formfactor, Inc. | Method of planarizing tips of probe elements of a probe card assembly |
WO1996015458A1 (en) | 1994-11-15 | 1996-05-23 | Formfactor, Inc. | Probe card assembly and kit, and methods of using same |
US5772451A (en) | 1993-11-16 | 1998-06-30 | Form Factor, Inc. | Sockets for electronic components and methods of connecting to electronic components |
US5475317A (en) * | 1993-12-23 | 1995-12-12 | Epi Technologies, Inc. | Singulated bare die tester and method of performing forced temperature electrical tests and burn-in |
US5495667A (en) * | 1994-11-07 | 1996-03-05 | Micron Technology, Inc. | Method for forming contact pins for semiconductor dice and interconnects |
KR100335166B1 (ko) | 1994-11-15 | 2002-05-04 | 이고르 와이. 칸드로스 | 반도체 장치를 실행시키는 방법 |
US5633535A (en) * | 1995-01-27 | 1997-05-27 | Chao; Clinton C. | Spacing control in electronic device assemblies |
JP2876106B2 (ja) * | 1995-01-31 | 1999-03-31 | タバイエスペック株式会社 | バーンイン用複合体及び複合体使用バーンイン装置 |
US5773986A (en) * | 1995-04-03 | 1998-06-30 | Motorola, Inc | Semiconductor wafer contact system and method for contacting a semiconductor wafer |
WO1997016866A2 (en) | 1995-05-26 | 1997-05-09 | Formfactor, Inc. | Chip interconnection carrier and methods of mounting spring contacts to semiconductor devices |
JP3608795B2 (ja) | 1995-05-26 | 2005-01-12 | フォームファクター,インコーポレイテッド | より大きな基板にばね接触子を定置させるための接触子担体(タイル) |
JP2799973B2 (ja) | 1995-07-06 | 1998-09-21 | 日本電子材料株式会社 | 垂直作動式プローブカード |
US5869961A (en) * | 1995-07-31 | 1999-02-09 | Spinner; Howard D. | Smart IC-test receptacle having holes adapted for mounting capacitors arranged adjacent to pin positions |
JPH0945740A (ja) | 1995-08-01 | 1997-02-14 | Nippon Steel Corp | 半導体基板の評価方法及びそれに用いるチェック用ボード |
JP2002509604A (ja) | 1996-05-17 | 2002-03-26 | フォームファクター,インコーポレイテッド | マイクロエレクトロニクス相互接続要素のための接触チップ構造及びその製造方法 |
WO1998001906A1 (en) | 1996-07-05 | 1998-01-15 | Formfactor, Inc. | Floating lateral support for ends of elongate interconnection elements |
JPH10125857A (ja) | 1996-10-18 | 1998-05-15 | Fuji Electric Co Ltd | コンデンサ内蔵基板およびその基板を用いた電子装置 |
US5952840A (en) * | 1996-12-31 | 1999-09-14 | Micron Technology, Inc. | Apparatus for testing semiconductor wafers |
US6072323A (en) * | 1997-03-03 | 2000-06-06 | Micron Technology, Inc. | Temporary package, and method system for testing semiconductor dice having backside electrodes |
US6224396B1 (en) * | 1997-07-23 | 2001-05-01 | International Business Machines Corporation | Compliant, surface-mountable interposer |
US6114240A (en) * | 1997-12-18 | 2000-09-05 | Micron Technology, Inc. | Method for fabricating semiconductor components using focused laser beam |
US6664628B2 (en) * | 1998-07-13 | 2003-12-16 | Formfactor, Inc. | Electronic component overlapping dice of unsingulated semiconductor wafer |
US6705876B2 (en) | 1998-07-13 | 2004-03-16 | Formfactor, Inc. | Electrical interconnect assemblies and methods |
US6694941B2 (en) * | 2001-08-24 | 2004-02-24 | Kioritz Corporation | Starter |
US7084650B2 (en) | 2002-12-16 | 2006-08-01 | Formfactor, Inc. | Apparatus and method for limiting over travel in a probe card assembly |
-
1998
- 1998-07-13 US US09/114,586 patent/US6705876B2/en not_active Expired - Fee Related
- 1998-12-18 TW TW087121224A patent/TW404033B/zh not_active IP Right Cessation
-
1999
- 1999-01-04 CN CNB998105392A patent/CN1203739C/zh not_active Expired - Fee Related
- 1999-01-04 DE DE69926241T patent/DE69926241T2/de not_active Expired - Lifetime
- 1999-01-04 KR KR10-2001-7000547A patent/KR100423683B1/ko not_active IP Right Cessation
- 1999-01-04 EP EP05012415A patent/EP1583406A3/en not_active Withdrawn
- 1999-01-04 EP EP99901354A patent/EP1097617B1/en not_active Expired - Lifetime
- 1999-01-04 WO PCT/US1999/000322 patent/WO2000003569A1/en active IP Right Grant
- 1999-01-04 AU AU21072/99A patent/AU2107299A/en not_active Abandoned
- 1999-01-04 JP JP2000559717A patent/JP3949377B2/ja not_active Expired - Fee Related
-
2003
- 2003-12-12 US US10/735,226 patent/US6948941B2/en not_active Expired - Fee Related
-
2004
- 2004-03-09 JP JP2004065217A patent/JP4389209B2/ja not_active Expired - Fee Related
-
2005
- 2005-09-27 US US11/237,090 patent/US7169646B2/en not_active Expired - Fee Related
-
2007
- 2007-01-30 US US11/669,068 patent/US7618281B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100423683B1 (ko) | 2004-03-22 |
US6948941B2 (en) | 2005-09-27 |
US7618281B2 (en) | 2009-11-17 |
EP1097617A1 (en) | 2001-05-09 |
JP4389209B2 (ja) | 2009-12-24 |
EP1097617B1 (en) | 2005-07-20 |
TW404033B (en) | 2000-09-01 |
DE69926241D1 (de) | 2005-08-25 |
DE69926241T2 (de) | 2006-04-20 |
US20010012704A1 (en) | 2001-08-09 |
EP1583406A2 (en) | 2005-10-05 |
US20070123082A1 (en) | 2007-05-31 |
AU2107299A (en) | 2000-02-01 |
US7169646B2 (en) | 2007-01-30 |
US20040127074A1 (en) | 2004-07-01 |
WO2000003569A1 (en) | 2000-01-20 |
JP2002520864A (ja) | 2002-07-09 |
EP1583406A3 (en) | 2009-09-23 |
US6705876B2 (en) | 2004-03-16 |
JP2004251910A (ja) | 2004-09-09 |
US20060024988A1 (en) | 2006-02-02 |
CN1317224A (zh) | 2001-10-10 |
KR20010074710A (ko) | 2001-08-09 |
JP3949377B2 (ja) | 2007-07-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1203739C (zh) | 用于印制电路板的互连组件及其制造方法 | |
US6939143B2 (en) | Flexible compliant interconnect assembly | |
US7900347B2 (en) | Method of making a compliant interconnect assembly | |
US6049215A (en) | Bare die carrier | |
US5810607A (en) | Interconnector with contact pads having enhanced durability | |
CN103872028B (zh) | 半导体组合件、堆叠式半导体装置及制造半导体组合件及堆叠式半导体装置的方法 | |
US6330164B1 (en) | Interconnect assemblies and methods including ancillary electronic component connected in immediate proximity of semiconductor device | |
US5304460A (en) | Anisotropic conductor techniques | |
KR20010086060A (ko) | 상승된 접촉 요소를 구비한 웨이퍼를 탐침 검사하기 위한탐침 카드 | |
US20110068485A1 (en) | Component and method for producing a component | |
US8304875B2 (en) | Semiconductor packages | |
US20160031707A1 (en) | Microelectronic devices and methods for manufacturing microelectronic devices | |
US6937044B1 (en) | Bare die carrier | |
EP0654672B1 (en) | Integrated circuit test apparatus |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20050525 Termination date: 20120104 |