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Publication numberCN1165568 A
Publication typeApplication
Application numberCN 96191152
PCT numberPCT/JP1996/002858
Publication date19 Nov 1997
Filing date2 Oct 1996
Priority date3 Oct 1995
Also published asCN1145839C, CN1221843C, CN1388404A, CN1624551A, CN1881062A, CN1881062B, CN100414411C, CN101369579A, CN101369579B, CN103956361A, US5930607, US20030207506, US20050082541, US20050084999, US20050104071, US20050233509, USRE38292, USRE44267, WO1997013177A1
Publication number96191152.2, CN 1165568 A, CN 1165568A, CN 96191152, CN-A-1165568, CN1165568 A, CN1165568A, CN96191152, CN96191152.2, PCT/1996/2858, PCT/JP/1996/002858, PCT/JP/1996/02858, PCT/JP/96/002858, PCT/JP/96/02858, PCT/JP1996/002858, PCT/JP1996/02858, PCT/JP1996002858, PCT/JP199602858, PCT/JP96/002858, PCT/JP96/02858, PCT/JP96002858, PCT/JP9602858
Inventors佐藤尚
Applicant精工爱普生株式会社
Export CitationBiBTeX, EndNote, RefMan
External Links: SIPO, Espacenet
Active matrix substrate
CN 1165568 A
Abstract  translated from Chinese
能够削减反交错结构的非晶硅薄膜晶体管制造工序的新制造方法、具备用其制造方法做成的静电保护装置的有源矩阵基板及使用了其基板的液晶显示装置。 The new method of manufacturing an amorphous silicon thin film transistor manufacturing process of a reverse stagger structure can be reduced, with the electrostatic protection device made by the method of manufacturing an active matrix substrate and its substrate using a liquid crystal display device. 在薄膜晶体管的制造工序中同时形成连接孔和用于连接外部端子的开口,并都把ITO膜作为布线使用。 In the manufacturing process of a thin film transistor formed simultaneously connecting hole and an opening for connecting an external terminal, and regard the use of the ITO film as a wiring. 静电保护装置由连接在用于连接在外部端子的电极(压焊区)和共用电位线之间的、用MOS晶体管构成的双向二极管(静电保护元件)组成。 An electrostatic protection device is connected to the electrodes by the external connecting terminals (bond pads) and the common potential line is used between the bidirectional diodes MOS transistor (electrostatic protection element) composition. 静电保护元件实质上是晶体管,电流容量大,还有,能够直接使用象素部分的TFT形成工序形成而不使工序复杂化。 Electrostatic protection element is essentially the transistor, a large current capacity, as well, to directly use the pixel portion of the TFT is formed without making the process step of forming complicated.
Claims(15)  translated from Chinese
1.一种薄膜元件的制造方法,包括下述(A)~(H)制造工序:(A)在基板上形成栅极电极层及用与该栅极电极层相同材料构成的栅极电极材料层的工序;(B)在上述栅极电极层及栅极电极材料层上形成栅极绝缘膜的工序;(C)在上述栅极绝缘膜上,在具有和上述栅极电极层平面重迭的形态下形成沟道层和欧姆接触层的工序;(D)形成连接于上述欧姆接触层的源极电极层及漏极电极层的工序;(E)用刻蚀除去存在于上述源极电极层和漏极电极层之间的上述欧姆接触层的工序;(F)形成保护膜以便复盖上述源极电极层、漏极电极层以及上述栅极电极材料层的工序;(G)选择性地刻蚀存在于上述栅极电极层或上述栅极电极材料层上的上述栅极绝缘膜以及上述保护膜的部分重迭膜,形成使上述栅极电极层或栅极电极材料层的部分表面露出的第1开口,同时选择性地刻蚀上述源极电极层或漏极电极层上的上述部分绝缘膜形成使上述源极电极层或漏极电极层的部分表面露出的第2开口的工序;(H)经由上述第1开口或第2开口把导电性材料层连接到上述栅极电极层、栅极电极材料层、上述源极层、漏极电极层的至少一个上的工序。 1. A method of manufacturing a thin film device, comprising the following (A) ~ (H) manufacturing process: (A) a gate electrode formed on a substrate with a layer of gate electrode material is the same material as the gate electrode layer is formed and Step layer; (B) on said gate electrode layer and a gate electrode material layer step of forming a gate insulating film; (C) in the gate insulating film, and said gate electrode having a layer plane overlap channel layer and a step of forming an ohmic contact layer under the form; (D) a step of forming the ohmic contact layer connected to said source electrode layer and a drain electrode layer; (E) is removed by etching in the presence of the above-described source electrode said step of ohmic contact layer and a layer between the drain electrode layer; (F) forming a protective film so as to cover the step of the source electrode layer, the drain electrode layer and said gate electrode material layer; (G) selectivity etching the gate electrode layer is present in the gate insulating film or the gate electrode material layer and said protective film partially overlaps the film is formed so that the gate electrode layer or the gate electrode material layer portion of the surface exposing the first opening, while selectively etched above the source electrode layer or the drain electrode layer part of the insulating film is formed on the second step of making the opening of the source electrode layer or a drain electrode layer exposed on the surface of the part ; (H) via the first opening or the second opening of the conductive material layer is connected to the gate electrode layer, a gate electrode material layer, at least one of the step of the source layer, the drain electrode layer.
2.权利要求1中所述的薄膜元件的制造方法,其特征在于:上述工序(G)中形成的上述第1开口是用于把布线连接到上述栅极电极材料层的连接孔,或是用于把外部端子连接到上述栅极电极材料层的开口。 The method of manufacturing a thin film device described in claim 1, wherein: said step (G) formed in said first opening is a hole for connecting the wiring is connected to the gate electrode material layer, or means for connecting the external terminal to said gate electrode material layer of the opening.
3.权利要求1中所述的薄膜元件的制造方法,其特征在于:上述导电性材料层由ITO(Indium Tin Oxide)构成。 The method of manufacturing a thin film device described in claim 1, wherein: said conductive material layer composed of ITO (Indium Tin Oxide) constituted.
4.一种有源矩阵基板,该基板的构成包含连到在配置成矩阵状的扫描线和信号线上的薄膜晶体管(TFT)和连接到其薄膜晶体管一端的象素电极的象素部分,其特征在于:具备设置在上述扫描线及信号线中至少一条线或与其线电等效的部位和共用电位线之间的、使用了薄膜晶体管的防止静电破坏用装置;上述防止静电破坏用装置构成为包含连接薄膜晶体管中的栅极电极层和源、漏电极层而构成的二极管;在同一制造工序中形成用于电连接上述栅极电极层和源、漏极电极层的、选择性地除去上述栅极电极层上的绝缘层构成的第1开口和选择性地除去上述源、漏极电极层上的绝缘层构成的第2开口,而且,经由上述第1及第2开口,用和上述象素电极相同材料构成的导电材料层连接上述栅极电极层和上述源、漏电极层。 4. An active matrix substrate, comprising forming the substrate is connected to the arranged in a matrix of scanning lines and signal lines of a thin film transistor (TFT) and a pixel portion which is connected to one end of the thin film transistor pixel electrodes, characterized in that: a set of said scanning lines and signal lines or in at least one line equivalent thereto radio portion and the common potential line between uses to prevent electrostatic damage to the thin film transistor with the means; said to prevent electrostatic discharge by means configured to include a diode connected to the gate electrode of the thin film transistor layer and the source, the drain electrode layer formed therebetween; is formed in the same manufacturing process for electrically connecting the gate electrode layer and the source, the drain electrode layer, selectively removing selectively the first opening and the insulating layer on the gate electrode layer constituting the insulating layer is removed above the source, the drain electrode layer formed on the second opening, and, through the first and second openings, and with a conductive material layer of the same material of the pixel electrode connected to said gate electrode layer and said source and drain electrode layer.
5.权利要求4中所述的有源矩阵基板,其特征在于:上述第1开口贯通栅极电极材料层上的第1绝缘膜及该第1绝缘膜上的第2绝缘膜的重迭膜而形成,上述第2开口仅贯通源、漏极电极层上的上述第2绝缘膜而形成。 The active matrix substrate as described in claim 4, characterized in that: a first insulating film and overlapping film is an opening through the first gate electrode material layer on the first insulating film, a second insulating film is formed, the second opening only through the source, said second insulating film on the drain electrode layer is formed.
6.权利要求4中所述的有源矩阵基板,其特征在于:上述象素电极以及与象素电极相同材料构成的上述导电材料层由ITO(Indium Tin Oxide)膜构成。 The active matrix substrate as described in claim 4, characterized in that: said pixel electrode and said conductive material layer and the pixel electrode formed of the same material as ITO (Indium Tin Oxide) film.
7.权利要求4中所述的有源矩阵基板,其特征在于:与上述扫描线及上述信号线中至少一条线电等效的部位是用于连接外部端子的电极(压焊区),另外,上述共用电位线是在交流驱动液晶之际给出作为基准的基准电位的线(LC-COM线)或者液晶显示装置的制造阶段,把用于连接上述外部端子的电极共同连接起来形成等电位的线(保护环)。 The active matrix substrate as described in claim 4, characterized in that: said scanning lines and said signal lines and at least one line electrically equivalent portion is connected to external electrode terminals (bonding pads) for additional , the common potential lines in AC driving the liquid crystal is given as a reference on the occasion of the reference potential line (LC-COM line) or a liquid crystal display device manufacturing stage, the electrode is connected to the external terminals commonly connected together to form an equipotential The line (guard ring).
8.权利要求7中所述的有源矩阵基板,其特征在于:上述防止静电破坏用保护装置设置在用于连接上述外部端子的电极(压焊区)和交流驱动上述液晶之际给出作为基准电位的线(LC-COM线)之间,以及将连接上述外部端子的电极(压焊区)和把连接上述外部端子的电极(压焊区)共同连接起来构成等电位的线(保护环)之间这两者上。 The active matrix substrate as described in claim 7, characterized in that: said electrostatic breakdown preventing means is provided with a protective electrode connecting the external terminals (bond pads) and for AC driving the liquid crystal is given as the occasion between the reference potential line (LC-COM line), and connecting the external electrode terminals (bonding pads) and the external terminal electrodes connected to the (pressure pads) are commonly connected together constitute equipotential lines (guard ring on between the two).
9.权利要求4中所述的有源矩阵基板,其特征在于:上述防止静电破坏用装置具备把第1二极管的阳极和第2二极管的阴极共同连接,把上述第1二极管的阴极和上述第2二极管的阳极共同连接构成的双向二极管。 The active matrix substrate as described in claim 4, characterized in that: said electrostatic breakdown preventing means provided with the anode of the first diode and the cathode of the second diode are connected in common to the cathode of said first diode and the first 2 diode anode composed of bidirectional diodes are connected in common.
10.一种液晶显示装置,该装置使用权利要求4~权利要求9的任一项中所述的有源矩阵基板构成。 10. A liquid crystal display apparatus as claimed in claim 4 to use an active matrix substrate according to any one of claim 9 in the configuration.
11.一种有源矩阵基板的制造方法,其特征在于经过包含下述(A)~(G)的制造工序的基板制造工序来制造有源矩阵基板:(A)在基板上形成栅极电极层以及以与该栅极电极层同一材料构成的栅极电极材料层的工序;(B)在上述栅极电极层及栅极电极材料层上形成栅极绝缘膜的工序;(C)在上述栅极绝缘膜上,在具备与上述栅极电极层平面重迭的形态下形成沟道层和欧姆接触层的工序;(D)在形成连接在上述欧姆接触层的源漏电极层的同时,在上述绝缘膜上预定区域形成以与上述源、漏极电极相同材料构成的源、漏极电极材料层的工序;(E)形成保护膜使之复盖上述源、漏电极层以及上述源、漏电极材料层的工序;(F)选择性地刻蚀存在于上述栅极电极层或栅极电极材料层上的上述栅极绝缘膜及上述保护膜的重迭膜,形成使上述栅极绝缘层或上述电极材料层的部分表面露出的第1开口,同时,选择性地刻蚀上述源、漏极电极层或上述源、漏极电极材料层上的上述保护膜,形成使上述源、漏极电极层或上述源、漏极电极材料层的部分表面露出的第2开口的工序;(G)经由上述第1或第2开口把导电性材料层连接到上述栅极电极层、上述栅极电极材料层,上述源、漏电极或上述源、漏电极材料层的工序。 11. A method of manufacturing an active matrix substrate, wherein the substrate after the manufacturing process comprising the following (A) ~ (G) to a manufacturing process of manufacturing an active matrix substrate: (A) forming a gate electrode on the substrate layer and a step to the gate electrode layer of the same material of the gate electrode material layer; (B) a step of forming a gate insulating film on the gate electrode layer and a gate electrode material layer; (C) in the above a gate insulating film, comprising a step in the channel layer and the ohmic contact layer and the lower plane of the gate electrode layer overlapping morphogenesis; (D) are formed simultaneously in the source and drain is connected to the ohmic contact layer, electrode layer, In the above-described insulating film formed in step with a predetermined region above the source, the drain electrode of the same material of the source and drain electrode material layer; (E) so as to form a protective film covering said source, drain and said source electrode layer, Step drain electrode material layer; (F) selectively etching said overlap exists in the protective film on the gate insulating film and the gate electrode film layer or the gate electrode material layer is formed so that the gate insulating or part of the surface layer of the electrode material layer exposed first opening, while selectively etching said source, said source or drain electrode layer, the protective film on the drain electrode material layer is formed so that said source, drain said source electrode layer or the step portion of the surface of the exposed drain electrode material layer a second opening; (G) via the first or second opening of the conductive material layer is connected to the gate electrode layer, the gate electrode material layer, said source, drain, or said source, drain electrode material layer step.
12.权利要求11中所述的有源矩阵基板的制造方法,其特征在于:通过经由权利要求11的工序(A)~(G),在上述有源矩阵基板上形成;连接扫描线和信号线的薄膜晶体管(TFT);连接在上述薄膜晶体管上的象素电极;连接上述薄膜晶体管的栅极电极层及源、漏电极层而构成的防止静电破坏的用二极管。 12. The manufacturing method according to claim 11 of an active matrix substrate, wherein: the step via the claim (A) 11 of ~ (G), on the active matrix substrate; scanning lines and signal connection line of a thin film transistor (TFT); on the pixel electrode connected to the thin film transistor; the thin film transistor connected to the gate electrode layer and the source, the drain electrode layer formed therebetween to prevent electrostatic breakdown diode.
13.权利要求11中所述的有源矩阵基板的制造方法,其特征在于:作为上述工序(G)中的导电性材料层使用由和象素电极相同材料构成的层。 13. A manufacturing method according to claim 11 of an active matrix substrate, wherein: the use and the pixel electrode layer is made of the same material as the above step (G) of the conductive material layer.
14.权利要求11中所述的有源矩阵基板的制造方法,其特征在于:作为上述工序(G)中的导电性材料层使用ITO(Indium TinOxide)。 14. The manufacturing method according to claim 11 of an active matrix substrate, wherein: as the step (G) of the conductive material layer using ITO (Indium TinOxide).
15.一种防止在有源矩阵型液晶显示装置中包含的有源元件的静电破坏的方法,该有源矩阵型液晶显示装置的构成包括连接到矩阵状配置的扫描线和信号线上的薄膜晶体管(TFT)以及连接在该薄膜晶体管一端上的象素电极的象素部分,其特征在于:把权利要求4中所述的静电保护装置连接在上述扫描线及信号线中至少一条线或与该线电等效的部位和共用电位线之间,由此防止液晶显示装置中包含的有源元件的静电破坏。 15. A method of preventing electrostatic apparatus included in the destruction of active elements in an active matrix type liquid crystal display, the active matrix type liquid crystal display device includes a connection configured to a thin film arranged in a matrix of scanning lines and signal lines transistor (TFT) and a thin film transistor connected to the pixel portion at one end of the pixel electrode, wherein: the electrostatic protection device according to claim 4 is connected to the scanning lines and signal lines or in at least one line and The line between the electrical equivalent of parts and common potential line, thereby preventing the liquid crystal display device comprising the electrostatic destruction of the active element.
Description  translated from Chinese
有源矩阵基板 The active matrix substrate

技术领域 FIELD

本发明涉及薄膜元件的制造方法、有源矩阵基板、液晶显示装置、有源矩阵基板的制造方法以及包含于液晶显示装置中的有源元件的防止静电破坏的方法。 The present invention relates to a method for producing a membrane element, the active matrix substrate, a liquid crystal display device manufacturing method, comprising the active matrix substrate and a method for preventing electrostatic discharge damage of the active device of a liquid crystal display element.

背景技术 BACKGROUND

在有源矩阵基板方式的液晶显示装置中,在各象素电极上连接着开关元件,借助于这些开关元件接通或断开各象素电极。 The liquid crystal in the active matrix substrate of a display device, each pixel electrode is connected to the switching element, by means of which the switching element is turned on or off each pixel electrode.

作为开关元件,例如使用薄膜晶体管(TFT)。 As the switching element, for example a thin film transistor (TFT).

薄膜晶体管的结构和工作基本上和单晶硅的MOS晶体管相同。 Construction and operation of single-crystal silicon thin film transistor and a MOS transistor is substantially the same.

作为使用了非晶硅(α-Si)的薄膜晶体管的结构已知有若干种,而一般使用栅极电极位于非晶硅膜下边的背栅极结构(反交错结构)。 As the use of amorphous silicon (α-Si) thin film transistor structures are known number of species, but in general the use of the gate electrode is located below the amorphous silicon film back gate structure (inverted staggered structure).

在薄膜晶体管的制造中,重要的是减少制造工序数而且确保高合格率。 In manufacturing a thin film transistor, it is important to reduce the number of manufacturing steps and ensure high yield.

另外,有效地保护薄膜晶体管免受在有源矩阵基板的制造过程中发生的静电引起的破坏也很重要。 Further, to effectively protect the electrostatic destruction caused by the thin film transistor from occurring in the manufacturing process of the active matrix substrate is also very important. 保护薄膜晶体管免受静电破坏的技术例如记述在日本国的实开昭63-33130号的微型胶片和特开昭62-187885号公报中。 Protection from electrostatic damage to the thin film transistor technologies such as described in Japanese Unexamined Patent Publication 63-33130 number of micro-film and Unexamined Patent Publication No. 62-187885 Gazette.

发明的公开本发明的目的之一是提供能够削减薄膜晶体管的制造工序数而且高可靠性的新的薄膜元件的制造加工技术。 DISCLOSURE OF THE INVENTION One object of the present invention is to provide a number of manufacturing steps can be reduced and a thin film transistor with high reliability manufacturing process of a thin film technology and new elements.

还有,本发明的另一个目的是提供具备使用其制造加工技术不使制造工艺复杂化而形成的、具有充分静电保护能力的保护元件的有源矩阵基板以及液晶显示装置。 Yet another object of the present invention is to provide a manufacturing process which includes the use of technology not to complicate the manufacturing process is formed, having a sufficient protection against static electricity protection element of the active matrix substrate and a liquid crystal display device.

还有,本发明的又一个目的是提供能够防止包含在TFT基板上的有源元件(TFT)遭受静电破坏的防止静电破坏的方法。 Further, still another object of the present invention is to provide to prevent electrostatic discharge can be prevented in the method of the TFT substrate comprising an active element (TFT) from electrostatic damage.

本发明的薄膜元件的制造方法的优选形态之一是在制造背栅极结构的薄膜元件时,包括:形成保护膜以便复盖源极电极层漏极电极层以及栅极电极材料层的工序;形成第1开口和第2开口的工序,在形成了保护膜之后,选择性地刻蚀存在于栅极电极层或栅极电极材料层上的栅极绝缘膜以及保护膜的重迭膜的一部分,形成露出栅极电极层或栅极电极材料层表面上一部分的第1开口,同时,选择地刻蚀源极电极层或漏极电极层上的保护膜的一部分,形成露出源极电极层或漏极电极层表面上一部分的第2开口;连接工序,在形成上述开口之后,经由第1或第2开口,把导电性材料层连接到栅极电极层、栅极电极材料层、源极电极层、漏极电极层中的至少一个上。 When one preferred embodiment of the method of manufacturing a thin film device of the present invention is that in the back-gate structure thin-film element, comprising: forming a protective film so as to cover the source electrode layer, the drain electrode layer and a step of a gate electrode material layer; forming a first opening and a second opening step, after formation of a protective film, selectively etching the gate insulating film is present in a portion of the gate electrode layer or the gate electrode material layer and the protective film overlapping film forming a gate electrode on the exposed layer or gate electrode material layer on the surface of the first portion of the opening, while selectively etched portion of the protective film, a source electrode layer or a drain electrode layer, forming a source electrode layer or the exposed the upper surface of the second opening portion of the drain electrode layer; connection step, after forming the opening, through the first or the second opening, the conductive material layer is connected to the gate electrode layer, a gate electrode material layer, a source electrode layer, a drain electrode layer on at least one.

若依据上述薄膜元件的制造方法,则可成批地进行绝缘膜的选择性刻蚀。 If based on the above-described method for manufacturing a thin film element, can be carried out in batches selectively etching the insulating film. 由此,能够把外部连接端子连接到电极的开口形成工序(压焊区露出工序)和把内部布线连接到电极上的开口形成工序(连接孔形成工序)一起来进行,削减了工序数。 Thereby, it is possible to connect an external connecting terminal electrodes are formed to the opening step (bonding pads exposing step), and the internal wiring connected to the electrode on the opening forming step (a connection hole forming step) carried out together, reducing the number of steps.

作为“导电性材料层”,最好使用ITO(Indium Tin Oxide)膜。 As "the conductive material layer" is preferably used ITO (Indium Tin Oxide) film. 如上述,由于贯通栅极电极材料层上的第1绝缘膜及该第1绝缘膜上的第2绝缘膜的重迭膜形成第1开口,故构成相当于2层绝缘膜厚度的深连接孔。 Deep connection hole as described above, due to the overlap of the first insulating film, the film of the second insulating film through the first insulating film and the gate electrode material layer is formed on the first opening, it is equivalent to 2 constituting the interlayer insulating film thickness .

然而,由于ITO熔点高,故与铝等相比较台阶复盖率好,从而,即使经由深连接孔也不会造成连接不良。 However, since the ITO high melting point, it is compared with aluminum, the rate of good step coverage, and thus, even if it will not cause a bad connection via a deep connection hole.

作为“导电性材料层”,除去ITO之外,也可以使用金属氧化物那样熔点高的、其它的透明电极材料。 As "the conductive material layer", except for ITO, a metal oxide may also be used as a high melting point, the other transparent electrode material. 例如,可以使用SnOx、ZnOx等金属氧化物。 For example, SnOx, ZnOx other metal oxides. 这种情况下,台阶复盖率也是可实用的。 In this case, the step coverage ratio is practically useful.

另外,本发明的有源矩阵基板的优选形态之一是在扫描线及信号线中的至少一条线或者与该线电气等效部位和共用电位线之间设置使用了薄膜晶体管的防止静电破坏用保护装置。 Further, one preferred embodiment of the active matrix substrate of the present invention is provided the use of a thin film transistor to prevent static electricity between the scanning lines and signal lines or in at least one line electrically equivalent to the line parts and the common potential line blasting protection device.

防止静电破坏保护装置构成为包含连接了薄膜晶体管中的栅极电极层和漏极电极层而构成的二极管,在同一制造工序中,形成用于把栅极电极层和漏极电极层电气连接的选择性地除去栅极电极层上的绝缘层而构成的第1开口和选择性地除去漏极电极层上的绝缘层而构成的第2开口,而且,上述栅极电极层和上述漏极电极层经由上述第1及第2开口,用和上述象素电极同一材料组成的导电层连接在一起。 To prevent electrostatic discharge protection device is configured to include a diode connected to the thin film transistor gate electrode layer and the drain electrode layer formed in the same manufacturing process for forming the gate electrode layer and a drain electrode layer is electrically connected selectively removing the insulating layer on the gate electrode layer is constituted by a first opening and selectively removing the insulating layer and the drain electrode layer formed on the second opening, and the gate electrode layer and said drain electrode layer via the first and second openings, the conductive layer are connected together and said pixel electrodes with the same material.

把TFT的栅极和漏极短路形成的MOS二极管(MIS二极管)实质上是晶体管,流过电流的能力高,能够高速地吸收静电,从而静电保护能力高。 The gate and drain of the TFT formed by the short-circuit MOS diode (MIS diode) is essentially the transistor, the current flowing through a high capacity, a high speed absorbing static electricity, so that a high protection against static electricity. 还有,由于实际上是晶体管,故容易控制电流-电压特性的阈值电压(Vth)。 Further, since the transistors in fact, it is easy to control the current - voltage characteristics of the threshold voltage (Vth). 从而,能够减少无用的泄放电流。 Thus, it is possible to reduce unwanted leakage current. 另外,薄膜元件的制造工序数被减少,制造容易。 Further, the number of manufacturing steps of the thin film element is reduced, manufacturing is easy.

作为“象素电极”及“和象素电极同一材料组成的导电层”最好使用ITO(Indium Tin Oxide)膜。 As "pixel electrodes" and "the pixel electrode and the conductive layer of the same material" is preferable to use ITO (Indium Tin Oxide) film. 除ITO膜之外,也可以使用金属氧化物那样的高熔点的其它透明电极材料。 In addition to the ITO film, the transparent electrode can use other materials as high melting point metal oxide. 例如,可以使用SnOx、ZnOx等金属氧化物。 For example, SnOx, ZnOx other metal oxides.

本发明的有源矩阵基板的优选形态之一中上述“和扫描线及信号线中至少一条线电气等效部位”是用于连接外部连接端子的电极(压焊区),还有,上述“共用电位线”是在交流驱动液晶之际给出作为基准的基准电位的线(LC-COM线),或者是在液晶显示装置的制造阶段把连接上述外部连接端子用的电极连接在一起形成等电位的线(保护环)。 One preferred embodiment of the electrode of the active matrix substrate of the present invention, the above-mentioned "and the scanning lines and signal lines in at least one line of the electric equivalent part" is used to connect the external connection terminal (bonding pad), as well as the " common potential line "in the AC driving of the liquid crystal is given as a reference on the occasion of the reference potential line (LC-COM line), or the manufacturing stage of the display electrode means connecting the external connection terminals connected together to form a liquid crystal, etc. line potential (guard ring).

保护环作为液晶显示装置制造阶段中的静电措施,是设在压焊区外侧的线。 Protection ring as a liquid crystal device manufacturing stage of static measures show that it is located in the outer area of the wire bonding. LC-COM线以及保护环都是共用电位线,从而,通过在压焊区和这些线之间连接保护二极管,能够使静电在这些线上释放。 LC-COM line and guard ring are common potential line, which, through the bonding area between these cable protection diodes, enabling electrostatic discharge in these lines.

还有,本发明的有效矩阵基板的优选形态之一中,“防止静电破坏用保护装置”设置在连接外部端子用的电极(压焊区)和在交流驱动液晶之际给出作为基准的基准电位的线(LC-COM线)之间,以及连接外部端子用的电极(压焊区)和把连接外部端子用的电极(压焊区)连接在一起形成等电位的线(保护环)之间这两者上。 Also, one preferred embodiment of active matrix substrate of the present invention, "to prevent electrostatic discharge protection device with" a reference electrode disposed in the connection with the external terminals (bond pads) and are given as a reference in the occasion of the liquid crystal AC driving potential between the lines (LC-COM line), as well as connecting electrodes (bonding pads) and use an external terminal connected to an external terminal electrodes used (pressure pads) joined together to form equipotential lines (guard ring) of on between the two.

保护环在把TFT基板和对向基板(彩色滤波器基板)粘接之后,在与驱动用IC连接前切断,但LC-COM线是留在最终制品中的线。 Protection of the loops in the TFT substrate and then bonded to the substrate (color filter substrate), before cutting the IC is connected to the drive, but LC-COM line is left in the final product. 从而,在基板切断后但连接LC之前,若依据上述结构,则保护象素部分的TFT免遭静电破坏,从而,提高制品的可靠性。 Whereby, after the substrate is cut but before connecting LC, if based on the above-described configuration, the pixel portion TFT protection from electrostatic breakdown, thereby, improve the reliability of products.

还有,由于在最终制品中也留有保护二极管,故也提高了制品实际使用中的抗静电破坏的强度。 Also, since in the final product is also left protection diode, it is also to improve the strength of the product in actual use antistatic destruction. 进而,由于是使用了TFT的保护二极管,故容易控制阈值电压(Vth),还能够减少泄放电流,因而,即使在最终制品中留有二极管也没有不良影响。 Further, since a TFT using protective diodes, it is easy to control the threshold voltage (Vth), but also can reduce the leakage current, therefore, even if left diode in the final product is no adverse effect.

还有,本发明的有源矩阵基板制造方法的优选形态之一中,防止静电破坏用保护装置具备把第1二极管的阳极和第2二极管的阴极连接在一起,把上述第1二极管的阴极和上述第2二极管的阳极连接在一起而构成的双向二极管。 Also, one preferred embodiment of an active matrix substrate manufacturing method of the present invention to prevent electrostatic discharge comprising the anode of the first diode and the second diode cathode connected together by protection devices, the cathode of said first diode and the anode of said second diode connected together to form a bi-directional diode.

由于是双向保护二极管,因而能够从正极性冲击和反极性冲击这两个方面保护TFT。 Because it is a two-way protection diodes, which can be protected from the positive polarity TFT impact and the impact of these two aspects of reverse polarity.

还有,本发明的液晶显示装置使用本发明的有源矩阵基板构成。 Further, the liquid crystal display device of the present invention is the use of the present invention is constituted of the active matrix substrate. 通过切实地防止有效矩阵基板中象素部分的有源元件(TFT)的静电破坏,也提高了液晶显示部分的可靠性。 By reliably preventing the active element in the effective pixel portion of the matrix substrate (TFT) of the electrostatic discharge damage, but also to improve the reliability of the liquid crystal display portion.

还有,本发明的有源矩阵基板制造方法的优选形态之一中,在形成背栅结构的TFT之际,包括:形成工序,在形成由相同材料构成的源漏电极层的同时,在绝缘膜上的预定区域中形成和源漏电极层相同材料构成的源漏电极材料层;保护膜形成工序,形成保护膜使之复盖源漏电极层以及源漏电极材料层;形成工序,选择性地刻蚀存在于栅极电极层或栅极电极材料层上的栅极绝缘膜以及保护膜的重迭膜形成露出栅极电极层或栅极电极材料层的表面上一部分的第1开口,同时,选择性地刻蚀源漏电极层或源漏电极材料层上的保护膜形成露出上述源漏极电极层或源漏极电极材料层的表面上一部分的第2开口;连接工序,经由上述第1或第2开口,把导电性材料连接到栅极电极层、栅极电极材料层、上述源漏电极层或上述源漏极电极材料层。 Also, one preferred embodiment of the method of manufacturing an active matrix substrate of the present invention, on the occasion of forming the back gate TFT structure, comprising: a forming step, while forming source and drain electrode layer composed of the same material, the insulating film formed in the predetermined region and the source and drain electrode material layer source and drain electrode layer of the same material; protective film forming process, a protective film so as to cover the source and drain electrode layer, and forming source and drain electrode material layer; forming step, selective etching the gate electrode layer or present in the gate insulating film on the gate electrode material layer and the protective film is formed overlapping film on the exposed gate electrode layer or the gate electrode material layer surface of the first portion of the opening, while selectively etching the source and drain electrode layer or a protective film on the source electrode material layer is formed on the exposed surface of the drain the source or drain electrode layer source and drain electrode material layer of the second portion of the opening; connection step, through the first 1 or the second opening, the conductive material is connected to the gate electrode layer, a gate electrode material layer, said source and drain electrode layer or the source and drain electrode material layer.

若依据上述薄膜元件的制造方法,则可成批进行绝缘膜的选择性刻蚀。 If based on the above-described method for manufacturing a thin film device, selectively etching may be batch insulating film. 由此,能够把外部端子连接到压焊区的开口形成工序(压焊区露出工序)和把布线连接到电极上的开口的形成工序(连接孔形成工序)一起进行,削减了工序数。 Thereby, it is possible to connect an external terminal to the opening of the pressure pad forming step (step of exposing a bonding pad) and a wiring connected to the electrode on the opening forming step (a connection hole forming step) carried out together with reduction of the number of steps.

该制造方法在作为静电保护元件的MOS二极管的形成方面也可应用。 This manufacturing method in terms of formation of the electrostatic protection element as MOS diode may be used. 另外,还能够用于压焊区近旁的交叉布线的形成。 In addition, can also be used to form the bonding region in the vicinity of the cross wiring. 所谓“交叉布线”是把液晶显示装置的内部布线导出到密封材料的外侧之际,为谋求由厚的层间绝缘膜造成的布线的保护,把位于上层的布线连接到下层的布线上并迂回导出到外部而使用的布线。 The so-called "cross-wiring" is the internal wiring of the liquid crystal display device is exported to the outside of the sealing material occasion, to seek protection from the wiring between the thick layer of insulating film due to the upper level of the wiring is connected to the upper and lower wiring and detour Exporting the wiring to the outside and used.

上述“导电性材料层”最好和象素电极是同一材料。 The above-mentioned "electrically conductive material layer" and the pixel electrode is preferably the same material. 由此,能够在象素电极的形成工序的同时形成由导电性材料构成的布线。 Thereby, it is possible while the pixel electrode forming step of forming a wiring of a conductive material.

进而,作为“导电性材料层”最好使用ITO(Indium Tin Oxide)膜。 Further, as "conductive material layer" is preferable to use ITO (Indium Tin Oxide) film. 除去ITO膜之外,也可以使用金属氧化物这样的高熔点的其它透明电材料。 Outside of the ITO film is removed, may be used other transparent dielectric material such as a high melting point metal oxide.

还有,本发明的有源矩阵型液晶显示装置中的防止静电破坏法的优选形态之一中,把由双向二极管组成的防止静电破坏用保护装置连接在扫描线及信号线中至少一条线或与其线电气等效的部件和共用电位线之间,由此,防止包含于液晶显示装置中的有源元件的静电破坏。 Further, the active matrix type liquid crystal display of the present invention to prevent electrostatic breakdown of a preferred embodiment of the apparatus in the method, the composition of the bidirectional diode to prevent electrostatic discharge protection device is connected with the scanning lines and signal lines or in at least one line line between its electrical equivalent elements and the common potential line, thereby preventing contained in the liquid crystal display device of the electrostatic destruction of the active element.

能够可靠地防止包含于有源矩阵基板上的有源元件(TFT)的静电破坏。 Can be reliably prevented on the active matrix substrate comprising an active element (TFT) of the electrostatic breakdown.

附图的简单说明图1~图6是示出本发明的薄膜元件的制造方法的、每个工序的元件断面图。 Brief Description of the Figures 1 to 6 are diagrams showing a method of manufacturing a thin film device of the present invention, a sectional view of each process element.

图7A~图7F用于说明图1~图6所示的制造加工技术的特征。 Figure 7A ~ 7F, manufacturing and processing techniques used to illustrate the features of Figs. 1 to FIG. 6.

图8A~图8G是对比例的各工序的元件断面图。 Figure 8A ~ FIG. 8G is a sectional view of the component ratio of the respective steps.

图9示出本发明的TFT基板的结构例。 Figure 9 shows a configuration of a TFT substrate of the present invention.

图10示出图9的TFT基板的压焊区周边的结构。 Figure 10 shows a TFT substrate in Fig. 9 the periphery of the pressure pad structure.

图11A示出静电保护电路的结构,图11B示出静电保护电路的等效电路图,图11C示出静电保护电路的电压-电流特性。 11A shows the structure of the electrostatic protection circuit, Fig. 11B illustrates an equivalent circuit diagram of the electrostatic protection circuit, Fig. 11C shows an electrostatic protection circuit voltage - current characteristic.

图12示出静电保护电路的平面布局形状。 Layout shape Figure 12 shows the electrostatic protection circuit.

图13使用元件的断面结构说明图12的静电保护电路的结构。 Figure 13 a cross-sectional structure of an explanatory configuration diagram of elements used electrostatic protection circuit 12.

图14用于说明静电保护电路的功能。 Figure 14 is used to illustrate the function of electrostatic protection circuit.

图15示出把液晶面板的布线导出到连接压焊区情况时的结构例。 Figure 15 shows the derived structure of the liquid crystal panel wiring to Example bonding pads of situations.

图16例示了本发明的有源矩阵基板中除去象素部分的区域的ITO的使用部位。 Figure 16 cases of the active matrix substrate of the present invention illustrating the removal of a region of the pixel portion ITO site of use.

图17示出本发明的液晶显示装置中的象素部分的平面布局形状。 Figure 17 illustrates the present invention, a liquid crystal display device in the shape of the planar layout of the pixel portion.

图18是沿图17的BB线的液晶显示装置的断面图。 FIG 18 is a liquid crystal 17 along the line BB sectional view of a display device.

图19~图25分别是示出本发明的有源矩阵基板的制造方法的、各工序的元件断面图。 19 to 25 are diagrams showing a method of manufacturing the active matrix substrate of the present invention, each step of the element cross-sectional view.

图26示出使用图25的有源矩阵基板组装的液晶显示装置的主要部分的断面结构。 Figure 26 illustrates the use of the active matrix substrate 25 of a liquid crystal display assembled cross-sectional structure of the main portion of the device.

图27是用于说明基于元件分断装置的基板的分断工序的说明图。 Figure 27 is an explanatory diagram illustrating breaking step breaking device element substrate based.

图28是用于说明有源矩阵型的液晶显示装置的总体结构的概要的说明图。 FIG 28 is a view for explaining an active matrix type liquid crystal display apparatus of an outline of the overall configuration of Fig.

图29是示出有源矩阵型的液晶显示装置的象素部分的结构的电路图。 29 is a diagram showing a circuit diagram of an active matrix type liquid crystal device structure of the pixel portion of the display.

图30示出用于驱动图29的象素部分中的液晶的电压波形。 Figure 30 shows voltage waveforms for driving the pixel portion in Fig. 29 of the liquid crystal.

用于实施发明的最佳形态下面,参照附图说明本发明的实施形态。 BEST MODE FOR CARRYING OUT THE INVENTION Referring to the drawings embodiments of the present invention will be described.

(第1实施形态)图1~图6是示出本发明的薄膜元件(背栅结构的TFT)的制造方法一例的、各工序的元件断面图。 (First embodiment) Figs. 1 to 6 is a diagram showing a method of manufacturing a thin film element of the present invention (the back-gate structure TFT) is an example, each step of the element cross-sectional view.

(各制造工序的内容)(工序1)如图1所示,在玻璃基板(无碱基板)2上使用光刻技术,形成例如由1300左右厚度的Cr(铬)构成的栅极电极4a以及栅极电极材料层4b、4c。 (The contents of each of the manufacturing process) (Step 1) shown in Figure 1, in the use of a photolithography technique on a glass substrate 2 (alkali-free substrate), a gate electrode is formed by the left and right 1300 thickness of Cr (chromium) formed e.g. 4a and a gate electrode material layer 4b, 4c. 栅极电极4a是在象素部分上形成矩阵状的背栅结构的TFT的栅极电极。 The gate electrode 4a is formed in a matrix on the back-gate structure TFT gate electrode of the pixel portion. 另外,栅极电极材料层4b成为形成后述的防止静电破坏用保护元件的区域,还有,栅极电极材料层4c成为形成与外部连接用或检查用端子的区域。 Further, the gate electrode material layer 4b formed after becoming described later to prevent electrostatic breakdown protective element region, as well as, the gate electrode material layer 4c is formed and becomes the external connection terminals for inspection or region.

接着,用等离子CVD法连续地生成硅氮化膜SiNx等构成的栅极绝缘膜6、未掺入杂质的本征非晶硅膜8以及n型硅膜10(欧姆接触层),然后,用光刻法将本征非晶硅膜8以及n型硅膜(欧姆接触层)10形成小岛。 Then, by plasma CVD method for continuously forming a silicon nitride film SiNx and so on gate insulating film 6, is not adulterated intrinsic amorphous silicon film 8, and 10 (ohmic contact layer) n-type silicon film, and then, with photolithography island 10 is formed of intrinsic amorphous silicon film 8, and the n-type silicon film (ohmic contact layer).

这时,栅极绝缘膜6的厚度例如是约3000,本征硅膜8的厚度例如是约3000,欧姆接触层10的厚度例如是约500。 In this case, the thickness of the gate insulating film 6, for example, from about 3000, thickness of the intrinsic silicon film 8, for example, from about 3000, the thickness of the ohmic contact layer 10 is, for example, about 500.

本工序中的特征在于不形成对于栅极绝缘膜的连接孔。 This step is characterized by not forming a gate insulating film for the connection hole.

(工序2)接着,如图2所示,用溅射以及光刻形成例如由Cr(铬)构成的1300左右的源、漏电极12a、12b。 (Step 2) Next, as shown in Figure 2, for example, about the source 1300 by Cr (chromium) is formed by sputtering and photolithography, a drain electrode 12a, 12b.

(工序3)接着,如图3所示,以源、漏电极12a、12b为掩膜,用刻蚀法除去欧姆接触层10的中央部分,进行源、漏极的分离(分离刻蚀)。 (Step 3) Next, as shown in Figure 3, the source, the drain electrode 12a, 12b as a mask, removing the central portion of the ohmic contact layer 10 by etching, the source, the drain of the separation (separation etching). 这时,能够在同一刻蚀装置的同一腔内连续地进行用于源、漏极电极的图形的刻蚀和分离刻蚀。 At this time, the source can be continuously performed in the same chamber used for the same etching apparatus, the etching pattern and the drain electrode separation etch.

即,首先用Cl2族的刻蚀气体进行源漏极电极12a、12b的刻蚀,接着把刻蚀气体换为SF6族的气体可以进行欧姆接触层10的中央部分的刻蚀。 That is, the first etching with Cl2 gas Group source and drain electrodes 12a, 12b of the etching, the etching gas is then replaced with SF6 gas family may be etched central portion of the ohmic contact layer 10.

(工序4)接着,如图4所示,例如用等离子CVD法形成保护膜14。 (Step 4) Next, as shown in Figure 4, for example, by plasma CVD method to form a protective film 14. 该保护膜14例如是2000左右的氮化硅膜(SiNx)。 The protective film 14 such as a silicon nitride film is about 2000 (SiNx).

(工序5)接着,如图5所示,在保护膜14上形成用于连接外部端子(屏蔽线和IC的输出引线等)的开口20,同时形成连接孔16、18。 (Step 5) Next, as shown in Figure 5, the opening for connection to external terminals (IC shield wire and output lead, etc.) 20 is formed on the protective film 14, connection holes 16, 18 are formed simultaneously.

开口20和连接孔18贯通栅极绝缘膜16以及保护膜14而形成,连接孔16仅贯通保护膜14形成。 Opening 20 and the connection hole 18 through the gate insulating film 16 and a protective film 14 is formed, only connection hole 16 is formed through the protective film 14.

形成开口20及连接孔18之际,栅极电极材料层4b、4c分别起到刻蚀中止层(Stopper)的作用。 Forming a connection hole 20 and on the occasion of opening 18, the gate electrode material layer 4b, 4c respectively function as an etch stop layer (Stopper) is. 另外,在形成连接孔16之际,源、漏电极12b起到刻蚀中止层的作用。 Further, on the occasion of forming a connection hole 16, the source, the drain electrode 12b serves as an etch stop layer.

(工序6)接着,如图6所示,以500左右的厚度淀积ITO(Indium TinOxide)膜,选择性地刻蚀、形成ITO构成的布线22a及电极22b。 (Step 6) Next, as shown in Figure 6, is deposited to a thickness of about 500 ITO (Indium TinOxide) film, is selectively etched to form the wiring electrodes 22a and 22b ITO formed. ITO的刻蚀用HCl/HNO3/H2O的混合液的湿法刻蚀来进行。 ITO etching with HCl / HNO3 / H2O mixed solution of the wet etching is performed.

如上述,贯通栅极绝缘膜6及保护膜14的重迭膜形成开口20及连接孔18。 As described above, the overlap film 6 and protective film on the gate insulating film 14 is formed through the opening 20 and the connecting hole 18. 从而,构成相当于2层绝缘膜厚度的深连接孔。 Thus, constituting the equivalent of two layers deep connection hole insulating film thickness.

然而,由于ITO的熔点高故与铝相比台阶复盖率好,从而即使经由深连接孔也不会造成连接不良,另外,除ITO之外,也可以使用金属氧化膜这样的高熔点的其它透明电极材料。 However, since the ITO of high melting point as compared with the aluminum a good step coverage rate, even when connected via a deep hole will not cause a poor connection, Further, in addition to ITO, also possible to use other refractory metal such as an oxide film a transparent electrode material. 例如,可使用SnOx、ZnOx等金属氧化物。 For example, a SnOx, ZnOx other metal oxides. 在这样的情况下,台阶复盖率也是可实用化的。 In such a case, the step coverage ratio can also practical.

这样制造的背栅结构的TFT例如作为有源矩阵基板中象素部分的开关元件使用。 Back-gate structure TFT thus produced is used as a switching element such as an active matrix substrate in a pixel portion. 还有,由ITO构成的电极22b成为用于连接外部端子(IC的输出引线等)的压焊区。 Further, an electrode of ITO is formed for insulation 22b become connected to an external terminal region (IC output lead, etc.).

(本制造方法的特征)图7A~图7F示出有关图1~图6中记述的本实施形态的TFT的制造工序。 (Feature of the present manufacturing method) Fig. 7A ~ 7F, the present embodiment is shown in Figure 1 relating to FIG. 6 described in the TFT manufacturing process. 另一方面,图8A~图8G示出对比例的TFT的制造工序。 On the other hand, FIG. 8A ~ Figure 8G shows the comparative TFT manufacturing process. 该对比例是为了使有关本实施形态的TFT的制造方法的特征更明确而由本专利发明者设想出来的,不是以往的例子。 This comparative example is related to the present embodiment, in order to make the manufacturing method of the TFT characteristics clearer and conceived by the inventors of this patent, not a conventional example.

对比例的图8A和图7A相同。 The same Comparative Example 8A and 7A.

图8A~图8G中与图7A~图7F相同的部分上标注相同的参照编号。 Figure 8A ~ Fig. 8G and FIG. 7A ~ 7F FIG same parts denoted by the same reference numerals on.

对比例的情况,如图8B所示,在形成漏极电极层之前,形成连接孔K1,K2。 Comparative situation, shown in Figure 8B, before forming the drain electrode layer, forming a connection hole K1, K2.

而且,如图8C所示形成源、漏电极层12a、12b以及相同材料构成的源、漏电极材料12c、12d。 Moreover, the formation of the source shown in Figure 8C, the drain electrode layer 12a, the source 12b and the same material, the drain electrode material 12c, 12d.

接着,如图8D所示形成ITO膜30。 Next, an ITO film 30 shown in Figure 8D.

接着,如图8E所示进行欧姆层10的中央部分的刻蚀(分离刻蚀)。 Subsequently, as shown in the central portion of the etching performed 8E (separation etching) the ohmic layer 10 as shown.

接着,如图8F所示形成保护膜40。 Subsequently, the protective film 40 is formed as shown in FIG. 8F.

最后,如图8G所示,形成开口K3。 Finally, shown in Figure 8G, the formation of an opening K3. 由此,源、漏电极材料层12d的表面露出,形成用于连接外部连接端子的电极(压焊区)。 Thereby, the source, the surface of the drain electrode material layer 12d is exposed, to form an electrode (pressure pad) for connecting an external connection terminal.

若依据这样的对比例的制造方法,则在图8B中的连接孔形成工序的基础上再加上图8G中的形成开口部分K3的工序,合计需要2次开口部分的形成工序。 If such a production method according to Comparative Example, the connection hole is formed in FIG. 8B coupled with the base in the step of Figure 8G forming step K3 of the opening portion, a total of 2 times required opening portion forming step.

与此相反,本实施形态的制造方法中,如图7E所示,一并形成开口16、18、20。 In contrast, the manufacturing method in the present embodiment, as shown in Figure 7E, collectively form an opening 16, 18. 即,在贯通保护膜14及栅极绝缘膜6的重迭膜形成开口的同时,也对源、漏电极层12b上的保护膜14刻蚀图形,由此,1次开口形成工序即可。 That is, while the overlapping film through the protection film 14 and the gate insulating film 6 is formed an opening, but also on the protective film source, drain electrode layer 14 on the etched patterns 12b, whereby a second opening forming step can be. 从而,能够削减1道曝光工序,与此相伴随,也将不需要光致抗蚀剂膜的淀积工序及其刻蚀工序。 Thus, possible to reduce an exposure step, Along with this, it will not need the photoresist film deposition step and the etching step. 从而,合计缩短3道工序,即,简化了制造加工。 Thus, the total shortening three processes, namely, simplifying the manufacturing process.

还有,本实施形态的制造方法中,在同一腔内可以连续地进行图7B所示的源、漏极电极层12a、12b的图形刻蚀(干法刻蚀)和图7C所示的欧姆接触层10的中央部分的刻蚀(干法刻蚀)。 Further, the manufacturing method of this embodiment aspect, in the ohmic source and drain electrode layer in the same chamber can be performed continuously as shown in FIG. 7B 12a, 12b of the patterning (dry etching), and FIG. 7C etching the central portion 10 of the contact layer (dry etching). 即,通过在同一腔内依次更换刻蚀气体,能够连续地刻蚀。 That is, in the same cavity by sequentially replacing the etching gas, can be continuously etched.

与此相反,对比例的情况下,在图8c的源、漏极电极层12a、12b的图形刻蚀(干法刻蚀)后,进行图8D的ITD膜30的湿法刻蚀,接着,进行图8E的欧姆层10中央部分的刻蚀(干法刻蚀)。 In contrast, the proportion of the lower case, in the source, the drain electrode layer in FIG. 8c 12a, 12b of the patterning (dry etching), the ITD by wet etching film 30 of FIG. 8D, then, etching the ohmic layer 10 of the central portion of FIG. 8E performed (dry etching). 由于ITO膜不能用干法刻蚀加工,仅可进行湿法刻蚀加工,故不能够在一个腔内连续地进行图8C、图8D、图8E的各刻蚀工序。 Since the ITO film can not be processed by dry etching, a wet etching process only, it is not possible to continuously perform a cavity in FIG. 8C, FIG. 8D, FIG. 8E each etching process. 由此,在各工序都要进行基板的手工操作,作业麻烦。 Thus, in each step must be done manually, the job troublesome substrate.

还有,本实施形态的情况下,保护膜14必须存在于ITO膜22a、22b和源、漏电极12a、12b之间。 Further, the case of the present embodiment, the protective film 14 must be present on the ITO film 22a, 22b and the source, drain electrode 12a, between 12b. 这意味着在基板上的其它区域(未图示)可靠地把ITO膜构成的布线与用源、漏极电极同一材料构成的布线及电极电隔离。 This means (not shown) of the wiring is reliably formed with an ITO film with a source, the electrical wiring and the drain electrode of the same material isolated in other regions on the substrate.

然而,对比例的情况下,ITO膜30和源、漏极电极10a、10b属于同一层。 However, the ratio of the lower case, ITO film 30 and the source, drain electrodes 10a, 10b belong to the same layer. 即,两者被重叠,在两者之间不存在保护膜。 That is, both are overlapped, the protection film does not exist between them. 由此,在基板上其它区域(未图示),若异物存在,则尽管原本必须绝缘,但ITO膜构成的布线与用源、漏极电极同一材料构成的布线及电极有短路的危险。 Thus, in other areas on a substrate (not shown), if foreign matter is present, even though the original must be insulated, but the ITO film with a wiring and source electrode wiring and drain electrodes of the same material are at risk of short circuit. 即,用本实施形态的制造方法形成的元件可靠性高。 That is, high element manufacturing method of this embodiment is formed of reliability.

还有,由于对比例中在比较早的阶段形成ITO膜30(图8D),故在其后的工序中,存在由作为ITO的成分的铟(In)和锡(Sn)等引起的污染的可能性。 Moreover, since Comparative relatively early stage in the formation of the ITO film 30 (FIG. 8D), so that in the subsequent step, the presence of contamination by components as ITO indium (In) and tin (Sn) caused by the possibilities.

与此相对,本实施形态的制造方法中,由于ITO膜22a、22b在最后的工序中形成,故由ITO成分的锡(Sn)等引起的污染的可能性少。 On the other hand, the manufacturing method of this embodiment, since the ITO film 22a, 22b is formed in the final step, it is less likely level of tin ITO component (Sn) caused by contamination.

这样,若依据本实施形态的制造方法,则能够缩短制造工序,而且能够制造可靠性高的元件。 Thus, if the manufacturing method according to the present embodiment, it is possible to shorten the manufacturing process, but also a highly reliable element can be manufactured.

(第2实施形态)下面,参照图9~图18说明本发明的第2实施形态。 (Second Embodiment) Next, with reference to Figs. 9 to 18 illustrate a second embodiment of the present invention.

图9示出有关本发明第2实施形态的有源矩阵基板的平面布局。 Figure 9 shows a planar layout of the second embodiment related to the present invention, the active matrix substrate.

图9的有源矩阵基板是在液晶显示装置中使用的。 The active matrix substrate of Fig. 9 is a liquid crystal display device used. 作为象素部分的开关元件及防止静电破坏用保护元件,使用由第1实施形态中说明过的制造方法制造的TFT。 As the switching element of the pixel portion and to prevent electrostatic breakdown protective element, for use by the first embodiment through the manufacturing method of manufacturing the TFT.

象素部分4000(图中,用虚线围起来的部分)由多个象素120构成,各象素构成为包含TFT(开关元件)3000。 The pixel portion 4000 (Fig, surrounded by a dotted line portion) 120 constituted by a plurality of pixels, each pixel configured to include a TFT (switching element) 3000. TFT3000设在扫描线52和信号线54的交叉点上。 TFT3000 located at the intersection of the scanning lines 52 and signal lines 54.

信号线54、扫描线52的各端部分别设有压焊区160A、160B,这些压焊区和LC-COM线180之间连接第1保护元件140A、140B,上述压焊区和保护环100之间形成第2保护元件150A、150B。 A signal line 54, scanning lines 52 of the respective end portions provided with a bonding pad 160A, 160B, connected to the first protective element 140A, 140B between these bonding pads 180 and LC-COM line, said pressure pad and guard ring 100 formed between the second protective element 150A, 150B. 另外,LC-COM线180还经由银点压焊区连接对向电极。 In addition, LC-COM line 180 is also connected to the electrode via a silver point pressure pad.

“压焊区160A、160B”是用于连接键合引线和凸点电极(bump电极)或使用了聚酰亚胺带的电极等(外部端子)的电极。 (External terminal) of the electrode "bond pads 160A, 160B" is used to connect the bonding wire and the bump electrode (bump electrode) or by using the electrode polyimide tape or the like.

还有,“LC-COM线180”是给出作为液晶驱动基准的电位的线。 There, "LC-COM line 180" is given as a reference potential line LCD driver. 公共电位LC-COM例如象图30所示的那样,设定在只比显示信号电压VX的中点电位VB低ΔV的电位处。 LC-COM such as the common potential, as shown in Figure 30, as set than just show the potential at the midpoint potential of the signal voltage VB lower ΔV of VX. 即,如图29例示的那样,在象素部分的TFT3000中存在栅、源间电容CGS,受其影响在显示信号电压VX和最终的保持电压VS之间产生电位差ΔV。 That is, as shown in Figure 29 illustrates, in the presence of a gate TFT3000 pixel portion, a source capacitances CGS, influenced by the potential difference ΔV generated on the display signal voltage VX and the final between the holding voltage VS. 为补偿该电位差ΔV,把比显示信号电压VX的中点电位VB低ΔV的电位取为共同的基准电位。 To compensate for the potential difference ΔV, to show potential than the midpoint potential of the signal voltage VB lower ΔV VX is taken as a common reference potential.

另外,图29中,X是信号线,Y是扫描线,CLS表示液晶的等效电容,Cad表示保持电容。 Further, Fig. 29, X is a signal line, Y is a scanning line, CLS represents the equivalent capacitance of the liquid crystal, Cad represent storage capacitance. 还有,图30中,VX是供给到信号线X上的显示信号的电压,VY是供给到扫描线Y上的扫描信号的电压。 Further, Fig. 30, VX is supplied to the display signal voltage on the signal line X, VY is the voltage of the scan signal supplied to the scanning line Y on.

还有,“保护环100”是设在压焊区160A、160B外侧的线,作为液晶显示装置制造阶段中的静电措施。 Also, the "guard ring 100" is located in 160A, 160B of the outer wire bonding area, as a liquid crystal device manufacturing stage static measures display.

LC-COM线180及保护环100都是共同电位线,从而,通过压焊区和这些线之间连接保护二极管能够使静电沿这些线释放。 LC-COM line 180 and guard ring 100 are common potential line, which passes between the bonding area and these cable enables electrostatic discharge protection diodes along these lines.

还有,保护环100如图27所示,在使TFT基板1300与对向基板(彩色滤波器基板)对粘后,在驱动用IC连接之前沿划线(SB)切断,而LC-COM线180是留在最终制品中的线。 Further, the protection ring 100 as shown in FIG. 27, when the TFT substrate 1300 and the counter substrate (color filter substrate) after sticking, cutting the driving IC is connected with the leading edge of the scribing (SB), and LC-COM line Line 180 is left in the final product. 从而,在基板切断后到IC连接之前,能够用第1保护元件140保护象素部分的TFT免遭静电破坏,从而,制品的可靠性提高。 Thus, after the substrate is cut before connecting to the IC can be used to protect the first TFT element 140 pixel portion protection against electrostatic damage, thereby improving the reliability of products.

还有,由于在最终制品中还留有保护二极管,故实际使用制品时的静电破坏强度也提高。 Also, since in the final product has left the protection diodes, so the actual strength of the electrostatic damage when using the products also increased. 进而,由于使用了TFT的保护二极管故容易控制阈值电压(Vth),还能够减少泄放电流。 Further, due to the use of the TFT protective diode so easy to control the threshold voltage (Vth), but also can reduce the leakage current. 因此,即使在最终制品中留有二极管也不会有不良影响。 Therefore, even leaving the diode in the final product will not be adversely affected.

图11A~图11C示出保护元件的具体结构例。 Figure 11A ~ FIG. 11C shows a specific configuration example of the protective element.

即,如图11A所示,保护元件构成为把连接第1TFT(F1)的栅、漏极构成的MOS二极管和连接第2TFT(F2)的栅漏极构成的MOS二极管相互反向并连。 That is, shown in Figure 11A, the protective element is configured to connect the first 1TFT (F1) of the gate, the drain of the MOS diode and constituting the connection section 2TFT (F2) constituting the drain of the MOS gate diode inverse parallel connected to each other. 其等效电路为图11B所示。 Its equivalent circuit is shown in Figure 11B.

从而,如图11C所示那样,该保护元件在电流、电压特性中沿双向具有非线性。 Accordingly, as shown in Figure 11C, the protective element along the current, voltage characteristic bidirectional nonlinear. 各二极管在加入低电压时成为高阻抗,加入高电压时成为低阻抗状态。 Each diode when a low voltage is added into the high impedance, when a low voltage is added to the high impedance state. 另外,由于各二极管实质上是晶体管,流过电流的能力大,能够高速地吸收静电,因此保护能力高。 Further, since each diode is essentially the transistor, the current flowing through the large capacity, a high speed absorbing static electricity, and therefore a high protective capability.

图10中示出图9的压焊区160A、160B周围静电保护元件的具体配置例。 Figure 10 shows a pressure pad 9 of FIG. 160A, 160B around the specific configuration example of the electrostatic protection element.

第1保护元件140A由连接了栅、漏极间的薄膜晶体管M60及M62构成,同样,第1保护元件140B由薄膜晶体管M40及M42形成。 A first protective element 140A is connected by a gate, a thin film transistor M60 and M62 between the drain constituted, similarly, the first protective element 140B is formed of a thin film transistor M40 and M42.

第2保护元件150A、150B也一样,由薄膜晶体管M80、M82及M20、M22构成。 A second protective element 150A, 150B, too, by a thin film transistor M80, M82 and M20, M22 constitute.

这些保护元件起到这样的作用,即在被加入正或负的过大浪涌电压时导通,高速地将该浪涌电压沿LC-COM线180或保护环100释放。 These protective elements play such a role, that is, when added too much positive or negative surge conduction, high speed along the surge line LC-COM 180 or guard ring 100 is released.

另外,配置在压焊区外侧的第2保护元件150除去静电保护功能外,还具有这样功能,即防止用保护环100短路各压焊区160而使得在阵列工序中不能进行最终检查。 In addition, pressure pads disposed on the outside of the second protective element 150 to remove static electricity protection, but also has this feature, which prevents short circuit protective ring 100 160 and each pad is in the array process can not make a final check. 用图14说明该功能。 Figure 14 illustrates the use of the function.

考虑如图14所示那样,在压焊区160A1上连接阵列试验器(具有放大器220)的探头,对象素部分的TFT(Ma)进行试验的情况。 Considered as shown in FIG. 14, connector array tester on bonding pads 160A1 (with amplifier 220) of the probe, the pixel portion TFT (Ma) of the test is carried out.

这时,第2保护元件150A1及第2保护元件150A2维持高阻状态。 At this time, the second protective element and a second protective element 150A2 150A1 maintain high impedance state. 从而,象素部分的TFT(Ma)TFT(Mb)电隔离。 Thus, TFT pixel portion (Ma) TFT (Mb) is electrically isolated. 由此,可防止和其它晶体管的交调失真,能够仅对于所希望的TFT(Ma)进行试验。 Accordingly, intermodulation distortion is prevented and the other transistors, it is possible for only a desired TFT (Ma) test.

还有,如图27所示,若完成了TFT基板1300的制造,则在定向膜的涂敷、研磨工序、密封材料(衬垫)涂敷工序、基板的对粘工序、分断工序、液晶注入及封装工序等各工序结束之后并在连接驱动用IC之前,沿划线(SB)切断除去保护环100。 Also, shown in Figure 27, if the completion of the manufacture of the TFT substrate 1300, then in coating the alignment film, the polishing step, the sealing material (gasket) coating process, the substrate for adhesive step, the breaking step, the liquid crystal injection and after the end of each step and before connecting the driving IC, along the dash (SB) to remove the packaging process, such as cutting off guard ring 100.

然而,由于存在着连接LC-COM线180和压焊区160之间的第1保护元件140,因而,即使在连接驱动用的IC之前,也形成静电保护。 However, due to the presence of the first protection element connected LC-COM line 180 and 160 between the pressure pad 140, therefore, even before connecting the driving IC, but also the formation of electrostatic protection.

还有,最终制品中也留有第1保护元件,但由于使用了TFT的保护元件进行了正确的阈值控制,因而不必担心由于泄放电流等降低制品的可靠性。 Also, the final product also leave the first protective element, but due to the protective element TFT could make a correct threshold value control, and therefore do not have to worry about leakage current, etc. due to reduced reliability of products.

接着,用图12及图13说明图11所示的第1及第2晶体管(F1、F2)的元件的结构。 Next, FIG. 12 and FIG. 13 illustrates the structure of the first and second transistors (F1, F2) shown in Fig. 11 element.

本实施形态中,如图12所示,把由作为象素电极材料ITO构成的膜(ITO膜)300、320、330用作为栅极,漏极连接用布线。 In this embodiment, shown in Figure 12, the material of the film as the pixel electrode composed of ITO (ITO film) 300,320,330 is used as a gate, a drain connection wirings.

图13中示出对应于图12的平面布局中的各部分(A)~(F)的断面结构。 Figure 13 shows the plane of FIG. 12 corresponding to the layout of the respective portions (A) ~ (F) of the sectional structure.

如图示那样,构成静电保护元件的第1薄膜晶体管F1及第2薄膜晶体管F2都具有反交错结构(背栅结构)。 As illustrated, the first thin-film transistors constituting the electrostatic protection element F1 F2 second thin film transistor having an inverted staggered structure (the back-gate structure).

即,在玻璃基板400上形成栅极电极层410、420、430、440,在其上面形成栅极绝缘膜450,形成本征非晶硅层470、472,介以n型欧姆层480形成漏极电极(源极电极)层490,形成保护膜460以便复盖这些层,而且,用由作为象素电极材料的ITO构成的膜(ITO膜)300、320、330进行栅、漏极间的连接。 That is, on the glass substrate 400 is formed a gate electrode layer 410,420,430,440, thereon a gate insulating film 450 is formed, to form an intrinsic amorphous silicon layer 470, 472, via an n-type drain ohmic layer 480 is formed electrode (source electrode) layer 490, a protective film 460 is formed so as to cover these layers, and, with the film made of ITO as the pixel electrode material formed (ITO film) 300,320,330 perform gate-drain of connection.

ITO膜300、320、330经由贯通栅极电极层上的栅极绝缘膜450以及保护膜460的2层膜的连接孔和贯通漏极电极层490上的保护膜460的连接孔,连接栅极电极层和漏极电极层。 ITO film 300,320,330 via the gate insulating film through a gate electrode layer on the connection hole 450 and the connection hole 460 of the protective film of 2-layer film and a protective film 490 on the drain electrode layer 460 through the connecting gate electrode layer and a drain electrode layer.

这种情况下,由于ITO是高熔点,与铝等相比台阶复盖率特性优良,因此,即使经由贯通2层膜的深连接孔也可确保良好的连接。 In this case, since the ITO is high melting point, as compared with aluminum, excellent step coverage rate characteristic, therefore, even if the two-layer film via a through-hole deep connection also ensures a good connection.

还有,如在第1实施形态中说明的那样,对于栅极、漏极的连接孔在用于连接外部连接端子的开口的形成(压焊区露出)工序中同时形成,故能够缩短工序数。 Also, as in the first embodiment described above, the gate, drain connection hole is formed in the opening for connecting the external connection terminals (bonding pads exposed) step formed simultaneously, it is possible to shorten the number of steps .

以上,说明以ITO膜作为布线使用,形成保护二极管的例子。 Above description to ITO film as the wiring used to form a protective diode examples. 但ITO膜作为布线的利用并不限于该例,还能够例如在图15所示形态中加以利用。 However, the use of the ITO film as the wiring is not limited to this example, can also be used for example in the form shown in Fig. 15.

即,图15中,ITO膜342被用于形成压焊区160近旁中的交叉布线342。 That is, FIG. 15, ITO film 342 is used for bonding region 160 in the vicinity of the cross wiring 342 is formed.

所谓“交叉布线”是在把液晶显示装置的内部布线导出到密封材料520的外侧之际,为谋求由厚的层间绝缘膜进行的布线保护,把位于上层的布线连接到下层布线上并迂回导出到外部而使用的布线。 The so-called "cross wiring" in the internal wiring of the liquid crystal display device is exported to the outside of the occasion of the sealing material 520, in order to seek the protection of the wiring by the thick interlayer insulating film, the wiring is connected to the upper level to the lower layer wiring and the detour Exporting the wiring to the outside and used.

即,ITO膜342连接漏极电极层490和与栅极电极相同材料构成的层(栅极电极材料层)412。 I.e., ITO film 342 connected to the drain electrode layer 490 and the gate electrode of the same material layer (gate electrode material layer) 412. 由此,栅极电极材料层412的导出外部的部分由栅极绝缘膜450及保护膜460的二者保护,提高了可靠性。 Thus, to the outside of the portion of the gate electrode material layer 412 is protected both by the gate insulating film 450 and the protective film 460, to improve the reliability.

另外,图15中,参照编号500和502示出定向膜,500表示密封材料,540表示对向电极,562表示玻璃基板,1400表示液晶。 Further, FIG. 15, reference numeral 500 and 502 shows the alignment film, 500 denotes a sealing material, 540 represents a counter electrode, 562 denotes a glass substrate, 1400 represents a liquid crystal. 还有,压焊区160上连接有例如键合引线600。 There are, for example, a bonding wire connecting the bond pads 600 160. 有时也连接使用了凸点电极和聚酰亚胺片的电极层,代替该键合引线。 Is sometimes used to connect the bump electrode and an electrode layer of polyimide sheet, instead of the bonding wire.

ITO膜能够在其它各种位置作为布线使用,为了易于了解而例示ITO膜能够作为布线使用的位置,则如图16所示。 ITO film can be used as wiring in a variety of other locations, for ease of understanding of the ITO film can be illustrated as the position of the wiring used, as shown in Fig 16.

图16中用粗实线示出了ITO膜。 Figure 16 by the thick solid line shows the ITO film.

位置A1~A3中的ITO膜作为用于形成保护元件的布线使用,位置A4中作为用于连接扫描线52和压焊区160B的布线使用,位置A5中作为图15所示的交叉布线使用。 Position A1 ~ A3 of the ITO film is used as a wiring used for forming the protective element, the position A4, as used to connect the scan line 52 and the bonding pads of the wiring used 160B, cross wiring position A5 as shown in Figure 15 uses.

还有,位置A6中,作为用于连接水平方向的LC-COM线和垂直方向的LC-COM线的布线使用。 Also, the position A6, as the LC-COM line for connecting the horizontal direction and the vertical direction of the wiring LC-COM line use. 即,由于水平方向的LC-COM线由栅极材料形成,垂直方向的LC-COM线用源极材料形成,故需要用ITO连接两者。 That is, since the LC-COM line in the horizontal direction is formed of gate material, LC-COM line in the vertical direction with the source material, it is required to connect both with ITO.

另外,图16的位置A6中,银点压焊区110能够和水平方向的LC-COM线或者垂直方向的LC-COM线中任一条线在同一工序中形成为一体,在这样形成的情况下,可以经由ITO把不和银点压焊区110形成为一体的LC-COM线(水平、垂直的任一条)与银点压焊区110连接。 Further, in FIG position A6 16, LC-COM line Silver point pressure pad 110 and the horizontal direction can LC-COM line or the vertical direction in any one line is formed in the same process as a whole, in the case where the thus formed can not via the ITO and silver spot bonding region 110 is formed as one of the LC-COM line (horizontal, vertical any one) is connected with a silver point pressure pad 110.

下面,用图17、图18说明象素部分中各象素的结构。 Next, using FIG. 17, FIG. 18 illustrates the structure of the pixel portion of each pixel.

图17示出象素部分的平面布局。 Figure 17 shows a planar layout of the pixel portion.

配置着连接到扫描线52及信号线54上的、起到开关元件作用的TFT(构成为含有栅极电极720、漏极电极740、未掺入杂质的本征无晶硅层475),漏极电极740上连接着象素电极(ITO)340。 Arranged connected to the scanning line 52 and signal lines 54, play the role of a switching element TFT (the gate electrode 720 is configured to contain, the drain electrode 740, not adulterated intrinsic non-crystalline silicon layer 475), a drain on the source electrode 740 is connected to a pixel electrode (ITO) 340. 图中,K2是连接孔,Cad表示保护电容。 Figure, K2 is a connection hole, Cad represents protection capacitor. 保持电容Cad由邻接的栅极布线和被延长的象素电极的重迭构成。 Cad storage capacitor constituted by overlapping adjacent gate wirings and pixel electrodes are extended.

图18示出图17中沿BB经的断面结构。 Figure 18 shows a sectional structure along BB in Fig. 17 by the. 成为和图15中说明过的结构同样的断面结构。 And FIG. 15 become the described structure the same sectional structure.

(第3实施形态)用图19~图26说明有关上述第2实施形态的TFT基板的制造方法。 (Third Embodiment) Referring to FIGS. 19 to 26 illustrates the manufacturing method of the above second embodiment of the TFT substrate.

各图中,左侧是形成象素部分的开关晶体管的区域,中央部分是形成保护元件的区域,右侧是连接外部连接端子的区域(压焊区)。 Each drawing, the left side is a region of the switching transistor forming the pixel portion, the central portion is the region forming the protective element, the right side is the region of the connecting external connection terminals (bond pads).

(1)如图19所示,首先,用光刻技术在玻璃基板(无碱基板)400上形成例如由1800左右的厚度Cr(铬)构成的电极720、722、900、902、904。 (1) As shown in Figure 19, first of all, by using a photolithography technique such as an electrode thickness of about 1800 Cr (chromium) formed 720,722,900,902,904 400 is formed on a glass substrate (non-alkali substrate) .

Cr的淀积用磁控管溅射装置在50mTorr的减压下进行。 Cr is deposited by magnetron sputtering apparatus under a reduced pressure of 50mTorr. 还有,Cr的加工由使用了Cl2族气体的干法刻蚀法进行。 There, Cr processing carried out by the use of a family of Cl2 gas dry etching method.

参照编号720、900是构成TFT的栅极电极的层(栅极电极层),参照编号722是相当于图17所示的扫描线52的层。 Reference numeral 720,900 TFT constituting the gate electrode layers (gate electrode layer), reference numeral 722 is the equivalent of the scan line layer 17 shown in FIG. 52. 还有,参照编号902、904是由和栅极电极层相同材料构成的层(栅极电极材料层)。 Further, reference numeral 902 is a layer (a gate electrode material layer) and the gate electrode layer of the same material.

(2)接着,如图20所示,用等离子CVD法,连续地生成由氮化硅膜SiNx等构成的栅极绝缘膜910、未掺入杂质的本征非晶硅膜以及n型硅膜(欧姆层),接着,依据使用了SF6族的刻蚀气体,把本征非晶硅膜及n型硅膜(欧姆层)刻蚀图形。 (2) Next, as shown in Figure 20, with a plasma CVD method, continuously formed a gate insulating film 910 made of a silicon nitride film SiNx or the like, the impurity intrinsic amorphous silicon film and the n-type silicon film unincorporated (ohmic layer), then, based on the use of the etching gas SF6 family, the intrinsic amorphous silicon film and the n-type silicon film (ohmic layer) etched pattern.

由此,形成岛状的本征非晶硅层475、920以及n型硅(层欧姆层)477、922。 Thus, the formation of intrinsic amorphous silicon layer is an island of 475,920 and n-type silicon (layer ohmic layer) 477,922.

栅极绝缘膜910的厚度例如是4000左右,本征硅层475、920的厚度例如是3000左右,欧姆层477、922的厚度例如是500左右。 The thickness of the gate insulating film 910, for example, about 4000, the thickness of the intrinsic silicon layer, for example, is about 475,920 3000, for example, the thickness of the ohmic layer 477,922 is about 500.

该工序中的特征在于不形成对于栅极绝缘膜的连接孔。 This process is characterized by not forming a gate insulating film for the connection hole. 从而,不再需要光致抗蚀剂膜的涂敷工序、曝光工序、刻蚀除去工序这3道工序,谋求得到工序数的缩短。 Thus, no longer need to photoresist film coating step, exposure step, an etching step of removing these three steps, seeks the shortened number of steps.

(3)接着,如图21所示,用溅射法及光刻法形成例如由Cr(铬)构成的1500左右的源、漏电极层740a、740b、930a、930b。 (3) Next, as shown in Fig.21, is formed by a sputtering method and a photolithography method, for example by the source 1500 about Cr (chromium) formed, the drain electrode layer 740a, 740b, 930a, 930b.

(4)接着,以源、漏电极层740a、740b、930b、930b为掩膜,用刻蚀法除去欧姆层477、922的中央部分,进行源极和漏极的分离。 (4) Next, the source, drain electrode layers 740a, 740b, 930b, 930b as a mask, the central portion of the ohmic layer is removed by etching 477,922, separation of the source and drain.

在同一干法刻蚀装置的腔内连续地进行图21所示的源、漏电极层的图形化和图22所示的源、漏极的分离刻蚀。 Continuously in the same chamber dry etching apparatus shown in FIG source 21, the drain source electrode layer 22 as shown in FIG graphical and drain separation etching. 即,首先,用CL族的刻蚀气体进行源、漏极电极层740a、740b、930a、930b的加工,然后把刻蚀气体换为SF6族的气体,进行欧姆层477、922的中央部分的刻蚀。 That is, first of all, with the CL family etching gas source, 740a, 740b, 930a, 930b of the processing of the drain electrode layer, and then the etching gas changed to SF6 gas family, ohmic layer center portion 477,922 of etching. 这样,由于连续地使用干法刻蚀,简化了制造作业。 Thus, due to the continuous use of dry etching, simplifies the manufacturing operation.

(5)接着,如图23所示,用等离子CVD法形成保护膜940。 (5) Next, as shown in Figure 23, with a plasma CVD method to form a protective film 940. 该保护膜例如是2000左右的氮化硅膜SiNx。 The protective film is, for example, a silicon nitride film SiNx 2000 around.

(6)接着,如图24所示,用SF6族的刻蚀气体选择性地刻蚀保护膜940。 (6) Next, as shown in Figure 24, with the family of SF6 etching gas protective film 940 is selectively etched. 即,在形成压焊区的开口160的同时,形成连接孔CP1及连接孔K8、K10。 That is, while forming the opening 160 of the pressure pad, forming a connection hole and a connection hole CP1 K8, K10.

开口160及连接孔CP1是贯通栅极绝缘膜910及保护膜940的重迭膜而形成的开口,连接孔K8、K10是仅贯通保护膜940的开口。 Opening 160 and the opening hole CP1 is connected through a gate insulating film 910 and the protective film formed by overlapping film 940, the connection hole K8, K10 is only through the protective film 940 openings.

这种情况下,栅极电极材料层902、904在选择孔CP1、开口160的形成之际分别起到刻蚀中止层的作用,源、源极电极740a、930b分别起引连接孔K8、K10形成之际的刻蚀中止层的作用。 In this case, the gate electrode material layer 902, 904, act to choose holes CP1, an opening 160 is formed on the occasion of the role of an etching stopper layer, respectively, the source, the source electrode 740a, 930b, respectively, lead from the connection holes K8, K10 action on the occasion of the etch stop layer.

(7)接着,如图25所示,用磁控管溅射装置以500左右的厚度淀积ITO(Indium Tin Oxide)膜,用HCl/HNO3/H2O的混合液刻蚀,加工成预定的图形。 (7) Next, shown in Figure 25, with the magnetron sputtering apparatus to a thickness of about 500 deposited ITO (Indium Tin Oxide) film, is etched with a mixture of HCl / HNO3 / H2O, and processed into a predetermined graphics. 由此完成有源矩阵基板。 The active matrix substrate is thus completed. 图25中,参照编号950是由ITO构成的象素电极,参照编号952是构成保护二极管一部分的ITO构成的布线,参照编号954是用于连接外部端子的由ITO构成的电极(压焊区)。 25, reference number 950 is a pixel electrode made of ITO, reference numeral 952 is a part of the ITO constituting the wiring protection diode configuration, reference numeral 954 is an electrode connected to an external terminal made of ITO (pressure pad) for .

由于把台阶复盖率好的ITO作为布线使用,故确保良好的电连接。 Because of the good step coverage rate using ITO as the wiring, so that to ensure a good electrical connection. 作为象素电极材料,也可以使用金属氧化物这样高熔点的其它透明电极材料。 As the pixel electrode material, but also other transparent electrode material may be used such a high melting point metal oxide. 例如,可以使用SnOx、ZnOx等金属氧化物。 For example, SnOx, ZnOx other metal oxides.

还有,如从图25所知,在ITO层950、952和源、漏极电极740a、740b、930a、930b之间必须介以保护膜940。 Also, as known from Fig. 25, 950, 952 between the ITO layer and source, drain electrodes 740a, 740b, 930a, 930b need to protect the dielectric film 940. 这意味着在基板上的布线区域(未图示)中可靠地电分离由ITO构成的布线层和源、漏极电极材料层。 This means that the wiring area (not shown) on the substrate reliably wiring layer and the source, the drain electrode material layer made of ITO electrically separated. 从而,不必担心因异物引起两者的短路。 Thus, do not have to worry about foreign bodies cause a short circuit between the two.

还有,本制造方法中由于在最后的工序(图25)中形成ITO膜,故不必担心由作为ITO成分的锡(Sn)、铟(In)引起的污染。 Further, in this manufacturing method because of the ITO film formed in the final step (FIG. 25), it is not necessary to worry about contamination by ITO component as tin (Sn), indium (In) caused.

这样,若依据本实施形态的制造方法,则能够缩短有源矩阵基板的制造工序,而且能够安装对于防止静电实施了足够的措施的可靠性高的薄膜电路。 Thus, if the manufacturing method according to the present embodiment, it is possible to shorten the manufacturing process of the active matrix substrate, and can prevent static installation for the implementation of adequate measures highly reliable thin film circuit.

另外,图25中,直接把ITO膜952、954连接到栅极电极层902及栅极电极材料层904上,但也能够经由钼(Mo)、钽(Ta)、钛(Ti)等缓冲层连接两者。 Further, Fig. 25, the ITO film 952, 954 directly connected to the gate electrode layer 902 and the gate electrode material layer 904, but it is possible via a molybdenum (Mo), tantalum (Ta), titanium (Ti), etc. The buffer layer connection between the two.

下面,说明使用完成了的有源矩阵基板组装液晶显示装置的工序。 Next, the device is used to complete the process of assembling the active matrix liquid crystal display substrate.

如图28所示,把对向基板1500和TFT基板1300粘在一起,在图27所示那样的单元分断工序后,进行液晶的封入,然后,连接驱动用IC,进而如图28所示那样,经过使用偏光板1200、1600以及背景光源1000的组装工序,完成有源矩阵型液晶显示装置。 Shown, the adhesive 28 on the TFT substrate 1500 and the substrate 1300 together, such a unit in the breaking process shown in Figure 27, the liquid crystal is filled, and then, connected to the drive IC, and then, as shown in Figure 28 , through the use of a polarizing plate 1200, and the assembly process of the back light 1000, an active matrix type liquid crystal display device.

图26中示出有源矩阵型液晶显示装置主要部分的断面图。 Figure 26 illustrates active matrix type liquid crystal display device cross sectional view of a main part. 图26中,在与图15、图18等前面示出的附图相同的位置处标注相同的参照编号。 26, at a position the same drawings in Fig. 15, Fig. 18 and the like the previously shown denoted by the same reference numerals.

图26中,左侧是有源矩阵部分,中央是保护元件(静电保护二极管)形成区域,右侧是压焊区部分。 Figure 26, the left side is an active matrix part, is to protect the central element (electrostatic protection diode) forming region, the right is the pad part.

在压焊区部分,在由ITO构成的电极(压焊区)954上经各向异性导电膜500连接液晶的驱动用LC5500的输出引线5200。 In the pad part, the electrodes (bonding pads) 954 formed on the ITO by a liquid crystal driving LC5500 connection output lead 5200 through an anisotropic conductive film 500. 参照编号5100是导电粒子,参照编号5300是胶片带,参照编号5400是密封用的树脂。 Reference numeral 5100 is the conductive particles, reference numeral 5300 is a film strip, reference numeral 5400 is sealed with a resin.

图26中,作为驱动用IC的连接方法采用使用带载的方式(TAB),而也可以采取其它方式,例如COG(Chip On Glass)方式。 26, as the connection method using the drive IC manner using tape carrier (TAB), but can also take other ways, for example, COG (Chip On Glass) manner.

本发明不限于上述实施形态,也可以变形使用了利用正交错结构的TFT的场合。 The present invention is not limited to the above embodiments, may be modified to use a structure with n staggered TFT occasion. 还有,作为象素电极材料,也可以使用ITO之外的金属氧化物这样高熔点的其它透明电极材料。 Further, as the pixel electrode material, also possible to use other metal oxide ITO transparent electrode material other than such a high melting point. 例如,可以使用SnOx、ZnOx等金属氧化物。 For example, SnOx, ZnOx other metal oxides. 这种情况下,台阶复盖率也可达到实用化。 In this case, the step coverage ratio can be put to practical use.

若把本实施例的液晶显示装置作为个人计算机等机器中的显示装置使用,则制品的价值将会提高。 If the liquid crystal display device of the present embodiment is a personal computer or the like as a display device using the machine, then the product value will increase.

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Classifications
International ClassificationH01L27/02, G02F1/1362
Cooperative ClassificationH01L2924/13091, H01L27/0266, H01L27/0255, G02F2202/103, G02F1/136204, H01L2224/48463
European ClassificationH01L27/02B4F2, G02F1/1362A, H01L27/02B4F6
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