CN1075243C - 集成电路用电容元件及其制造方法 - Google Patents

集成电路用电容元件及其制造方法 Download PDF

Info

Publication number
CN1075243C
CN1075243C CN95119333A CN95119333A CN1075243C CN 1075243 C CN1075243 C CN 1075243C CN 95119333 A CN95119333 A CN 95119333A CN 95119333 A CN95119333 A CN 95119333A CN 1075243 C CN1075243 C CN 1075243C
Authority
CN
China
Prior art keywords
titanium
film
tantalum
impervious layer
forms
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN95119333A
Other languages
English (en)
Other versions
CN1129354A (zh
Inventor
上本康裕
藤井英治
有田浩二
长野能久
嶋田恭博
吾妻正道
井上敦雄
井筒康文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
松下电器产业株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP06327818A external-priority patent/JP3098923B2/ja
Priority claimed from JP7194578A external-priority patent/JPH0945877A/ja
Application filed by 松下电器产业株式会社 filed Critical 松下电器产业株式会社
Publication of CN1129354A publication Critical patent/CN1129354A/zh
Application granted granted Critical
Publication of CN1075243C publication Critical patent/CN1075243C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02244—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56—Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/65—Electrodes comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)

Abstract

本发明揭示一种集成电路用电容元件及其制造方法。该方法包括：在基片上形成钛膜的粘接层，在该粘接层表面形成氧化钛和扩散阻挡层，以及在该扩散阻挡层上依次形成下电极、强介质膜和上电极等工序。

Description

集成电路用电容元件及其制造方法
本发明涉及使用介质膜的集成电路用电容元件及其制造方法。
近几年，开发出将使用具有强介质膜那样的高介电常数的介质膜的电容元件用于随机存取存储器(RAM)的技术。在这种电容元件中，一般将钛酸锆酸铅(PZT)和钛酸钡锶(BST)等金属氧化物介质材料用于介质膜。在上电极和下电极中，使用与这种金属氧化物难于发生氧化反应的白金。又在下电极和硅基片之间，形成为使两者粘接性良好而由钛膜组成的粘接层和为防止粘接层与下电极反应而由氮化钛膜组成的扩散阻挡层。
使用强介质膜的电容元件，通常按以下所述的制造方法制作。
首先，在硅基片的表面已形成的绝缘层上，借助分别使用钛靶、氮化钛靶和白金钛靶的溅射法，依次形成钛膜、氮化钛膜和成为下电极的白金膜。
接着，利用溅射法或者溶胶-凝胶法，在白金膜上形成强介质膜，进而在该膜上利用溅射法形成成为上电极的白金膜。而且，在施行用于提高强介质膜的介电常数的热处理后，由蚀刻除掉前述各膜的不要部分并做成所定形状的电容元件。
在这样制造的电容元件中，当强介质膜热处理时在基片和白金膜间常常发生剥离和裂缝。这被认为是因为钛膜和氮化钛膜用不同工序形成、两膜没有连续地形成，两膜间的粘接强度必然不充分所致。
作为与上述不同的电容元件，知道的有在下电极和基片间形成二氧化钛膜来代替形成钛膜和氮化钛膜的电容元件。此二氧化钛膜起着粘接层和扩散阻挡层的作用。这种制造方法是首先在基片上依次形成钛膜、成为下电极的白金膜、强介质膜和成为上电极的白金膜，接着在氧气中由热处理将钛膜整体变换成二氧化钛膜。这种情况，基片和二氧化钛膜间的粘接强度也必然不充分。
本发明电容元件制造方法的一个形态，包括：在基片上形成钛或钽粘接层的工序、利用在该钛或钽表面区域离子注入非金属元素后进行热处理而形成由这种金属和非金属的化合物组成的化合物膜扩散阻挡层的工序、在这种化合物膜上形成钛或钽下电极的工序、在这种钛或钽上形成由金属氧化物组成的介质膜的工序、在这种介质膜上形成导电性钛或钽上电极的工序、有选择地蚀刻导电性钛或钽上电极和介质膜的工序、有选择地蚀刻钛或钽下电极的工序和有选择地蚀刻化合物膜扩散阻挡层和钛或钽粘接层的工序。
本发明电容元件制造方法的另一个形态，是利用在由溅射法形成钛或钽粘接层的中间阶段导入非金属元素气体，并继续进行溅射的方法来代替使用前述离子注入法，形成由这种金属和非金属化合物组成的化合物膜扩散阻挡层。
在利用这种制造方法制作的电容元件中，几乎不发生粘接层和扩散阻挡层界面的剥离。这被认为是因为在两者的界面有组成上的连续性，两者的粘接性得到改善。
图1是装载本发明电容元件的半导体装置的剖面图。
图2、图3、图4、图5、图6、图7和图8是表示这种电容元件制造工序的剖面图。
下面，参照附图对本发明的实施例进行说明。
实施例1
关于本发明的第一实施例，参照图1-图8进行说明。
如图1所示，在半导体基片1的规定区域分别用已有的集成电路形成技术，形成元件分离用绝缘膜2和此元件分离用绝缘膜2所围区域内由区域3以及控制电极4组成的MOS晶体管5。再形成层间绝缘膜6，覆盖上述各部分。在该层间绝缘膜6上形成由钛膜组成的粘接层7和由二氧化钛膜组成的扩散阻挡层8。在该扩散阻挡层8上，积层形成白金膜的下电极9、PZT的介质膜10、白金膜的上电极11。
进而，形成覆盖MOS晶体管5和用下电极9、介质膜10和上电极11构成的电容元件的保护膜12。在这种保护膜12和层间绝缘膜6上设置通过扩散区域3的接触孔13a，在保护膜12上设置通达下电极9和上电极11的接触孔13b。然后，采用已有的布线技术，形成经过接触孔13a和13b连接扩散区域3的铝布线14和连接下电极9和上电极11的铝布线15。为了防止白金和铝的反应并使连接部分的可靠性提高，又在铝布线15和白金电极9、11之间介入通常的氮化钛膜或者钛钨膜等反应防止膜(未图示)。
接着，对粘接层7、扩散阻挡层8和电容元件的制作方法进行说明。
首先，如图2所示，根据使用钛靶的溅射法，在层间绝缘膜6上沉积50nm厚的钛膜7a，并且如图3所示，使用离子注入装置，将氧离子注入钛膜7a的表面，然后在氩气的惰性气体环境中用650℃温度进行热处理。由此，将钛膜7a的表面变换成二氧化钛膜8a。这里，利用将钛膜7a的表面区域变换成二氧化钛膜8a，二氧化钛膜8a的厚度比钛膜7a表面区域的厚度增加约两倍。因此，考虑到这种膜厚的增加，对加速电压和离子注入量等项离子注入条件进行控制，使二氧化钛膜8a的厚度变成60nm。又，热处理后的钛膜7a厚度在15-25nm范围、二氧化钛膜8a厚度在50-70nm范围是令人满意的。此外，热处理温度在500-700℃范围是令人满意的。
接着，如图4-图6所示，分别在二氧化钛膜8a上沉积白金膜9a、在白金膜9a上沉积PZT膜10a和在PZT膜10a上沉积白金膜11a。又，白金膜9a、11a借助使用白金靶的溅射法沉积，PZT膜10a借助使用PZT靶的溅射法沉积。
接着，如图7所示，利用光致蚀刻技术和干式蚀刻技术，有选择地对白金膜11a和PZT膜10a进行蚀刻，形成所定形状尺寸的上电极11和介质膜10。进而，如图8所示，利用光致蚀刻技术和干式蚀刻技术，有选择地对白金膜9a、二氧化钛膜8a和钛膜7a进行蚀刻，形成白金膜的下电极9、二氧化钛膜的扩散阻挡层8和钛膜的粘接层7。
这样利用离子注入法制作扩散阻挡层8的场合，粘接层7和扩散阻挡层8间的粘接强度极大，可以认为两者间几乎没有剥离。此外，因为能任意地控制离子注入深度和注入量，所以能高精度地控制二氧化钛膜8a的厚度。
在前述第一实施例中，虽然在白金膜9a的沉积工序前进行氧离子的注入工序，但也可以在白金膜9a的沉积工序后进行离子注入工序。也就是说在这种制造方法中，钛膜7a沉积完，接着进行白金膜9a的沉积，然后进行氧离子通过白金膜9a进入钛膜7a的离子注入。而且，在惰性气体中进行热处理，使钛膜7a和白金膜9a之间形成二氧化钛膜8a。这种制造方法也有能抑制与前述相同的剥离发生的效果。再者，因为钛膜7a和白金膜9a在同一溅射室内连续沉积，所以具有能清洁地保持离子注入前的钛膜7a和白金膜9a界面的效果。
这种利用离子注入法的扩散阻挡层8的制作技术，也能用于注入氧离子以外的非金属元素离子形成钛化合物的扩散阻挡层的场合。例如，作为令人满意的扩散阻挡层8，能举出注入氮离子形成氮化钛膜的场合和注入氮离子和氧离子形成氮化氧化钛膜的场合。这些场合也几乎看不到在粘接层7和扩散障碍层8间产生剥离。但，氮化钛膜容易从强介质性金属氧化物取入氧气使强介质膜中发生氧气缺陷。为此，有电容元件的漏电流增加的倾向。这种增加，在二氧化钛、氮化钛和氮化氧化钛三者中，氮化钛最大，二氧化钛最小。因此，作为强介质电容元件的扩散阻挡层，最令人满意的是二氧化钛。
在前述实施例中，虽然给出用钛膜和钛化合物的例作为粘接层7和扩散阻挡层8的组合例，但也可以用钽膜、钨膜和钼膜等高熔点钛或钽作为粘接层7，用高熔点金属化合物膜作为扩散阻挡层8。特别在钽膜和钽化合物膜组合的场合，能得到与钛膜和钛化合物组合场合相同的效果。钽膜和钽化合物膜的组合，也是令人满意的粘接层和扩散阻挡层的组合之一。作为扩散阻挡层8，钽化合物中最令人满意的是钽氧化物膜。
又，作为成为粘接层7的钛或钽形成方法，除前述溅射法外，也可以用蒸发源采用这种金属的蒸镀法和CVD法等。
实施例2
接着，对第二实施例进行下述说明。该第二实施例形成钛膜7a和二氧化钛膜8a的工序与第一实施例不同。
首先，借助使用钛靶的溅射法，在层间绝缘膜6上沉积钛膜7a，并且在继续这种溅射的同时，在钛膜7a的厚度达到20nm的时刻将适量的氧气导入溅射室内并继续进行溅射。这时，钛与氧气进行反应在钛膜7a上沉积二氧化钛膜8a。这样在钛膜7a上形成厚度60nm的二氧化钛膜8a。
接着，与第一实施例相同，分别在二氧化钛膜8a上沉积白金膜9a、在白金膜9a上沉积PZT膜10a和在PZT膜10a上沉积白金膜11a，由蚀刻做成所定形状尺寸的电容元件。
在这种制造方法中，因为在同一室内连续地制作钛膜7a和二氧化钛膜8a，所以也能增大两者间的粘接强度并抑制剥离的发生。
又，关于氧气的导入，当使氧气的导入量与溅射经过的时间同时增加时，沉积的钛氧化膜具有随着膜厚变厚，氧气含有量增加的成分渐变结构。把这种成分渐变的钛氧化膜用到扩散障阻挡8上，因为在钛膜和钛氧化膜间伴随热膨胀的应力变小，所以发生剥离和裂缝的程度成为相当小。
在第二实施例中，虽然给出用氧气的例，但也能用其它非金属气体代替氧气。氮气和氮与氧的混合气体尤其是令人满意的例子。此外，溅射靶中除钛以外，也可以用钽、钨、钼等高熔点金属的靶。特别是钽膜，它与钛膜一样，作为粘接层7也是最令人满意的钛或钽之一。
实施例3
接着，对第三实施例进行说明。该第三实施例形成二氧化钛膜8a的工序与第一实施例不同。
首先，根据使用钛靶的溅射法，在层间绝缘膜6上沉积50nm厚度的钛膜7a。然后，在该溅射装置的室内导入适量氧气的同时，点亮室内组装的碘钨灯，加热钛膜7a的表面。由此，钛膜7a表面区域与氧气反应，形成60nm厚度的二氧化钛膜8a。
接着，与第一实施例相同，分别在二氧化钛膜8a上沉积白金膜9a、在白金膜9a上沉积PZT膜10a和在PZT膜10a上沉积白金膜11a，由蚀刻做成所定形状尺寸的电容元件。
在这种制造方法中，也能增大钛膜7a和二氧化钛膜8a的粘接强度并抑制剥离的发生。但是，这种灯加热的方法在二氧化钛膜8a的膜厚控制性方面比第一实施例所示的离子注入法要差，然而因为灯加热的方法制造设备便宜，所以在费用方面比离子注入法要好。
在第三实施例中，虽然给出用氧气的例，但也能用其它非金属离子代替氧气。氮气和氮和氧的混合气体尤其是令人满意的例子。此外，溅射靶中除钛以外，也可以用钽、钨、钼等高熔点金属的靶。特别是钽膜，它与钛膜一样，作为粘接层7也是最令人满意的钛或钽之一。
本发明不限于前述实施例，当然能是种种变形的技术例。例如在前述实施例中，虽然电容元件的介质膜使用了PZT，但也能使用BST、PLZT、Bi2SrTa2O9、Bi2SrNb2O9等具有强介质性或者高介电常数的金属氧化物。此外，也可以使用氧化钽等介质性金属氧化物。作为这种介质膜的制作方法，虽然使用了溅射法，但也能使用溶胶-凝胶法和CVD法。虽然在电容元件的电极使用了白金，但也能使用金、钯、铑等贵金属和铝等导电性金属。此外，具有粘接层和扩散阻挡层的前述电容元件的形成位置，不仅可在半导体基片上形成的绝缘膜上，也可以在由铝合金集成电路的布线材料和阻挡层材料中使用的多晶硅、铝合金、钨、钨硅化物、氮化钛等材料组成的层上。
因此，存在于本发明真正精神及其范围内的变形技术例，都包含在全部权利要求的范围中

Claims (4)

1．一种集成电路用电容元件的制造方法，其特征在于，它包括：由使用所述金属靶的溅射法，在基片上连续形成钛或钽粘接层和由所述钛或钽和非金属元素的化合物组成的化合物膜扩散阻挡层的工序，该溅射法工序包括在所述钛或钽到达所定膜厚的时刻，导入所述非金属元素的气体并继续进行溅射的过程；在所述化合物膜扩散阻挡层上形成钛或钽下电极的工序；在所述钛或钽上形成由钛或钽氧化物组成的介质膜的工序；在所述介质膜上形成导电性钛或钽上电极的工序；有选择地蚀刻所述导电性钛或钽上电极和介质膜的工序；有选择地蚀刻所述钛或钽下电极的工序和有选择地蚀刻所述扩散阻挡层用化合物和所述钛或钽粘接层的工序。
2．如权利要求1所述的电容元件的制造方法，其特征在于，形成所述钛或钽粘接层和所述化合物膜扩散阻挡层的工序包括使所述气体的导入量变化，同时进行溅射的过程。
3．如权利要求1所述的电容元件的制造方法，其特征在于，所述气体由氧气、氮气、以及它们的混合气体中选择一种气体组成。
4．一种集成电路用电容元件，其特征在于，它包括：基片；由在所述基片上形成的钛或钽组成的粘接层；由在所述粘接层上形成的所述钛或钽氧化膜组成的扩散阻挡层；由在所述扩散阻挡层上形成的钛或钽组成的下电极；由在所述下电极上形成的钛或钽氧化物组成的介质膜和由在介质膜上形成的导电性钛或钽组成的上电极。
CN95119333A 1994-12-28 1995-11-30 集成电路用电容元件及其制造方法 Expired - Fee Related CN1075243C (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP327818/94 1994-12-28
JP06327818A JP3098923B2 (ja) 1994-12-28 1994-12-28 半導体装置およびその製造方法
JP327818/1994 1994-12-28
JP194578/1995 1995-07-31
JP194578/95 1995-07-31
JP7194578A JPH0945877A (ja) 1995-07-31 1995-07-31 容量素子の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CNB011176083A Division CN1180465C (zh) 1994-12-28 2001-04-30 集成电路用电容元件的制造方法

Publications (2)

Publication Number Publication Date
CN1129354A CN1129354A (zh) 1996-08-21
CN1075243C true CN1075243C (zh) 2001-11-21

Family

ID=26508587

Family Applications (2)

Application Number Title Priority Date Filing Date
CN95119333A Expired - Fee Related CN1075243C (zh) 1994-12-28 1995-11-30 集成电路用电容元件及其制造方法
CNB011176083A Expired - Fee Related CN1180465C (zh) 1994-12-28 2001-04-30 集成电路用电容元件的制造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
CNB011176083A Expired - Fee Related CN1180465C (zh) 1994-12-28 2001-04-30 集成电路用电容元件的制造方法

Country Status (5)

Country Link
US (2) US5929475A (zh)
EP (3) EP0971392B1 (zh)
KR (1) KR960026878A (zh)
CN (2) CN1075243C (zh)
DE (3) DE69527160T2 (zh)

Families Citing this family (61)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69333864T2 (de) * 1992-06-12 2006-06-29 Matsushita Electric Industrial Co., Ltd., Kadoma Herstellungsverfahren für Halbleiterbauelement mit Kondensator
JP3028080B2 (ja) * 1997-06-18 2000-04-04 日本電気株式会社 半導体装置の構造およびその製造方法
JPH1154721A (ja) 1997-07-29 1999-02-26 Nec Corp 半導体装置の製造方法および製造装置
JP3165093B2 (ja) 1997-11-13 2001-05-14 松下電子工業株式会社 半導体装置およびその製造方法
KR100252854B1 (ko) 1997-12-26 2000-04-15 김영환 반도체 메모리 장치 및 그 제조방법
JP3830652B2 (ja) * 1998-02-27 2006-10-04 富士通株式会社 半導体装置及びその製造方法
KR100279297B1 (ko) * 1998-06-20 2001-02-01 윤종용 반도체 장치 및 그의 제조 방법
KR100293720B1 (ko) 1998-10-01 2001-07-12 박종섭 반도체 소자의 캐패시터 형성 방법
US6323044B1 (en) * 1999-01-12 2001-11-27 Agere Systems Guardian Corp. Method of forming capacitor having the lower metal electrode for preventing undesired defects at the surface of the metal plug
US6340827B1 (en) * 1999-01-13 2002-01-22 Agere Systems Guardian Corp. Diffusion barrier for use with high dielectric constant materials and electronic devices incorporating same
US6258655B1 (en) * 1999-03-01 2001-07-10 Micron Technology, Inc. Method for improving the resistance degradation of thin film capacitors
JP2000353700A (ja) 1999-06-14 2000-12-19 Mitsubishi Electric Corp 高誘電率薄膜の形成方法および半導体装置の製造方法
JP2001148465A (ja) * 1999-11-18 2001-05-29 Nec Corp 半導体装置の製造方法
DE19958203A1 (de) * 1999-12-02 2001-06-13 Infineon Technologies Ag Herstellungsverfahren einer oxidationsgeschüzten Elektrode für einen kapazitive Elektrodenstruktur
US6348373B1 (en) * 2000-03-29 2002-02-19 Sharp Laboratories Of America, Inc. Method for improving electrical properties of high dielectric constant films
US6541861B2 (en) * 2000-06-30 2003-04-01 Kabushiki Kaisha Toshiba Semiconductor device manufacturing method including forming step of SOI structure and semiconductor device having SOI structure
US20050191765A1 (en) * 2000-08-04 2005-09-01 Cem Basceri Thin film capacitor with substantially homogenous stoichiometry
JP2002100740A (ja) * 2000-09-21 2002-04-05 Oki Electric Ind Co Ltd 半導体記憶素子及びその製造方法
US6750113B2 (en) * 2001-01-17 2004-06-15 International Business Machines Corporation Metal-insulator-metal capacitor in copper
DE10120516B4 (de) * 2001-04-26 2004-09-16 Infineon Technologies Ag Halbleiterspeicherzelle und Verfahren zu ihrer Herstellung
US6900498B2 (en) 2001-05-08 2005-05-31 Advanced Technology Materials, Inc. Barrier structures for integration of high K oxides with Cu and Al electrodes
US7469558B2 (en) * 2001-07-10 2008-12-30 Springworks, Llc As-deposited planar optical waveguides with low scattering loss and methods for their manufacture
US7404877B2 (en) * 2001-11-09 2008-07-29 Springworks, Llc Low temperature zirconia based thermal barrier layer by PVD
US6884327B2 (en) 2002-03-16 2005-04-26 Tao Pan Mode size converter for a planar waveguide
US7378356B2 (en) * 2002-03-16 2008-05-27 Springworks, Llc Biased pulse DC reactive sputtering of oxide films
US20030175142A1 (en) * 2002-03-16 2003-09-18 Vassiliki Milonopoulou Rare-earth pre-alloyed PVD targets for dielectric planar applications
US20070264564A1 (en) 2006-03-16 2007-11-15 Infinite Power Solutions, Inc. Thin film battery on an integrated circuit or circuit board and method thereof
US8404376B2 (en) 2002-08-09 2013-03-26 Infinite Power Solutions, Inc. Metal film encapsulation
US8431264B2 (en) 2002-08-09 2013-04-30 Infinite Power Solutions, Inc. Hybrid thin-film battery
US8236443B2 (en) 2002-08-09 2012-08-07 Infinite Power Solutions, Inc. Metal film encapsulation
US8021778B2 (en) 2002-08-09 2011-09-20 Infinite Power Solutions, Inc. Electrochemical apparatus with barrier layer protected substrate
US8394522B2 (en) 2002-08-09 2013-03-12 Infinite Power Solutions, Inc. Robust metal film encapsulation
US8445130B2 (en) 2002-08-09 2013-05-21 Infinite Power Solutions, Inc. Hybrid thin-film battery
US9793523B2 (en) 2002-08-09 2017-10-17 Sapurast Research Llc Electrochemical apparatus with barrier layer protected substrate
AU2003261463A1 (en) * 2002-08-27 2004-03-19 Symmorphix, Inc. Optically coupling into highly uniform waveguides
EP1394811A1 (en) * 2002-08-28 2004-03-03 Matsushita Electric Industrial Co., Ltd. Accelerated test method for ferroelectric memory device
US7230316B2 (en) 2002-12-27 2007-06-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having transferred integrated circuit
US7238628B2 (en) * 2003-05-23 2007-07-03 Symmorphix, Inc. Energy conversion and storage films and devices by physical vapor deposition of titanium and titanium oxides and sub-oxides
US8728285B2 (en) 2003-05-23 2014-05-20 Demaray, Llc Transparent conductive oxides
DE602005017512D1 (de) 2004-12-08 2009-12-17 Symmorphix Inc Abscheidung von licoo2
US7959769B2 (en) 2004-12-08 2011-06-14 Infinite Power Solutions, Inc. Deposition of LiCoO2
US7838133B2 (en) * 2005-09-02 2010-11-23 Springworks, Llc Deposition of perovskite and other compound ceramic films for dielectric applications
WO2008039471A2 (en) 2006-09-29 2008-04-03 Infinite Power Solutions, Inc. Masking of and material constraint for depositing battery layers on flexible substrates
US8197781B2 (en) 2006-11-07 2012-06-12 Infinite Power Solutions, Inc. Sputtering target of Li3PO4 and method for producing same
US20080251889A1 (en) * 2007-04-11 2008-10-16 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device
US8552529B2 (en) 2007-04-11 2013-10-08 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device
US8268488B2 (en) 2007-12-21 2012-09-18 Infinite Power Solutions, Inc. Thin film electrolyte for thin film batteries
TWI441937B (zh) 2007-12-21 2014-06-21 Infinite Power Solutions Inc 形成用於電解質薄膜之濺鍍靶材的方法
KR101606183B1 (ko) 2008-01-11 2016-03-25 사푸라스트 리써치 엘엘씨 박막 배터리 및 기타 소자를 위한 박막 캡슐화
CN101494195B (zh) * 2008-01-24 2010-10-20 中芯国际集成电路制造(上海)有限公司 一种电容的制作方法
KR101672254B1 (ko) 2008-04-02 2016-11-08 사푸라스트 리써치 엘엘씨 에너지 수확과 관련된 에너지 저장 장치를 위한 수동적인 과전압/부족전압 제어 및 보호
DE102008030942A1 (de) * 2008-07-02 2010-01-07 Christoph Miethke Gmbh & Co Kg Hirnwasserdrainagen
CN102119454B (zh) 2008-08-11 2014-07-30 无穷动力解决方案股份有限公司 具有用于电磁能量收集的一体收集器表面的能量设备及其方法
KR101613671B1 (ko) 2008-09-12 2016-04-19 사푸라스트 리써치 엘엘씨 전자기 에너지에 의해 데이터 통신을 하는 통합 도전성 표면을 가진 에너지 장치 및 그 통신 방법
US8508193B2 (en) 2008-10-08 2013-08-13 Infinite Power Solutions, Inc. Environmentally-powered wireless sensor module
US8599572B2 (en) 2009-09-01 2013-12-03 Infinite Power Solutions, Inc. Printed circuit board with integrated thin film battery
US9390909B2 (en) 2013-11-07 2016-07-12 Novellus Systems, Inc. Soft landing nanolaminates for advanced patterning
US20110300432A1 (en) 2010-06-07 2011-12-08 Snyder Shawn W Rechargeable, High-Density Electrochemical Device
US9478411B2 (en) * 2014-08-20 2016-10-25 Lam Research Corporation Method to tune TiOx stoichiometry using atomic layer deposited Ti film to minimize contact resistance for TiOx/Ti based MIS contact scheme for CMOS
US9478438B2 (en) 2014-08-20 2016-10-25 Lam Research Corporation Method and apparatus to deposit pure titanium thin film at low temperature using titanium tetraiodide precursor
TWI691092B (zh) 2018-11-05 2020-04-11 力晶積成電子製造股份有限公司 電容單元及其製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0404295A1 (en) * 1989-06-20 1990-12-27 Ramtron International Corporation Method for fabricatinf integrated circuit capacitors
EP0471845A1 (en) * 1989-05-07 1992-02-26 OHMI, Tadahiro Method of forming silicon oxide film
EP0609081A2 (en) * 1993-01-27 1994-08-03 Texas Instruments Incorporated Improved electrical connections to dielectric materials

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59119735A (ja) * 1982-12-27 1984-07-11 Fujitsu Ltd 半導体装置の製造方法
JPH0751742B2 (ja) * 1986-11-14 1995-06-05 セイコーエプソン株式会社 時計用外装部品
JPS6430252A (en) * 1987-07-27 1989-02-01 Mitsubishi Electric Corp Semiconductor device
DE69017802T2 (de) * 1989-08-30 1995-09-07 Nec Corp Dünnfilmkondensator und dessen Herstellungsverfahren.
KR100266046B1 (ko) * 1990-09-28 2000-09-15 야스카와 히데아키 반도체장치
US5514822A (en) * 1991-12-13 1996-05-07 Symetrix Corporation Precursors and processes for making metal oxides
US5401680A (en) * 1992-02-18 1995-03-28 National Semiconductor Corporation Method for forming a ceramic oxide capacitor having barrier layers
EP0557937A1 (en) * 1992-02-25 1993-09-01 Ramtron International Corporation Ozone gas processing for ferroelectric memory circuits
US5216572A (en) * 1992-03-19 1993-06-01 Ramtron International Corporation Structure and method for increasing the dielectric constant of integrated ferroelectric capacitors
DE69333864T2 (de) * 1992-06-12 2006-06-29 Matsushita Electric Industrial Co., Ltd., Kadoma Herstellungsverfahren für Halbleiterbauelement mit Kondensator
JP3407204B2 (ja) * 1992-07-23 2003-05-19 オリンパス光学工業株式会社 強誘電体集積回路及びその製造方法
KR960010056B1 (ko) * 1992-12-10 1996-07-25 삼성전자 주식회사 반도체장치 및 그 제조 방법
US5679982A (en) * 1993-02-24 1997-10-21 Intel Corporation Barrier against metal diffusion
JP3412051B2 (ja) * 1993-05-14 2003-06-03 日本テキサス・インスツルメンツ株式会社 キャパシタ
JP3113141B2 (ja) * 1993-12-28 2000-11-27 シャープ株式会社 強誘電体結晶薄膜被覆基板、その製造方法及び強誘電体結晶薄膜被覆基板を用いた強誘電体薄膜デバイス
US5554564A (en) * 1994-08-01 1996-09-10 Texas Instruments Incorporated Pre-oxidizing high-dielectric-constant material electrodes
US5541807A (en) * 1995-03-17 1996-07-30 Evans, Jr.; Joseph T. Ferroelectric based capacitor for use in memory systems and method for fabricating the same
US5555486A (en) * 1994-12-29 1996-09-10 North Carolina State University Hybrid metal/metal oxide electrodes for ferroelectric capacitors
US5625233A (en) * 1995-01-13 1997-04-29 Ibm Corporation Thin film multi-layer oxygen diffusion barrier consisting of refractory metal, refractory metal aluminide, and aluminum oxide
JPH0936228A (ja) * 1995-07-21 1997-02-07 Sony Corp 配線形成方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0471845A1 (en) * 1989-05-07 1992-02-26 OHMI, Tadahiro Method of forming silicon oxide film
EP0404295A1 (en) * 1989-06-20 1990-12-27 Ramtron International Corporation Method for fabricatinf integrated circuit capacitors
US5005102A (en) * 1989-06-20 1991-04-02 Ramtron Corporation Multilayer electrodes for integrated circuit capacitors
EP0609081A2 (en) * 1993-01-27 1994-08-03 Texas Instruments Incorporated Improved electrical connections to dielectric materials

Also Published As

Publication number Publication date
EP0720213A2 (en) 1996-07-03
CN1129354A (zh) 1996-08-21
EP0971392A1 (en) 2000-01-12
DE69531070D1 (de) 2003-07-17
EP0971392B1 (en) 2003-06-11
CN1345088A (zh) 2002-04-17
EP0720213A3 (en) 1997-05-07
US6214660B1 (en) 2001-04-10
EP0720213B1 (en) 2002-03-13
DE69525827T2 (de) 2002-11-14
EP0971393A1 (en) 2000-01-12
DE69531070T2 (de) 2004-04-22
DE69525827D1 (de) 2002-04-18
DE69527160D1 (de) 2002-07-25
DE69527160T2 (de) 2002-11-28
CN1180465C (zh) 2004-12-15
US5929475A (en) 1999-07-27
KR960026878A (ko) 1996-07-22
EP0971393B1 (en) 2002-06-19

Similar Documents

Publication Publication Date Title
CN1075243C (zh) 集成电路用电容元件及其制造方法
US6468875B2 (en) Fabrication method of capacitor for integrated circuit
US5554564A (en) Pre-oxidizing high-dielectric-constant material electrodes
JP2537413B2 (ja) 半導体装置およびその製造方法
US5679980A (en) Conductive exotic-nitride barrier layer for high-dielectric-constant material electrodes
US5793057A (en) Conductive amorphous-nitride barrier layer for high dielectric-constant material electrodes
KR100355948B1 (ko) 반도체 기억장치 및 그 제조방법
KR100504318B1 (ko) 전자재료,그제조방법,유전체커패시터,불휘발성메모리및반도체장치
US5841160A (en) Semiconductor device having a capacitor electrode made of iridium
US20030020165A1 (en) Semiconductor device, and method for manufacturing the same
US6479364B2 (en) Method for forming a capacitor for semiconductor devices with diffusion barrier layer on both sides of dielectric layer
JP2000022105A (ja) 半導体装置の製造方法
US20010032992A1 (en) Microelectronic structure, method for fabricating it and its use in a memory cell
KR100307079B1 (ko) 전이 금속 인화물, 비소화물 또는 황화물로 이루어진 장벽층을가진 커패시터
US6232131B1 (en) Method for manufacturing semiconductor device with ferroelectric capacitors including multiple annealing steps
KR100523658B1 (ko) 구리 확산 장벽 제조 방법
US20050073801A1 (en) Capacitor having low resistance electrode including a thin silicon layer
KR100293721B1 (ko) 탄탈륨 산화막을 유전막으로 갖는 캐패시터 제조방법
KR100268792B1 (ko) 반도체 소자의 캐패시터 형성방법
JPH10214944A (ja) 半導体装置の製造方法
US20030098466A1 (en) Capacitor element, method for manufacturing the same, semiconductor device and method for manufacturing the same
KR19990040042A (ko) 캐패시터 형성방법
KR100309127B1 (ko) 반도체 소자의 캐패시터 제조방법
KR20030045470A (ko) 반도체 소자의 캐패시터 및 그의 제조 방법
JPH10335597A (ja) 容量素子を有する半導体装置およびその製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: PANASONIC ELECTRIC EQUIPMENT INDUSTRIAL CO.,LTD.

Free format text: FORMER OWNER: MATSUSHITA ELECTRONICS CORP.

Effective date: 20010701

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20010701

Applicant after: Matsushita Electric Industrial Co., Ltd.

Applicant before: Matsushita Electronics Corp.

C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee