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Publication numberCN105244272 A
Publication typeApplication
Application numberCN 201410274033
Publication date13 Jan 2016
Filing date18 Jun 2014
Priority date18 Jun 2014
Publication number201410274033.5, CN 105244272 A, CN 105244272A, CN 201410274033, CN-A-105244272, CN105244272 A, CN105244272A, CN201410274033, CN201410274033.5
Inventors刘金彪, 王垚, 李俊峰
Applicant中国科学院微电子研究所
Export CitationBiBTeX, EndNote, RefMan
External Links: SIPO, Espacenet
Method for monitoring annealing equipment
CN 105244272 A
Abstract
The invention provides a method for monitoring annealing equipment, which comprises the steps of providing a semiconductor substrate; carrying out ion implantation on the substrate; acquiring the thickness of an amorphous semiconductor layer in the substrate after ion implantation; carrying out low temperature thermal annealing, and acquiring the thickness of the left amorphous semiconductor layer at the annealing temperature; acquiring a solid state epitaxy rate at the annealing temperature; and judging whether the solid state epitaxy rate is within a threshold range or not. The method provided by the invention is visual and effective, and can reuse a wafer through high temperature annealing.
Claims(6)  translated from Chinese
1.一种退火设备的监控方法,其特征在于,包括: 提供半导体衬底; 对衬底进行离子注入; 获得注入后的衬底中非晶半导体层的厚度; 进行低温热退火,并获得该退火温度下剩余非晶半导体层的厚度; 得到该退火温度下的固相外延速率; 判断该固相外延速率是否在阈值范围内。 1. A method of monitoring annealing equipment, the method comprising: providing a semiconductor substrate; substrate ion implantation; thickness of the substrate obtained after the injection of the amorphous semiconductor layer; low-temperature thermal annealing, and get the the remaining thickness of the lower annealing temperature of the amorphous semiconductor layer; solid phase epitaxy to obtain the rate of annealing temperature; the solid phase epitaxy is determined whether the rate is within the threshold range.
2.根据权利要求1所述的监控方法,其特征在于,离子注入的为中性离子。 2. A method of monitoring according to claim 1, characterized in that the ion implantation is neutral.
3.根据权利要求2所述的监控方法,其特征在于,所述中性离子为Ge离子、Ar或Xe离子。 3. The monitoring method according to claim 2, wherein said ion-neutral ions Ge, Ar, or Xe ions.
4.根据权利要求3所述的监控方法,其特征在于,离子注入的能量范围为150-200KeV,剂量为lE14-lE16cm2。 4. The monitoring method according to claim 3, characterized in that the ion implantation energy range 150-200KeV, dose lE14-lE16cm2.
5.根据权利要求1所述的监控方法,其特征在于,采用光学膜厚仪进行测量,以获得非晶半导体层的厚度。 5. A method of monitoring according to claim 1, characterized in that the optical film thickness measuring instrument, to obtain the thickness of the amorphous semiconductor layer.
6.根据权利要求1所述的监控方法,其特征在于,在获得该退火温度下剩余非晶半导体层的厚度之后,还包括步骤: 进行高温热退火,以使得非晶半导体层重新结晶为晶态。 6. A method of monitoring according to claim 1, characterized in that the thickness obtained at the annealing temperature after remaining amorphous semiconductor layer, further comprising the step of: high temperature thermal annealing, so that the re-crystallization of the amorphous semiconductor layer a crystalline state.
Description  translated from Chinese
一种退火设备的监控方法 A method of monitoring of annealing equipment

技术领域 TECHNICAL FIELD

[0001] 本发明涉及半导体制造领域,特别涉及一种退火设备的监控方法。 [0001] The present invention relates to the field of semiconductor manufacturing, and more particularly to a method for monitoring an annealing apparatus.

背景技术 Background technique

[0002] 在CMOS器件的制备过程中,很多工艺中会用到热退火。 [0002] During the preparation of CMOS devices, many processes will be used in the thermal annealing. 例如,在形成接触时,为了提高源漏的接触效果,一般多采用硅化物工艺降低接触电阻,具体是首先淀积一层金属如,Ti,Ni等等,然后再通过低温快速退火的方法,形成金属与硅的硅化物,在整个过程中,快速退火的温度控制对硅化物的形成十分关键,温度过高或过低都不能满足工艺的要求,因此,退火设备要能够对快速退火的温度进行精确控制。 For example, when forming the contact, in order to improve the effect of source and drain contacts, use of silicide processes generally reduce the contact resistance. It is first deposited a layer of metal such as, Ti, Ni, etc., and then through the low-temperature fast annealing method, forming a metal silicide and silicon, in the process, rapid thermal annealing temperature to control the formation of the silicide is critical, the temperature is too high or too low, can not meet the technical requirements, therefore, to be able to quickly annealing temperature annealing precise control.

[0003] 目前工业界主要采用方块电阻测量法来监控快速退火设备的状态,具体为,通过对固定条件离子注入后的样品进行高温退火,然后用四探针的方法测量样品的方块电阻来表征杂质的温度,如果退火设备的温度发生漂移,方块电阻也会相应发生变化。 [0003] Industry is currently used mainly sheet resistance measurement apparatus for monitoring the state of rapid annealing, specifically, through the sample holder after ion implantation conditions of high temperature annealing, and then the four-probe method the sheet resistance of the sample is measured to characterize temperature of impurities, if the temperature of the annealing equipment drift sheet resistance will also change.

[0004] 然而,对于该方法,为了保证注入的杂质被激活且能够测量,退火的温度一般在700度以上,而实际硅化物退火的温度仅为400度左右,因此这种方法不能有效反映退火设备低温工艺的工艺能力,另一方面,注入退火后的样品即报废不能重复使用,成本消耗很大。 [0004] However, with this method, in order to ensure the implanted impurities are activated and can be measured, the annealing temperature above 700 degrees, while the actual silicide anneal temperature is only about 400 degrees, and therefore this approach may not capture the annealing low-temperature process technology capabilities of the device, on the other, that is, after annealing the sample injection scrap can not be reused, the cost of consumption of large.

发明内容 SUMMARY

[0005] 本发明的目的旨在至少解决上述技术缺陷之一,提供一种直接反映退火设备退火温度和工艺的监控方法。 Objective [0005] The present invention is intended to solve at least one of the above-mentioned technical defects, provide a direct reflection of the annealing temperature annealing equipment and process monitoring method.

[0006] 为此,本发明提供了如下技术方案: [0006] To this end, the present invention provides the following technical solutions:

[0007] 一种退火设备的监控方法,包括: [0007] A method of monitoring an annealing apparatus, comprising:

[0008] 提供半导体衬底; [0008] providing a semiconductor substrate;

[0009] 对衬底进行离子注入; [0009] The substrate ion implantation;

[0010] 获得注入后的衬底中非晶半导体层的厚度; [0010] The thickness of the substrate obtained after the injection of the amorphous semiconductor layer;

[0011] 进行低温热退火,并获得该退火温度下剩余非晶半导体层的厚度; [0011] low-temperature thermal annealing, and the annealing temperature to obtain the remaining thickness of the lower amorphous semiconductor layer;

[0012] 得到该退火温度下的固相外延速率; [0012] to obtain a solid phase epitaxy rate of the annealing temperature;

[0013] 判断该固相外延速率是否在阈值范围内。 [0013] The solid phase epitaxy is determined whether the rate is within the threshold range.

[0014] 可选的,离子注入的为中性离子。 [0014] Alternatively, the ion implantation of neutral ions.

[0015] 可选的,所述中性离子为Ge离子、Ar或Xe离子。 [0015] Optionally, the neutral ions Ge ions, Ar or Xe ions.

[0016] 可选的,离子注入的能量范围为150_200KeV,剂量为lE14_lE16cm 2。 [0016] Alternatively, the ion implantation energy range 150_200KeV, dose lE14_lE16cm 2.

[0017] 可选的,采用光学膜厚仪进行测量,以获得非晶半导体层的厚度。 [0017] Alternatively, the optical film thickness measuring instrument, to obtain the thickness of the amorphous semiconductor layer.

[0018] 可选的,在获得该退火温度下剩余非晶半导体层的厚度之后,还包括步骤: [0018] Alternatively, after obtaining the thickness of the lower annealing temperature remaining amorphous semiconductor layer, further comprising the step of:

[0019] 进行高温热退火,以使得非晶半导体层重新结晶为晶态。 [0019] high temperature thermal annealing, the amorphous semiconductor layer so that the re-crystallization of the crystalline state.

[0020] 本发明实施例提供的退火设备的监控方法,利用半导体衬底在离子注入后会在表面形成无定型的非晶态的特性,通过获得该非晶态的非晶半导体层的厚度以及在退火后的剩余非晶半导体层的厚度,来得到该退火温度下的固相外延速率,通过判断该固相外延速率是否在阈值范围内,即可得知退火设备是否处于正常状态。 [0020] A method of monitoring an annealing apparatus according to an embodiment of the present invention, the use of a semiconductor substrate after ion implantation in the surface amorphous amorphous characteristics, obtained by the amorphous state and the amorphous semiconductor layer thickness the thickness of the remaining amorphous semiconductor layer after annealing, to obtain a solid phase epitaxy rate of the annealing temperature, which is determined by solid phase epitaxy rate is within the threshold range, you can know annealing equipment is in normal condition.

[0021] 此外,在进行监控后,进行高温高温热退火,以使得非晶半导体层重新结晶为晶态,可以重复利用该晶片,节约成本。 [0021] In addition, after performing the monitoring, the high-temperature high-temperature thermal annealing, so that the re-crystallization of the amorphous semiconductor layer is crystalline, the wafer can be reused, cost savings.

附图说明 BRIEF DESCRIPTION

[0022] 本发明上述的和/或附加的方面和优点从下面结合附图对实施例的描述中将变得明显和容易理解,其中: [0022] The present invention described above and / or additional aspects and advantages will be described below with reference to embodiments become apparent and easily understood, in which:

[0023] 图1为根据本发明实施例的退火设备的监控方法的流程示意图。 [0023] FIG. 1 is a schematic flow monitoring method according to an embodiment of the annealing apparatus of the present invention.

具体实施方式 detailed description

[0024] 下面详细描述本发明的实施例,所述实施例的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。 [0024] Embodiments of the present invention will be described in detail below, an exemplary embodiment of the embodiment shown in the accompanying drawings, throughout which the same or similar reference numerals denote same or similar elements or elements having the same or similar functions. 下面通过参考附图描述的实施例是示例性的,仅用于解释本发明,而不能解释为对本发明的限制。 The following examples with reference to the accompanying drawings are exemplary only for explaining the present invention, not to be construed as limiting the present invention.

[0025] 在本发明中,提供的退火设备的监控方法,通过获得固相外延速率来判断退火设备是否异常,该方法直观、有效,且可以通过高温退火将晶片重复利用。 [0025] In the present invention, a method of monitoring an annealing apparatus provided by solid phase epitaxy to obtain the rate of annealing the device to determine whether an exception, this method intuitive, efficient, and high-temperature annealing the wafer can be reused.

[0026] 为了更好的理解本发明,以下将结合流程图1对具体的实施例进行详细的描述。 [0026] For a better understanding of the present invention, the following will combine the flowchart of specific embodiments described in detail.

[0027] 首先,提供半导体衬底。 [0027] First, a semiconductor substrate.

[0028] 所述半导体衬底具有规则的结晶态。 [0028] The semiconductor substrate having a regular crystalline state. 所述半导体衬底可以为Si衬底、Ge衬底、SiGe 衬底、SOI (绝缘体上石圭,Silicon On Insulator)或GO I (绝缘体上错,Germanium OnInsulator)等。 The semiconductor substrate may be a Si substrate, Ge substrate, SiGe substrate, SOI (insulator Shangshih Kyu, Silicon On Insulator) or GO I (on the insulator wrong, Germanium OnInsulator) and the like. 在其他实施例中,所述半导体衬底还可以为包括其他元素半导体或化合物半导体的衬底,例如GaAs、InP或SiC等,还可以为叠层结构,例如Si/SiGe等,还可以其他外延结构,例如SG0I (绝缘体上锗硅)等。 In other embodiments, the semiconductor substrate can also include other elements in a semiconductor or a compound semiconductor substrate, e.g., GaAs, InP, or SiC, etc., can also laminate structure, e.g., Si / SiGe, etc., can also be further epitaxial structures such SG0I (silicon-germanium-on-insulator) and the like. 在本实施例中,所述半导体衬底为体硅衬底。 In this embodiment, the semiconductor substrate is a bulk silicon substrate.

[0029] 而后,对衬底进行离子注入。 [0029] Thereafter, the substrate is subjected to ion implantation.

[0030] 在未进行离子注入之前,半导体衬底为规则的晶态,在进行离子注入后,在衬底中会形成非晶态的半导体,即非晶半导体层。 [0030] Before ion implantation is not carried out, the semiconductor substrate is a crystalline rules, after performing ion implantation in the substrate will be an amorphous semiconductor, i.e., an amorphous semiconductor layer.

[0031] 可以采用中性离子进行注入,在本实施例中,采用Ge离子、Ar或Xe等中性离子进行注入,离子注入的能量范围为150-200KeV,剂量为lE14-lE16cm 2,可以在衬底的表面形成大致为100nm的非晶半导体层。 [0031] The neutral ions can be implanted, in the present embodiment, the use of Ge ions, Ar and Xe, or neutral ion implantation, the ion implantation energy range 150-200KeV, dose lE14-lE16cm 2, in the surface of the substrate is formed of a substantially amorphous semiconductor layer of 100nm. 采用中性离子进行注入,可以避免在退火工艺时不会因为外扩散对腔体造成污染。 Neutral ion implantation to avoid out-diffusion will not cause pollution of the cavity when the annealing process.

[0032] 接着,获得注入后的衬底中非晶半导体层的厚度。 [0032] Next, the thickness of the substrate obtained after the injection of the amorphous semiconductor layer.

[0033] 由于晶体和非晶的折射率不同,可以采用光学膜厚仪进行测量,来获得衬底中非晶半导体层的厚度。 [0033] Due to the different refractive indices of the crystal and amorphous, it can be measured using an optical film thickness meter, the thickness of the substrate to obtain the amorphous semiconductor layer.

[0034] 而后,进行低温热退火,并获得该退火温度下剩余非晶半导体层的厚度。 [0034] Thereafter, the low-temperature thermal annealing, and the annealing temperature to obtain the remaining thickness of the lower amorphous semiconductor layer.

[0035] 在本发明中,低温热退火是指退火温度低于600C。 [0035] In the present invention, the low-temperature thermal annealing refers to an annealing temperature below 600 C. 在本实施例中,退火的温度为400C,退火时间为30s。 In the present embodiment, the annealing temperature of 400 C, the annealing time is 30s. 在低温热退火之后,部分的非晶半导体层恢复为晶体层。 After the low-temperature thermal annealing, the amorphous semiconductor layer is partially restore the crystal layer. 接着,获得该退火温度下退火后剩余部分的非晶半导体层的厚度,同样地,可以采用光学膜厚仪进行测量,来获得衬底中剩余的非晶半导体层的厚度。 Subsequently, the thickness obtained at the annealing temperature after annealing the amorphous semiconductor layer of the remaining portion, likewise, may be used to measure the optical film thickness meter, the thickness of the amorphous semiconductor layer to obtain the remaining substrate.

[0036] 接着,得到该退火温度下的固相外延速率。 [0036] Next, to obtain the rate of solid phase epitaxy annealing temperature.

[0037] 固相外延速率,即单位时间内非晶层在低于该材料的熔点或共晶点温度下外延再结晶的厚度,在本发明中,即为离子注入后的非晶半导体层的厚度与退火后剩余非晶半导体层的厚度之差与退火时间的比值。 [0037] solid phase epitaxy rate per unit of time that is an amorphous layer at a temperature below the melting point of the material or the eutectic point temperature epitaxial recrystallization thickness, in the present invention, the ion implantation is an amorphous semiconductor layer the ratio of the difference between the thickness of the residual amorphous semiconductor layer with a thickness after annealing time and annealing.

[0038] 固相外延是低温作用下非晶材料再结晶的过程,固相外延速率与退火的温度和时间相关,温度越高,固相外延的速率越快,因此可以通过固相外延的速率直接反映退火的温度,从而实现对低温退火工艺及其设备的监控。 [0038] solid phase epitaxy is at a low temperature amorphous material effect recrystallization process, solid phase epitaxy rate and annealing temperature and time dependent, the higher the temperature, the faster the rate of solid phase epitaxy, it is possible by solid phase epitaxy rate a direct reflection of the annealing temperature, in order to achieve low-temperature annealing process and equipment monitoring.

[0039] 而后,判断该固相外延速率是否在阈值范围内。 [0039] Then, it is determined whether the rate of the solid phase epitaxy within the threshold range.

[0040] 通过判断该固相外延速率是否在阈值范围内,从而确认退火设备是否出现异常,需要重新进行校正。 [0040] The solid phase epitaxy is determined by the rate is within the range of the threshold value to confirm whether abnormal annealing equipment, need to be corrected. 通常地,可以通过计算得到的固相外延速率与固相外延速率参考值进行对比,当二者的偏差大于一定比例时,即认为该固相外延速率超出阈值范围,退火设备的温度可能发生偏移,需要重新校正,当二者的偏差小于一定比例时,即认为该固相外延速度在阈值范围之内,退火设备处于正常状态。 Generally, solid phase epitaxy rate can be calculated with the solid phase epitaxy rate reference value comparison, when both the deviation is greater than a certain percentage, namely that the solid phase epitaxy rate exceeds the threshold range, the temperature annealing device may be biased occur shift, the need re-calibration, when the deviation is less than a certain percentage of the two, namely that the solid phase epitaxy speed within the threshold range, annealing equipment in a normal state.

[0041] 在本实施例中,固相外延速率参考值Vref可以通过实验的经验值获得,阈值为Vref 3%,在计算得到的固相外延速率与固相外延速率参考值的偏差超过3%时,认为设备异常。 [0041] In the present embodiment, the solid phase epitaxy rate reference value Vref can experience experiment is obtained, the threshold value Vref 3%, the deviation solid phase epitaxy rate calculated with the solid phase epitaxy rate reference value over three %, the equipment considered abnormal.

[0042] 而后,可以进一步对该衬底进行高温热退火,以使得非晶半导体层重新结晶为晶 [0042] Then, the substrate can be further high-temperature thermal annealing, so that the re-crystallization of the amorphous semiconductor layer is crystal

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[0043] 在本发明中,高温热退火是指退火温度高于900C。 [0043] In the present invention, the high temperature thermal annealing refers to an annealing temperature higher than 900 C.

[0044] 在本实施例中,采用1000C的高温热退火,直到非晶半导体层重新结晶,这样,该晶片可以重新利用,节约成本。 [0044] In the present embodiment, the high-temperature thermal annealing of 1000 C, until the re-crystallization amorphous semiconductor layer, so that the wafer can be reused, cost savings.

[0045] 虽然本发明已以较佳实施例披露如上,然而并非用以限定本发明。 [0045] While the invention has been disclosed as the preferred embodiment, however, not intended to limit the present invention. 任何熟悉本领域的技术人员,在不脱离本发明技术方案范围情况下,都可利用上述揭示的方法和技术内容对本发明技术方案作出许多可能的变动和修饰,或修改为等同变化的等效实施例。 Any skilled in the art, without departing from the scope of the present invention aspect of the case, can take advantage of the above disclosed methods and technical content may make many variations and modifications of the aspect of the present invention, the equivalent change or modify equivalent embodiments example. 因此,凡是未脱离本发明技术方案的内容,依据本发明的技术实质对以上实施例所做的任何简单修改、等同变化及修饰,均仍属于本发明技术方案保护的范围内。 Therefore, all without departing from the present invention, technical solutions, based on any simple modification of the technical spirit of the present invention is made to the above example embodiment, equivalent changes and modifications as would fall within the scope of the protection aspect of the invention.

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Classifications
International ClassificationH01L21/324, H01L21/67
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