CN104835894A - Semiconductor diode chip and manufacturing method thereof - Google Patents
Semiconductor diode chip and manufacturing method thereof Download PDFInfo
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- CN104835894A CN104835894A CN201410056351.4A CN201410056351A CN104835894A CN 104835894 A CN104835894 A CN 104835894A CN 201410056351 A CN201410056351 A CN 201410056351A CN 104835894 A CN104835894 A CN 104835894A
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- chip
- book jacket
- film
- semiconductor diode
- diode chip
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 57
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 33
- 239000003795 chemical substances by application Substances 0.000 claims abstract description 22
- 229910052751 metal Inorganic materials 0.000 claims abstract description 19
- 239000002184 metal Substances 0.000 claims abstract description 19
- 238000005245 sintering Methods 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 46
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 32
- 229910052759 nickel Inorganic materials 0.000 claims description 16
- 239000011521 glass Substances 0.000 claims description 9
- 238000002161 passivation Methods 0.000 claims description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 7
- 239000004411 aluminium Substances 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 7
- 239000010703 silicon Substances 0.000 claims description 7
- 239000011248 coating agent Substances 0.000 claims description 6
- 238000000576 coating method Methods 0.000 claims description 6
- 238000009792 diffusion process Methods 0.000 claims description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- 239000010408 film Substances 0.000 claims description 3
- 239000007888 film coating Substances 0.000 claims description 3
- 238000009501 film coating Methods 0.000 claims description 3
- 239000000843 powder Substances 0.000 claims description 3
- 229910003978 SiClx Inorganic materials 0.000 claims 1
- 238000005520 cutting process Methods 0.000 abstract description 18
- 230000001681 protective effect Effects 0.000 abstract 10
- 238000007789 sealing Methods 0.000 abstract 5
- 239000000565 sealant Substances 0.000 abstract 2
- 230000002093 peripheral effect Effects 0.000 abstract 1
- GVVPGTZRZFNKDS-JXMROGBWSA-N geranyl diphosphate Chemical compound CC(C)=CCC\C(C)=C\CO[P@](O)(=O)OP(O)(O)=O GVVPGTZRZFNKDS-JXMROGBWSA-N 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 230000003628 erosive effect Effects 0.000 description 7
- 239000000126 substance Substances 0.000 description 7
- 238000010276 construction Methods 0.000 description 6
- 239000013078 crystal Substances 0.000 description 5
- 238000002360 preparation method Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 230000006378 damage Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 229910021334 nickel silicide Inorganic materials 0.000 description 4
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 4
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 238000005488 sandblasting Methods 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 238000005554 pickling Methods 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910001096 P alloy Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- FRIKWZARTBPWBN-UHFFFAOYSA-N [Si].O=[Si]=O Chemical compound [Si].O=[Si]=O FRIKWZARTBPWBN-UHFFFAOYSA-N 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 230000009514 concussion Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000012407 engineering method Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
Abstract
A semiconductor diode chip and a manufacturing method thereof, the manufacturing method comprises the following steps: providing a wafer; forming a protective film on the front and back surfaces of the wafer; cutting the wafer to form a plurality of chips; flattening a peripheral surface of each chip; arranging the chips at intervals on a jig; filling a protective sealant into the jig and filling the protective sealant between the chips; soft baking the protective sealing agent to form a protective sealing film; cutting the protective sealing film to form a plurality of chip units; sintering and curing the protective sealing film of each chip unit into a protective sealing body; removing the protective film of each chip unit; and respectively forming a positive metal film and a negative metal film on the upper surface and the lower surface of each chip body to form a semiconductor diode chip with a protective package body.
Description
Technical field
The present invention relates to a kind of semiconductor diode chip and preparation method thereof, particularly relate to and a kind of there is semiconductor diode chip of book jacket body and preparation method thereof.
Background technology
The manufacture of Si semiconductor rectifier diode, industrial quarters one to employing most economical effective standard diffusion mode, to make rectifier diode chip.The mode of general employing is the two sides of the single crystal wafer (Silicon Wafer) being mixed with low concentration impurity, diffusion mixes pentad impurity (as phosphorus, arsenic etc.) and triad impurity (as boron, aluminium, gallium etc.), to make the positive and negative electrode face with P-N composition surface and low sheet resistance respectively.Thereafter and make the metal film (as nickel, aluminium etc.) with ohmic contact (OhmicContact) in wafer surface, be applicable to the welding processing of different modes respectively, such as with the plumbous class wlding of the tin of soft soldering processing, or with the molten processing of the aluminium of hard solder mode, to be connected with electric-conductor.
By Silicon Wafer according to required rectifier diode chip specification, cut into the chip of a certain size and shape, and chemistry erosion mill is imposed to cut surface, to remove engineering properties damage that cutting causes and to pollute.And form silicon dioxide film, to obtain good reverse electrical characteristic on silicon crystal surface simultaneously.Impose passivation book jacket (Junction Passivation and Coating) at the cut surface processed, namely complete the construction of chip part.
In the preparation of diode chip for backlight unit, known major design and construction method have three classes:
(1) diode wafer sheet is cut into chip, chip is welded with electric guiding element, become and be welded into half product, then carry out chemical treatment and the passivation book jacket of chip tangent plane.The electrode wafer rectifier diode chip bag (Sandwich Cell Construction), axial lead Mold for Plastics casting mold encapsulation (Axial Lead Plastic Molded Package) etc. that go out as Westinghouse company early-stage development all belong to it.
(2) by the rectifier diode wafer of aluminizer, grind with sandblasting modes such as cutting, be cut into the chip of truncated cone.This cake core, again with the intermixture that hydrofluoric acid and nitric acid are host, carries out chemistry erosion mill, and forms silicon silicon dioxide film under low temperature.Through the chip that chemical treatment completes, weld with electric guiding element, make half product.The welding of electric guiding element, in this way with the electrode that the hot coefficient of dilatation such as tungsten or molybdenum coupling material is made, then with aluminium film for wlding, do hard solder and connect; And be generally the electric guiding element of copper material, be then connected do hard solder with electrode by copper, silver, phosphorus alloy wlding.Carry out the secondary chemical treatment of chip tangent plane afterwards, and be coated with the agent of passivation glass book jacket, burn till book jacket layer.This General Electric Apparatus Co.(U.S.A.) (General Electric) that is designed to developed, and obtains the technology of patent.
(3) after wafer has spread, with the coating of photoresistance type resist, carry out selective local chemical etching, make by the dissected valley of P face opening, P-N junction is etched and exposes, form the wafer element partly processed of the hemisection kenel of individual chip.This half cut type wafer continues and imposes Passivation Treatment and glass book jacket, complete the construction of chip half tangent plane.Finally make glass book jacket rectifier diode chip (Glass Passivated Pellet is called for short GPP) through electrode surface metal-coated membrane and chip separation cuts again.
GPP is better compared with diode chip for backlight unit bag performance, therefore GPP still widely various rectifier diode assembly (Rectifier Circuit Moldules) adopted.Such as rectifier bridge (Bridge Rectifiers) etc.In addition, small outline diode (Small Outline Diode is called for short SOD) rectifier diode also more adopts the making of this method.
Though known GPP method for making has book jacket silicon rectifying diode chip at present the most excellent, its shortcoming is still a lot of.Such as, GPP due to tangent plane be by the hemisection form of P face opening, the corner cut on its P-N composition surface belongs to negative corner cut type (Negative Beveld Cut).This structure is under revers voltage load situation, and the exhaustion region (Depletion Region) of formation can cause the reverse electric field of N-type portion tangent plane and book jacket layer junction, expands in junction direction.In chip design, the position, exhaustion region of sufficient size must be retained.Consequently must use the chip of larger area, its forward bearing power just can be equivalent to the chip made with vertical incision method or positive angle patterning method.So the cost of manufacture of chip will be improved.
Secondly, the chip that GPP method is made, not easily obtains higher counter withstand voltage performance, also the defect of method for this reason.Moreover the technique of GPP method, equipment needed thereby investment is high, and operating cost is also high, so that its factory overhead is also high.Finally, the chip that this method is made, when separation cuts, causes the mechanical damage of glass-film unavoidably, forms microcrack and causes stress to be concentrated.This phenomenon, on application job, becomes very serious and loses the source of trouble (Operation Failure Source).Though industry is through making great efforts for many years, to the improvement of above all shortcomings, effect is still very limited.Edge this, improving of the present inventor's thoughts the problems referred to above is concentrate on studies and coordinate the utilization of scientific principle, and proposes a kind of reasonable in design and effectively improve the present invention of the problems referred to above.
Summary of the invention
Main purpose of the present invention is the semiconductor diode chip with book jacket body providing a kind of manufacture method of semiconductor diode chip and make, full circumferential surface book jacket can be carried out to silicon semiconductor diode, use and can obtain good electric property, and every defect of GPP method can be solved comprehensively.
To achieve these goals, the invention provides a kind of manufacture method of semiconductor diode chip, it comprises the following step: provide a wafer; Positive and negative in wafer forms a diaphragm; Cutting crystal wafer, to form multiple chip, each chip comprises a chip body, the circumferential surface that chip body comprises a upper surface, a lower surface and is adjacent to upper surface and lower surface, and upper surface and lower surface have diaphragm; Make the circumferential surface leveling of each chip; By each street spread configuration in a tool; Insert a book jacket agent in tool, and be filled in each chip chamber; Book jacket agent in soft roasting tool, is formed as a book jacket film to make the book jacket agent of each chip chamber; Cutting book jacket film, to form multiple chip unit, upper surface and the lower surface of the chip body of each chip unit have diaphragm, and the circumferential surface of chip body has book jacket film; The book jacket film sintering curing of each chip unit is made to be a book jacket body; Remove the diaphragm of each chip unit, with the upper surface of the chip body of exposed each chip unit and lower surface; A cathode metal film and a cathode metallic film is formed respectively, to form the semiconductor diode chip that has book jacket body in the upper surface of the chip body of each chip unit and lower surface.
To achieve these goals, the invention provides a kind of semiconductor diode chip with book jacket body, it comprises a chip body and a book jacket body.The circumferential surface that chip comprises a upper surface, a lower surface and is adjacent to upper surface and lower surface; This upper surface and this lower surface are formed with a cathode metal film and a cathode metallic film respectively.The book jacket bodily form is formed in the circumferential surface of chip, and coated circumferential surface.
The beneficial effect with the semiconductor diode chip of book jacket body and preparation method thereof of the present invention is:
1. the manufacture method of semiconductor diode chip of the present invention, can be utilize simple and inexpensive equipment, and effectively form book jacket body in the circumferential surface of each chip, thus effectively can reduce the production cost of prior art, and effectively can simplify the complicated process step of prior art.
2. the manufacture method of semiconductor diode chip of the present invention, the semiconductor diode chip with book jacket body with good electric property, higher counter withstand voltage performance and lower leakage current can be produced, and can be widely used in making various rectification diode and various rectification diode module (Rectifier Circuit Modules), such as rectifier bridge (Bridge Rectifiers) etc., also also can be applicable to little profile diode (Small Outline Diode, SOD).
3. the manufacture method of semiconductor diode chip of the present invention, the book jacket body of each chip forms for independently sintering respectively, and need not again cut in subsequent step, use and can effectively solve in prior art, because book jacket body need cut again, and make book jacket body may produce the problem of mechanical damage and microcrack; And the present invention can obtain relative stress according to this remains few semiconductor diode chip.
In order to further can be understood this for reaching technology, method and effect that set object is taked, refer to following detailed description for the present invention, graphic, believe object of the present invention, feature and feature, when being goed deep into thus and concrete understanding, but institute's accompanying drawings only provides with reference to and use is described, be not used for the present invention's in addition limitr.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of the first embodiment of the manufacture method of semiconductor diode chip of the present invention.
Fig. 2 is the cutaway view with the wafer of diaphragm of the first embodiment of the manufacture method of semiconductor diode chip of the present invention.
Fig. 3 be the first embodiment of the manufacture method of semiconductor diode chip of the present invention by the generalized section of chip of wafer through cutting.
Fig. 4 is the generalized section after the circumferential surface leveling of the chip of the first embodiment of the manufacture method of semiconductor diode chip of the present invention.
Fig. 5 is the top view that multiple chips of the first embodiment of the manufacture method of semiconductor diode chip of the present invention are arranged in tool.
First embodiment of the manufacture method that Fig. 6 is semiconductor diode chip of the present invention multiple to be arranged in tool and by book jacket film the generalized section of chip of surrounding.
Fig. 7 is the generalized section that the circumferential surface of the chip body of the first embodiment of the manufacture method of semiconductor diode chip of the present invention is formed with book jacket body.
Fig. 8 is the cutaway view with the first embodiment of the semiconductor diode chip of book jacket body of the present invention.
Fig. 9 is that the chip body circumferential surface of the second embodiment of the manufacture method of semiconductor diode chip of the present invention is formed with book jacket body and upper and lower surface is formed with the cutaway view of nickel dam.
Figure 10 is that the chip body circumferential surface of the second embodiment of the manufacture method of semiconductor diode chip of the present invention is formed with book jacket body and upper and lower surface is formed with the cutaway view of nickel silicide layer.
Figure 11 is the cutaway view with the second embodiment of the semiconductor diode chip of book jacket body of the present invention.
[symbol description]
1: chip
2: the chip unit with book jacket body
3: the semiconductor diode chip with book jacket body
10: wafer
100: chip body
101: upper surface
102: lower surface
103: circumferential surface
20: diaphragm
30: tool
40: book jacket agent
41: book jacket film
42: book jacket body
51: cathode metal film
52: cathode metallic film
60: nickel dam
61: nickel silicide layer
A-a, b-b: line of cut
S1 ~ S11: process step
Embodiment
(the first embodiment)
See also Fig. 1 to Fig. 8, it is schematic flow sheet and the generalized section of semiconductor diode chip manufacture method of the present invention.As shown in Figure 1, semiconductor diode chip manufacture method comprises the following step:
Step S1 a: wafer 10 is provided; For example, wafer is through standard diffusion mode (Standard Diffusion Process), the rectifier diode wafer spread by P-N layer.
Step S2: as shown in Figure 2, the positive and negative in wafer 10 forms a diaphragm 20.For example, diaphragm can be photoresistance film, and it is in order to protect wafer 10 surface microstructure in subsequent step, destroyed or erosion; Preferably, can be the mode utilizing rotary coating, make diaphragm 20 coat the positive and negative of wafer 10 equably, also can be suitably coordinate soft roasting, exposure and the hard step such as roasting, really make diaphragm 20 firmly can be formed at the positive and negative of wafer 10.
Step S3: is as shown in Figure 2 line of cut along dotted line a-a in suitable spacing cutting crystal wafer 10(figure), to form multiple chip 1(as shown in Figure 3); Each chip 1 comprises a chip body 100, the circumferential surface 103 that it comprises a upper surface 101, a lower surface 102 and is adjacent to upper surface and lower surface; Wherein, upper surface 101 and lower surface 102 respectively protected film 20 are coated and do not expose, and circumferential surface 103 is the cut surface of wafer 10, and it exposes and not by any structural defence.In actual applications, cutting mode can according to after the material of chip, chip cutting selected for the external form (be such as truncated cone, fillet square cone or fillet hexagon frustum) formed; For example, can be utilize the mode such as chemical erosion or sandblasting cutting to carry out, the external form of the chip after cutting then can be naturally formed as frustum type, and in this way by the N surface construction of wafer 10, then naturally can obtain tangent angle.Wherein, according to the difference of selected cutting mode, the circumferential surface 103 of chip body 100 has coarse situation in various degree.
Step S4: as shown in Figure 4, makes circumferential surface 103 leveling of the chip body 100 of each chip 1.Can be such as utilize the mode such as chemical erosion or sandblasting to carry out; Preferably, can be utilize the mode of pickling to carry out.Specifically, when wafer 10 being cut in step S3, each cut surface (i.e. the circumferential surface 103 of each chip body 100) of wafer 10, may have coarse, tricklely to break, the phenomenon that lattice has row's difference bad, and pass through leveling (the being such as pickling) process of this step, use and can eliminate that these are coarse, tricklely to break, the phenomenon that lattice has row's difference bad, and make the circumferential surface 103 of each chip body 100 be smooth, and then the book jacket body being formed at circumferential surface in subsequent step can be guaranteed, can with the circumferential surface fluid-tight engagement of chip body.For example, can be utilize the intermixture being host with hydrofluoric acid and nitric acid, carry out chemical erosion cutting operation, and in planarization process, silicon dioxide film can be formed in the circumferential surface 103 of each chip body 100 simultaneously; Also or can be take potassium hydroxide as the intermixture of host, carry out chemical erosion, and in planarization process, also can form silicon dioxide film in the circumferential surface 103 of each chip body 100.Wherein, in the process of leveling, the upper surface 101 of each chip body 100 and the crystal grain of lower surface 102, can protect by protected film 20, and avoid being destroyed by related chemistry etchant.
Step S5: each chip 1 is spaced and is arranged at a tool 30.For example, tool 30 can a storage tank, and its inner correspondence can have multiple keeper in order to fixing each chip 1, such as, can be utilize the mode of vacuum suction or can be the mode etc. utilizing gluing.
Step S6: as shown in Figure 5, inserts a book jacket agent 40 between each chip 1 in this tool 30.Wherein, book jacket agent 40 is selected according to demand by passivation glass powder and water or the blending paste that carries agent (Vehicle Agent).In practical application; for making book jacket agent 40 be filled in completely between each chip 1, can be insert too much book jacket agent 40 prior to tool 30, coordinating the operation of scraper; to strike off the unnecessary book jacket agent 40 of each chip 1 upper surface, guarantee that book jacket agent 40 riddles between each chip 1 completely according to this.
Step S7: as shown in Figure 6, the soft roasting book jacket agent (not shown) being filled in the circumferential surface 103 of each chip 1, to make book jacket agent primary solidification for book jacket film 41, in order to subsequent cutting operation.
Step S8: as shown in Figure 6, cuts book jacket film 41, to form multiple chip unit (not shown) according to appropriate intervals (b-b such as shown in figure is line of cut); To make each chip body 100 be formed except diaphragm 20 respectively except upper surface 101 and lower surface 102, circumferential surface 103 also has book jacket film 41 and protects, also namely all surface of each chip body 100 all by the coated protection of film body.
Step S9: as shown in Figure 7; the book jacket film sintering curing making each circumferential surface have the chip unit of book jacket film is a book jacket body 42; to become the chip unit 2 with book jacket body; even if also the upper surface 101 of each chip body 100 and lower surface 102 are formed with diaphragm 20 respectively, and circumferential surface 103 is formed with book jacket body 42.Wherein, by high temperature sintering, the filler in original book jacket agent (film) or impurity can be removed simultaneously, and passivation glass can be made to reconfigure, and be combined more closely with the circumferential surface 103 of chip body 100.In practical application, the chip unit 2 respectively with book jacket body also can utilize the mode of concussion cleaning, makes the surface of book jacket body 42 more smooth.
Step S10: remove the diaphragm 20 respectively with the chip unit 2 of book jacket body, with the upper surface 101 of the chip body 100 of exposed each chip unit 2 and lower surface 102.
Step S11: as shown in Figure 8, forms cathode metal film 51 and a cathode metallic film 52, to form the semiconductor diode chip 3 that has book jacket body respectively in the upper surface 101 of the chip body 100 of each chip unit and lower surface 102.Wherein, cathode metal film 51 and cathode metallic film 52 can be the metal films with ohmic contact (Ohmic Contact), such as, be aluminium plated film, nickel, silver coating or golden secondary film coating.
Wherein, the semiconductor diode chip 3 with book jacket body completed through above-mentioned process step can through follow-up detection, sort classification, packaging forms commercial size product.Its external form can be circle, circular cone bench-type, fillet hexagon frustum type, rounded square, fillet hexagon or other shapes be suitable for.The finished product completed has round and smooth glass book jacket body, is beneficial to follow-up construction, as automatic feed, tool location etc.
As shown in Figure 8, it is the semiconductor diode chip 3 with book jacket body of the present invention, and it comprises: chip body 100 and a book jacket body 42.The circumferential surface 103 that chip body 100 comprises a upper surface 101, a lower surface 102 and is adjacent to upper surface and lower surface; Wherein, upper surface 101 and lower surface 102 are formed with cathode metal film 51 and a cathode metallic film 52 respectively, and circumferential surface 103 is formed with a book jacket body 42.
(the second embodiment)
See also Fig. 9 to Figure 11, in actual applications, when selecting gold as cathode metal film 51 and cathode metallic film 52, because gold has relative poor associativity with silicon, therefore one can be formed as the nickel dam 60 be combined with each other with gold in the upper surface 101 of chip body 100 and lower surface 102, in order to the combination between metal film and chip body 100, correlation step can be undertaken in the step S10 in previous embodiment after, step is as follows:
Step S101: as shown in Figure 9, forms a nickel dam 60 respectively in the exposed upper surface 101 of chip body 100 and lower surface 102;
Step S102: as shown in Figure 10, utilizes the mode of high temperature sintering, makes to form a nickel silicide layer 61 between the upper surface 101 of chip body 100 and nickel dam 60, and the lower surface 102 of chip body 100 also and form a nickel silicide layer 61 between nickel dam 60.Use and nickel dam 60 can be combined more closely with the upper surface 101 of chip body 100 and lower surface 102.
As shown in figure 11, subsequently in step s 11, the nickel dam 60 of the then direct upper surface 101 in chip body 100 is formed cathode metal film 51(to refer to especially with the metal film containing gold element), and cathode metallic film 52 is formed on the nickel dam 60 of the lower surface 102 of chip body 100.
(possibility effect of the invention process)
1. utilize the semiconductor diode chip with book jacket body made by the manufacture method of semiconductor diode chip of the present invention, there is excellent electrical characteristic and mechanical property.
2. utilize the semiconductor diode chip with book jacket body made by the manufacture method of semiconductor diode chip of the present invention, to the lifting of counter withstand voltage and the reduction of leakage current, have the effect shown.
3. compared to known be that multiple chip forms book jacket body simultaneously, carry out the cutting of the book jacket body of chip more respectively, the manufacture method of semiconductor diode chip of the present invention, the book jacket body that the circumferential surface of each chip is formed, be each chip respectively alone sintering form, after thus each chip is formed with book jacket body, cutting operation need not be carried out again, thus book jacket body can be avoided because of cutting, and the problem such as the mechanical damage that may cause or microcrack, and relative stress can be obtained remain few chip.
4. the manufacture method of semiconductor diode chip of the present invention, can use simply inexpensive equipment to produce in a large number, and is enough to reduce the cost of raw material and effectively can simplify the complicated step of known engineering method.
5. the manufacture method of semiconductor diode chip of the present invention and the made semiconductor diode chip with book jacket body thereof, it can be widely used in the rectifier diode of each kenel and the rectifier diode module (Rectifier Circuit Modules) of each kenel, such as rectifier bridge (Bridge Rectifiers) etc.; Also can be applicable to little external form diode (Small Outline Diode, SOD).
But; the foregoing is only the preferred embodiments of the present invention, be not intended to limit to scope of patent protection of the present invention, therefore the equivalence change of such as using specification of the present invention and graphic content to do; all in like manner all be contained in claims of the present invention, close and give Chen Ming.
Claims (10)
1. a manufacture method for semiconductor diode chip, is characterized in that, the manufacture method of described semiconductor diode chip comprises the following step:
One wafer is provided;
A diaphragm is formed on the positive and negative of described wafer;
Cut described wafer, to form multiple chip, chip described in each comprises a chip body, the circumferential surface that described chip body comprises a upper surface, a lower surface and is adjacent to described upper surface and described lower surface, and described upper surface and described lower surface have described diaphragm;
Make the described circumferential surface leveling of chip described in each;
By street ground spread configuration described in each on a tool;
On described tool, insert a book jacket agent, and to be filled in described in each between chip;
Described book jacket agent in soft roasting described tool, is formed as a book jacket film to make the described book jacket agent described in each between chip;
Cut described book jacket film, to form multiple chip unit, described upper surface and the described lower surface of the described chip body of chip unit described in each have described diaphragm, and the described circumferential surface of described chip body has described book jacket film;
The described book jacket film sintering curing making chip unit described in each is a book jacket body;
Remove the described diaphragm of chip unit described in each, with the described upper surface of the described chip body of exposed chip unit described in each and described lower surface; And
A cathode metal film and a cathode metallic film is formed respectively, to form the semiconductor diode chip that has book jacket body in the described upper surface of the described chip body of chip unit described in each and described lower surface.
2. the manufacture method of semiconductor diode chip according to claim 1, is characterized in that, described book jacket agent is made by passivation glass powder.
3. the manufacture method of semiconductor diode chip according to claim 1, is characterized in that, the shape of described chip is circle, rounded square or fillet hexagon.
4. the manufacture method of semiconductor diode chip according to claim 1, is characterized in that, described cathode metal film and described cathode metallic film are aluminium plated film, nickel, silver coating or golden secondary film coating, and described diaphragm is photoresistance film.
5. the manufacture method of semiconductor diode chip according to claim 1, is characterized in that, after the step of described diaphragm removing chip unit described in each, also comprises the following step further:
A nickel dam is plated respectively on the described upper surface and described lower surface of the described chip body of chip unit described in each; And
Utilize high temperature sintering, make nickel dam described in each form a nickel SiClx layer respectively and between described upper surface and described lower surface.
6. a semiconductor diode chip, is characterized in that, described semiconductor diode chip comprises:
One chip body, the circumferential surface that described chip body comprises a upper surface, a lower surface and is adjacent to described upper surface and described lower surface, described upper surface and described lower surface are formed with a cathode metal film and a cathode metallic film respectively; And
One book jacket body, the described book jacket bodily form is formed in the described circumferential surface of described chip body, and coated described circumferential surface.
7. semiconductor diode chip according to claim 6, is characterized in that, described book jacket body is that the book jacket agent made by passivation glass powder is formed after sintering curing.
8. semiconductor diode chip according to claim 6, is characterized in that, the shape of described chip body is circle, rounded square or fillet hexagon.
9. semiconductor diode chip according to claim 6, is characterized in that, described cathode metal film and described cathode metallic film are aluminium plated film, nickel, silver coating or golden secondary film coating.
10. semiconductor diode chip according to claim 6, is characterized in that, described chip body is that the diode Silicon Wafer made via standard diffusion mode by is cut and forms.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103104608 | 2014-02-12 | ||
| TW103104608A TWI529972B (en) | 2014-02-12 | 2014-02-12 | Glass passivated semiconductor diode chip and manufacturing method thereof |
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| CN104835894A true CN104835894A (en) | 2015-08-12 |
| CN104835894B CN104835894B (en) | 2017-11-07 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106067419A (en) * | 2016-08-22 | 2016-11-02 | 成都众乐泰科技有限公司 | A kind of optimized production process of diode |
| CN108346720A (en) * | 2018-01-23 | 2018-07-31 | 浙江东晶博蓝特光电有限公司 | A kind of preparation method for light emitting device package |
| CN109273347A (en) * | 2018-08-03 | 2019-01-25 | 涟水芯海洋电子科技有限公司 | A kind of diode pickling technique reduced with acid |
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| CN1167342A (en) * | 1996-06-05 | 1997-12-10 | 智威科技股份有限公司 | Silicon semiconductor diode chip of all tangent plane junction glass passivation and making method |
| EP0818820A1 (en) * | 1996-07-11 | 1998-01-14 | Zowie Technology Corp. | Full open P-N junction glass passivated silicon semiconductor diode chip and preparation method thereof |
| US6190947B1 (en) * | 1997-09-15 | 2001-02-20 | Zowie Technology Corporation | Silicon semiconductor rectifier chips and manufacturing method thereof |
| CN201466031U (en) * | 2009-05-11 | 2010-05-12 | 绍兴旭昌科技企业有限公司 | Table type rectification chip capable of preventing high voltage discharge |
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Patent Citations (4)
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| CN1167342A (en) * | 1996-06-05 | 1997-12-10 | 智威科技股份有限公司 | Silicon semiconductor diode chip of all tangent plane junction glass passivation and making method |
| EP0818820A1 (en) * | 1996-07-11 | 1998-01-14 | Zowie Technology Corp. | Full open P-N junction glass passivated silicon semiconductor diode chip and preparation method thereof |
| US6190947B1 (en) * | 1997-09-15 | 2001-02-20 | Zowie Technology Corporation | Silicon semiconductor rectifier chips and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106067419A (en) * | 2016-08-22 | 2016-11-02 | 成都众乐泰科技有限公司 | A kind of optimized production process of diode |
| CN108346720A (en) * | 2018-01-23 | 2018-07-31 | 浙江东晶博蓝特光电有限公司 | A kind of preparation method for light emitting device package |
| CN109273347A (en) * | 2018-08-03 | 2019-01-25 | 涟水芯海洋电子科技有限公司 | A kind of diode pickling technique reduced with acid |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201532313A (en) | 2015-08-16 |
| CN104835894B (en) | 2017-11-07 |
| TWI529972B (en) | 2016-04-11 |
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