CN104658950A - Accommodation device for holding wafer and device and method for aligning wafer - Google Patents
Accommodation device for holding wafer and device and method for aligning wafer Download PDFInfo
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- CN104658950A CN104658950A CN201510048231.4A CN201510048231A CN104658950A CN 104658950 A CN104658950 A CN 104658950A CN 201510048231 A CN201510048231 A CN 201510048231A CN 104658950 A CN104658950 A CN 104658950A
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- wafer
- holding surface
- storing apparatus
- compensation arrangement
- vector field
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Abstract
The invention relates to an accommodation device for accommodating and holding a wafer. The accommodation device is characterized by comprising a retaining surface (1o), a retaining device for retaining the wafer on the holding surface (1o), and compensation devices (3, 4, 5 and 6), wherein the compensation devices are used for performing active, particularly locally controlled and at least a part of compensation on the whole deformation of the wafer. The invention further relates to a device and a method for aligning a first wafer with a second wafer using the accommodation device.
Description
Technical field
The present invention relates to for hold and keep wafer storing apparatus and for when using described storing apparatus by the apparatus and method of the first wafer and the second wafer alignment.
Background technology
This storing apparatus or sample retainer or chuck exist with many execution modes, and for storing apparatus, smooth accommodation face or holding surface are conclusive, becoming more and more less structure and can be properly aligned in whole wafer face and contact thus in increasing wafer face.If so-called pre-bonding steps (wafer is interconnected by separable connection by this pre-bonding steps) performed before the bonding process of reality, this is particular importance.As long as should realize alignment precision or the especially deformation values of < 2 μm for all structures arranged on one or two wafer, wafer height alignment accuracy is each other exactly particular importance.At known storing apparatus with in the device (i.e. so-called aligner, especially bond aligner) that aligns, near alignment mark, this can very well reach.Along with the increase of the distance from alignment mark, have and be better than 2 μm, be preferably better than 1 μm and be preferably better than the alignment accuracy of 0.25 μm further or the on inspection and perfectly alignment of especially deformation values is not attainable.
Summary of the invention
Task of the present invention is, improves the storing apparatus according to type like this, makes to utilize it can realize aliging more accurately.
This task utilizes a kind of for holding and keeping the storing apparatus of wafer to solve, and this storing apparatus has feature below:
-holding surface,
-for wafer being remained on the holding device at holding surface place, and
-compensation arrangement, for that carry out active to the overall situation distortion of wafer, locally controllable, at least part of compensation.
This task also utilizes a kind of for being solved by the device of the first wafer and the second wafer alignment, and this device has feature below:
-for the device of the form determination local alignment error of the vector field to have deformation vector, described local alignment error occurs relative to the elongation of the second wafer and/or distortion due to the first wafer,
-at least one is according to the storing apparatus for holding at least one wafer one of the claims Suo Shu, and
-for when considering vector field and simultaneously by the aligning apparatus of aligning wafer when the compensation of compensation arrangement.
This task also utilizes that a kind of the method has step below for the method for the first wafer and the second wafer alignment being solved, especially in the following order:
-detect the vector field with deformation vector of the first wafer and/or the vector field with deformation vector of the second wafer and analyze vector field by analytical equipment and try to achieve local alignment error,
-at least one wafer is received in foregoing storing apparatus, and
-when considering vector field and simultaneously by aligning wafer when the compensation of compensation arrangement.
In illustrated value scope, the value in described boundary also should be disclosed as boundary value and can with the requested protection of combination in any.
The present invention is based on the understanding of the applicant according to European patent application EP 09012023 and EP10 015 569, wherein utilizing above-mentioned understanding, the detection on whole surface, is especially possible using the position of the structure in each wafer surface as wafer position figure.The invention mentioned below relates to for trying to achieve when being connected with the second wafer by the first wafer because the first wafer is relative to the elongation of the second wafer and/or distortion and the device of the local alignment error occurred, has:
-along the stretch value of the first contact-making surface of the first wafer the first stretch scheme and/or
-along the stretch value of the second contact-making surface the second stretch scheme and
-for analyzing the analytical equipment of the first and/or second stretch scheme, can in the hope of the alignment error of local by it.
At this, basic thought of the present invention is, arranges the storing apparatus be made up of multiple, separate Active control element, utilizes the holding surface of these control element storing apparatus especially can be affected in shape and/or temperature.At this, these Active control elements are used by corresponding manipulation, make the local alignment error known by the location drawing and/or stretch scheme or local deformation be compensated or farthest minimize or reduce.At this, not only overcome local deformation, and minimize simultaneously or correct that produced on the whole by local deformation, that wafer is in its external dimensions macroscopic deformation or elongation.
Therefore, according to the present invention, when the invention relating to the location drawing, stretch scheme and/or stress diagram by above-described and there disclosed to contact and bonding wafer time alignment error correct on the spot combine, especially it is likely that by the active to wafer distortion, especially local be used for realizing the alignment result of improvement further.
According to a favourable execution mode regulation of the present invention, the temperature of local influence holding surface can be carried out by compensation arrangement.The local temperature of holding surface raises and causes remaining on the differential expansion of the wafer in holding surface in this position.Temperature gradient is higher, and wafer is more in the expansion of this position.Thus the data of position-based figure and/or expansion plans, the especially vector analysis of alignment error, especially for each position of the location drawing and/or expansion plans, the local deformation of wafer can be acted on targetedly or resist described local deformation.
Within this context, vector analysis is understood to the vector field with deformation vector, and this vector field is especially tried to achieve by one of two modification of the present invention described below.
First modification relates to wherein the application scenarios of one of only structuring two wafers.In this case, according to the present invention's regulation, the deviation of the deviation of detection architecture, especially geometry and desired geometry.In this case, cherish a special interest, the deviation of the shape of the exposure region of the exposure sources of exposure region, especially repeatedly repeated exposure and the intended shape of nominal, the intended shape normally rectangle of described nominal.These deviations, the vector field especially describing these deviations can have been come based on the detection of the location drawing to each alignment mark corresponding with exposure region according to EP 09012023.Instead, this vector field also can be tried to achieve based on the stress diagram detected by EP 10 015 569.6 and/or stretch scheme.But, also according to this vector field of the present invention can advantageously be tried to achieve by any other suitable measurement mechanism and be read in.Repeatedly the etching system of repeated exposure is especially suitable for this measurement, and these etching systems run by specific test mask and/or fc-specific test FC routine to detect described data.
Second modification relates to the application scenarios that two wafers are wherein structured.In this case, according to the present invention's regulation, especially for the location drawing, especially according to the vector field of all position calculation alignment deviations of first and second locations drawing of EP 09012023.This vector field especially should be counted as desirable aligned position to try to achieve for according to technology and/or economic criterion according to the execution mode in EP 10 015 569.6.
Specify in another favourable execution mode of the present invention, the elongation of holding surface can be affected by compensation arrangement partly, especially by arranging the piezoelectric element that preferably can manipulate separately at the back side place of holding surface.By elongation or the contraction, also i.e. negative elongation of holding surface, also correspondingly make this wafer distortion, especially elongation especially by the confining force acted on by holding surface on wafer or shrink, making the value that can be based upon the stretch scheme that this wafer is tried to achieve by which affect this wafer targetedly by corresponding control device.As long as by described compensation arrangement, the shape that can affect holding surface especially by preferred mechanical effect in z-direction partly, just there is the possibility of the distortion of the wafer of other antagonism in holding surface.Here be also suitable for, the control of compensation arrangement come by control device, the value of this control device position-based figure and/or stretch scheme is carried out correspondingly targetedly, Partial controll to compensation arrangement.
Control device especially comprises the software for implementing/calculating corresponding routine.
According to another Advantageous embodiments of the present invention regulation, partly, especially surged by compensation arrangement from the back side of holding surface and/or pneumatically pressure applied to holding surface.Thus, can have an impact to the shape of holding surface equally, thus obtain above-mentioned effect.This control is undertaken by above-described control device equally again.
Advantageously, compensation arrangement is set to integrated, be preferably embedded in multiple Active control elements in storing apparatus, especially holding surface.Thus, monolithically can construct the accommodation section of storing apparatus, its situation same in known storing apparatus is the same.
At this particularly advantageously, each control element or control element group can be manipulated individually.The manipulation of local correspondingly refers to, little section, the section being especially less than wafer half, being preferably less than wafer 1/4, being preferably less than wafer 1/8, being preferably less than wafer 1/16 further, can be manipulated partly by compensation arrangement.Particularly advantageously, compensation arrangement can utilize at least one control element to act on each region occupied by the structure of oneself of wafer.
Device of the present invention advantageously comprises previously described control device in the central control unit being responsible for all control procedures.But be contemplated that according to the present invention, control device is set in storing apparatus, especially as a whole the module of device.
Can be further improved in the following way according to method of the present invention, namely specify after the alignment to the detection that the location drawing of the first and/or second wafer and/or stretch scheme carry out especially again.Thus according to the present invention can be defined in complete alignment after alignment completed test.Correspondingly can consider, carry out having the eliminating that the wafer of excessive alignment error is right, such as again to carry out according to alignment of the present invention or clean it.Meanwhile, the data of detection can be used for especially carry out self calibration by control device to this device.
In European patent application EP 09012023.9 and/or European patent application EP 10 015 569.6 invention disclosed, as execution mode together disclosed in be suitable for the present invention simultaneously.
Accompanying drawing explanation
Other advantage of the present invention, characteristic sum details obtain from the following description of preferred embodiment and by accompanying drawing, wherein:
Fig. 1 a shows the vertical view of storing apparatus of the present invention in the first embodiment,
Fig. 1 b shows the cross sectional view according to Fig. 1 a Vertical Centre Line A-A of storing apparatus,
Fig. 2 a shows the vertical view of storing apparatus of the present invention in this second embodiment,
Fig. 2 b shows the cross sectional view according to Fig. 2 a Vertical Centre Line B-B of storing apparatus,
Fig. 3 a shows the vertical view of storing apparatus of the present invention in the third embodiment,
Fig. 3 b shows the cross sectional view according to Fig. 3 a Vertical Centre Line C-C of storing apparatus,
Fig. 4 a shows the vertical view of storing apparatus of the present invention in the 4th execution mode,
Fig. 4 b shows the cross sectional view according to Fig. 4 a Vertical Centre Line D-D of storing apparatus.
In the accompanying drawings, to be identically denoted by like references with the identical components/features of effect.
Embodiment
All 4 execution modes show the accommodation section 1 of monolithic, they be set to plane, the disc of circular, this disc is with the smooth smooth holding surface 1o for holding and keep wafer.On the outer periphery, accommodation section has collar flange 1a.
Holding surface 1o is configured for the accommodation plane holding wafer, and this accommodation plane extends in x and y direction.Z-direction extends perpendicularly, acts on confining force orientation on wafer in z-direction.The perforate 2 that is maintained by of wafer is carried out, and described perforate is distributed in same shape holding surface 10 Shangdi in large quantities and arranges, so that can by applying under-voltagely to be remained on holding surface 1o by wafer to perforate 2.The quantity of perforate 2 is larger and diameter that is perforate 2 is less, be applied to perforate 2 place for keeping the under-voltage fewer of wafer to cause wafer in the distortion at perforate 2 place.
Applied by unshowned vacuum plant at the under-voltage of perforate 2 place, the inner space 1i of this vacuum plant to the back side being arranged in holding surface 1o applies under-voltage.Inner space 1i is defined by the peripheral wall 1w of accommodation section 1 in addition and is sealed relative to environment.Perforate 2 extends to interior space 1i from holding surface 1o and therefore can be applied in account among the 1i of inner space leading under-voltage equally.
The back side 1r that inner space 1i is arranged by holding surface 1o vis-a-vis in addition and the bottom portion defining of inner space 1i be not illustrated, wherein back side 1r is passed by perforate 2.
Be provided with multiple heating/cooling element as on Active control element overleaf 1r, heating element 3 is especially only set.Heating element 3 is manipulated respectively individually or in groups, and wherein this control has been come by unshowned control device.At heating heating element 3 for the moment, the partial section of holding surface 1o is heated by the material (especially metal) of the very well heat conduction of accommodation section.This causes the wafer differential expansion be in this region on holding surface 1o.Therefore the wafer held on storing apparatus causes the distortion of wafer targetedly by the single or multiple heating element 3 of switch known by the position of correspondingly alignment and possible distortion/elongation, to compensate the distortion of local.Thus, especially when a large amount of local equalize, also obtain to overall situation distortion, the diameter of especially wafer is at the global compensation of the change of X and/or Y-direction.
Following possibility is: can be out of shape without holding surface with minimal deformation, especially and/or especially realize this impact without the shifting ground of wafer in the vertical direction or in Z-direction by heating and/or the special benefits that affects of the distortion of cooling element on wafer place.What can be regarded as minimum deformation within this context is, holding surface and especially wafer in the vertical direction namely (also vertical direction or Z-direction) relative to the distortion < 5 μm of installed surface, advantageously < 2 μm, preferred < 1 μm and further preferably < 0.5 μm.This especially connects for the pre-bonding of manufacture, be such as favourable for the pre-bonding connected based on Van-der-Waals.Due to holding surface here and especially wafer can keep the smooth fact, bonding ripple common in so pre-bonding steps can not in its diffusion affect by unevenness.Therefore, the risk retaining non-bonding position (so-called space) is greatly diminished.Connect to manufacture this pre-bonding, the flatness < 5 μm making holding surface in whole wafer face is made every effort to according to the present invention, advantageously < 2 μm, preferred < 1 μm and further preferably < 0.5 μm.These values of flatness refer to the distance of each partial interior between the highest and minimum point at the demifacet of contact wafers.
Heating element 3 advantageously distributes equably below holding surface 1o.Advantageously, arrange more than 10 heating elements 3 in storing apparatus, especially more than 50 heating elements 3, preferably more than 100 heating elements 3, preferred more than 500 heating elements 3.These heating elements are formed in the region that can manipulate separately in holding surface, and these regions can realize the local action to wafer.Advantageously, the regional of holding surface utilizes suitable device by heat isolation mutually.Especially, these regions are constructed to following shape, and this shape can realize the even of each section and the layout closed.Advantageously, be that triangle, quadrangle or hexagon are suitable for this by these sector architecture.
As heating element 3 it is particularly suitable that Peltier's element.
In the second form of implementation shown in Fig. 2 a and 2b, heating element 3 is not shown, instead or with it in combination holding surface 1o place is provided with piezoelectric element 4, be preferably greater than the distance to holding surface 1o to the distance of back side 1r.Realize the effect targetedly to holding surface 1o in this way.Piezoelectric element 4 can cause in nanometer to the elongation in micrometer range when activating.
The quantity of piezoelectric element 4 can equal the above-mentioned quantity of heating element 3, wherein can consider the combination of these two execution modes according to the present invention.
Of the present invention in the 3rd execution mode shown in Fig. 3 a and 3b, replace heating element 3 and/or piezoelectric element 4 or be provided with pin 5 in combination with it, the dowel ends 5e that these pins sentence especially point at holding surface 1o terminates.In the output end position of pin 5, dowel ends 5e is concordant with holding surface 1o.As long as the local deformation of wafer in the region of the pin 5 determined exists as the information of deformation pattern or stretch scheme, control device just can act on wafer by the single or multiple pin 5 of manipulation partly, its mode is, pin 5 or dowel ends 5e move towards the direction of wafer in z-direction.Dowel ends 5e applies pressure partly to wafer thus, and this pressure makes wafer in this position local crowning or deflection.Pin 5 can or integrally directed slidably in the guiding perforate 7 extending to back side 1r from holding surface 1o.To this instead, only dowel ends 5e be movable in pin 5 and the compresses lower section of pin 5 or pin relative to guiding perforate 7 be fixed.In this way, the special sealing of this pin 5 or these pins 5 relative interior space 1r can be ensured.
The quantity of pin 5 equals the quantity of piezoelectric element 4 or heating element 3, wherein also can combine one or more aforesaid execution mode here.
In execution mode in the diagram, accommodation section 1 has multiple balancing gate pit 6, and these balancing gate pits are formed holding surface 1o with its upper wall 6o shown in diagram 4b.Balancing gate pit 6 extends through inner space 1i and is sealed relative to inner space li.Each balancing gate pit 6 or 6 groups, balancing gate pit can be applied in pressure individually, and wherein this control can be undertaken by described control device.Executing in stressed situation, balancing gate pit 6 at least thereon wall 6o place is constructed to, and it is out of shape executing in stressed situation, also namely constructs other interface wall of specific pressure room 6 are thinner and/or more soft.Perforate 2 is connected with inner space 1i.
According to the present invention, maximum 3 μm that only complete holding surface 1o by aforesaid compensation arrangement 3,4,5,6, especially maximum 1 μm, the minimum local deflection of preferred maximum 100nm.
In order to one or more in aforesaid execution mode can be utilized to resist local deformation, need as described above: control device knows that the distortion in wafer is present in where and with which kind of degree or on what direction.Then could act on targetedly described distortion or resist and compensate.The stretch scheme of each wafer produces the explanation of the elongation vector form be distributed on wafer, and these extend vector utilization and try to achieve according to the corresponding measurement mechanism of EP 10 015 569.6.Corresponding control data can try to achieve especially by experience in a control unit, store, can control separately according at the wafer stretch scheme by the location drawing of wafer position given in advance for each wafer.Automatically can compensate during aligning wafer in this way.
Active control element 3,4,5,6 be not in these figures perspec-tive described, and also can have different size or shape.
Reference numeral table
1 accommodation section
1a collar flange
1i inner space
1o holding surface
1w peripheral wall
2 perforates
3 heating/cooling element
4 piezoelectric elements
5 pins
5e dowel ends
6 balancing gate pits
6o upper wall
7 guiding perforates
Claims (10)
1., for holding and keeping the storing apparatus of wafer, there is feature below:
-holding surface (1o),
-for wafer being remained on the holding device at holding surface (1o) place, and
-compensation arrangement (3,4,5,6), for that carry out active to the overall situation distortion of wafer, locally controllable, at least part of compensation.
2. storing apparatus according to claim 1, wherein can affect the temperature of holding surface (1o) partly by compensation arrangement (3,4,5,6).
3. according to the storing apparatus one of the claims Suo Shu, wherein by compensation arrangement (3,4,5,6) elongation of holding surface (1o) can be affected partly, especially by arranging the piezoelectric element (4) that preferably can manipulate separately at the back side (1r) place of holding surface (1o).
4. according to the storing apparatus one of aforementioned claim Suo Shu, it is characterized in that, by described compensation arrangement (3,4,5,6), the shape that can affect holding surface (1o) especially by preferred mechanical effect in z-direction partly.
5., according to the storing apparatus one of the claims Suo Shu, wherein can partly, especially be surged by compensation arrangement (3,4,5,6) from the back side of holding surface (1o) (1r) and/or pneumatically apply pressure to holding surface (1o).
6., according to the storing apparatus one of the claims Suo Shu, wherein compensation arrangement (3,4,5,6) is set to the multiple Active control elements (3,4,5,6) in storing apparatus, especially integrated, be preferably embedded in holding surface (1o).
7. storing apparatus according to claim 6, wherein can manipulate each control element (3,4,5,6) or control element (3,4,5,6) group individually.
8., for the device by the first wafer and the second wafer alignment, there is feature below:
-for the device of the form determination local alignment error of the vector field to have deformation vector, described local alignment error occurs relative to the elongation of the second wafer and/or distortion due to the first wafer,
-at least one is according to the storing apparatus for holding at least one wafer one of the claims Suo Shu, and
-for when considering vector field and simultaneously by the aligning apparatus of aligning wafer when the compensation of compensation arrangement.
9., for the method by the first wafer and the second wafer alignment, there is step below, especially in the following order:
-detect the vector field with deformation vector of the first wafer and/or the vector field with deformation vector of the second wafer and analyze vector field by analytical equipment and try to achieve local alignment error,
-at least one wafer is received into according in the storing apparatus one of claim 1 to 7 Suo Shu, and
-when considering vector field and simultaneously by aligning wafer when the compensation of compensation arrangement.
10. method according to claim 9, wherein arranges the detection of the vector field to the first and/or second wafer, detection especially again after the alignment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510048231.4A CN104658950B (en) | 2010-12-20 | 2010-12-20 | For keeping the storing apparatus of chip and for by the apparatus and method of wafer alignment |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510048231.4A CN104658950B (en) | 2010-12-20 | 2010-12-20 | For keeping the storing apparatus of chip and for by the apparatus and method of wafer alignment |
| CN201080070797.2A CN103283000B (en) | 2010-12-20 | 2010-12-20 | For keeping the storing apparatus of wafer |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201080070797.2A Division CN103283000B (en) | 2010-12-20 | 2010-12-20 | For keeping the storing apparatus of wafer |
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| CN104658950A true CN104658950A (en) | 2015-05-27 |
| CN104658950B CN104658950B (en) | 2018-01-19 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111630627A (en) * | 2018-01-23 | 2020-09-04 | 东京毅力科创株式会社 | Joining system and joining method |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11829077B2 (en) | 2020-12-11 | 2023-11-28 | Kla Corporation | System and method for determining post bonding overlay |
| US11782411B2 (en) | 2021-07-28 | 2023-10-10 | Kla Corporation | System and method for mitigating overlay distortion patterns caused by a wafer bonding tool |
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| US4475223A (en) * | 1981-06-12 | 1984-10-02 | Hitachi, Ltd. | Exposure process and system |
| US5094536A (en) * | 1990-11-05 | 1992-03-10 | Litel Instruments | Deformable wafer chuck |
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| CN104658950B (en) | 2018-01-19 |
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