CN104407817A - Seeker data recorder based on SoC - Google Patents
Seeker data recorder based on SoC Download PDFInfo
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- CN104407817A CN104407817A CN201410691300.9A CN201410691300A CN104407817A CN 104407817 A CN104407817 A CN 104407817A CN 201410691300 A CN201410691300 A CN 201410691300A CN 104407817 A CN104407817 A CN 104407817A
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- Prior art keywords
- chip
- soc
- data
- voltage
- target seeker
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0685—Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
Abstract
The invention belongs to the technical field of seeker data recording and in particular relates to a seeker data recorder based on SoC. The seeker data recorder comprises a main control module and a memory module; the main control module is used for writing seeker data into the memory module and reading the seeker data from the memory module; the memory module is composed of a FLASH memory array and an FPGA chip; the main control module comprises an SoC chip and an Ethernet physical layer chip.
Description
Technical field
The invention belongs to target seeker Data recording technique field, particularly a kind of target seeker datalogger based on SoC.
Background technology
At present, known datalogger is formed and complexity, includes power module, DSP control module, circuit conditioning module, ADC module, FPGA module, memory module etc., by the collaborative work between modules, the data of generation is recorded.Owing to forming complexity, the cost of given data registering instrument is all very high, debugging also unusual complexity is returned maintenance and is brought larger difficulty, the memory module of some registering instrument have employed SD card or ferroelectric memory as storage medium, not only memory capacity is little, storage speed is also very slow, although adopt hard disk very easily to cause damage greatly as its capacity of storage medium, can impact its job stability and serviceable life.
Summary of the invention
With high costs in order to solve existing target seeker datalogger, form complicated, maintenance difficult, and storage speed is slow, the shortcomings such as memory capacity is little, the object of the invention is to propose a kind of target seeker datalogger based on SoC, the present invention passes through the record of collaborative division of labor realization to data, the retaking of a year or grade work of power module, main control module and memory module.Not only cost is lower in the present invention, formation is simple, and also can store the data that target seeker produces, the very friendly human-computer interaction interface simultaneously by writing can also realize controlling simply efficiently datalogger high-speed Large Copacity.
For realizing above-mentioned technical purpose, the present invention adopts following technical scheme to be achieved.
Target seeker datalogger based on SoC comprises: main control module and the memory module for storing target seeker data, and described main control module is used for memory module write target seeker data, and for reading target seeker data from memory module; Described memory module comprises fpga chip and FLASH storage array, described main control module comprises SoC chip and ethernet physical layer chip, described ethernet physical layer chip electrical is connected to host computer, described ethernet physical layer chip is serially connected between host computer and SoC chip, forms two-way communication be connected for making host computer and SoC chip;
Described host computer is used for data read command to be sent to SoC chip, or for data write order and target seeker data are sent to SoC chip; Described SoC chip is used for when receiving data write order, resolves described data write order; Described SoC chip is used for according to the data write order after resolving, from from choosing corresponding target seeker data the target seeker data of host computer; Described SoC chip is used for the target seeker data chosen to be sent to SoC chip, and described fpga chip is used for the target seeker data from SoC chip to write in described memory module;
Described SoC chip is used for when receiving data read command, resolves described data read command; Described SoC chip is used for the data read command after resolving to be sent to fpga chip; Described fpga chip is used for, according to the data read command after resolving, reading corresponding target seeker data from memory module, and for the target seeker data of correspondence are sent to SoC chip; Described SoC chip is used for the target seeker data from fpga chip to be sent to host computer.
Beneficial effect of the present invention is: at a high speed and the data that produce of jumbo storage target seeker, and the data of storage can be carried out retaking of a year or grade, have reliability and durability feature, the present invention by friendly operation interface, achieve man-machine well not alternately.
Accompanying drawing explanation
Fig. 1 is the general structure block diagram of a kind of target seeker datalogger based on SoC of the present invention;
Fig. 2 is the structural representation of main control module of the present invention;
Fig. 3 is the structural representation of the power module of the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the invention will be further described:
With reference to Fig. 1, it is the general structure block diagram of a kind of target seeker datalogger based on SoC of the present invention.This target seeker datalogger comprises memory module, for storing target seeker data.This memory module comprises fpga chip and FLASH storage array (FLASH memory), and it is made up of 4 groups of FLASH storage chips, often organizes FLASH storage chip and comprises 4 FLASH storage chips.The model of each storage chip is MT29F128G08AJ.(read the data of storage array when storage array works or write data in storage array), each group FLASH storage chip shares a data line; The data line often organizing each FLASH storage chip in FLASH storage chip is separate, often organizes each FLASH storage chip in FLASH storage chip and shares a control line.
In the embodiment of the present invention, be also provided with main control module, for writing target seeker data to memory module, or for reading target seeker data from memory module.With reference to Fig. 2, be the structural representation of main control module of the present invention, this main control module comprises SoC chip and ethernet physical layer chip; Ethernet physical layer chip electrical is connected to host computer, ethernet physical layer chip is serially connected between host computer and SoC chip, and its major function makes host computer and SoC chip form two-way communication to be connected (main control module carries out transmitted in both directions by Ethernet interface and host computer).In the embodiment of the present invention, when needing to read target seeker data, host computer generates data read command (can generate data read command according to the input instruction of the input equipment of host computer), after host computer receives data read command, data read command is sent to SoC chip, SoC chip, when receiving data read command, is resolved described data read command, and the data read command after resolving is sent to fpga chip.Fpga chip is according to the data read command after resolving, and from memory module, read corresponding target seeker data, the target seeker data read out transfer to host computer after SoC chip and ethernet physical layer chip.In the embodiment of the present invention, main control module can realize the operation such as read-write, erasing, bad block management, ECC verification to memory module, only needs to send to order accordingly.
In the embodiment of the present invention, when needing write target seeker data, host computer obtains target seeker data and data write order (such as, host computer receives from the target seeker data of outside and data write order).Afterwards, data write order and target seeker data are sent to SoC chip by host computer.SoC chip, when receiving data write order, is resolved described data write order; SoC chip according to the data write order after resolving, from from choosing corresponding target seeker data the target seeker data of host computer.Afterwards, the target seeker data chosen are sent to fpga chip by SoC chip, and the target seeker data from SoC chip write in described memory module by fpga chip, so far, complete the ablation process of target seeker data.
In the embodiment of the present invention, the model of SoC chip is XC7Z020CLG485, and the model of fpga chip is XC6SLX45FGG484, and the model of ethernet physical layer chip is 88E1111-BAB.In main control module, be also provided with the first configuring chip and the second configuring chip, the first configuring chip is for configuring SoC chip, and its model is PC28F00AP30TF; Second configuring chip is for configuring fpga chip, and its model is M25P128.In the process of carrying out above-mentioned target seeker reading and writing data, the PS stone in SoC chip realizes the parsing to data read command and data write order.In the embodiment of the present invention, FLASH storage array is connected on the 3.3V IO BANK of fpga chip XC6SLX45, and main control module orders bag by 4 accordingly to the transmission of transmission differential pair, after memory module receives corresponding order bag, first resolve, then operate accordingly.The program of fpga chip is loaded and is realized (using Master SPI pattern) by the second configuring chip.In the embodiment of the present invention, host computer is provided with human-computer interaction interface (such as touch-screen, display screen etc.), is convenient to realize man-machine interaction, is convenient to input correlation parameter and data.
In the embodiment of the present invention, be also provided with power module.With reference to Fig. 3, it is the structural representation of the power module of the embodiment of the present invention.This power module is used for carrying out power (being powered by copper conductor) respectively to main control module and memory module.Above-mentioned power module comprises the first voltage conversion chip, the second voltage conversion chip, tertiary voltage conversion chip and the 4th voltage conversion chip; The model of the first voltage conversion chip is LT3976, and the model of the second voltage conversion chip, tertiary voltage conversion chip and the 4th voltage conversion chip is respectively TPS74401.The input end of the first voltage conversion chip accesses the 28V DC voltage from outside, for 28V DC voltage being converted to respectively 5V DC voltage and 3.3V DC voltage (maximum output current of the first voltage conversion chip is 5A), for 3.3V DC voltage being exported respectively to the first power end of SoC chip, first power end of fpga chip, and second first power end of configuring chip, described first voltage conversion chip is used for input end 5V DC voltage being exported respectively to the second voltage conversion chip, the input end of tertiary voltage conversion chip and the input end of the 4th voltage conversion chip.Second voltage conversion chip is used for 5V DC voltage being converted to 1V DC voltage (maximum output current of the second voltage conversion chip is 3A), for 1V DC voltage being exported respectively to the second source end of the first fpga chip and the second source end of fpga chip; Tertiary voltage conversion chip is used for 5V DC voltage to be converted to 1.8V DC voltage (maximum output current of tertiary voltage conversion chip is 3A), for the first power end of the 3rd power end and the first configuring chip that 1.8V DC voltage are exported respectively to the first fpga chip; 4th voltage conversion chip is used for 5V DC voltage being converted to 2.5V DC voltage (maximum output current of the 4th voltage conversion chip is 3A), for 2.5V DC voltage being exported respectively to the second source end of the 4th power end of the first fpga chip, the 3rd power end of fpga chip and the first configuring chip.
In the embodiment of the present invention, main control module is packaged on the first printed circuit board, and memory module is packaged on the second printed circuit board, and power module is packaged on the 3rd printed circuit board.These three printed circuit boards are fixed in the housing of target seeker datalogger respectively by screw.Preferably, be also provided with flexible printed circuit in the embodiment of the present invention, main control module and memory module realize being electrically connected by the wire on flexible printed circuit.
In sum, the present invention relates to a kind of target seeker datalogger, comprise power module, main control module and memory module, these three modules separately realize on three pieces of boards, it is square for being arranged on shape, and square one end has in the datalogger shell of a cylindrical protrusion.Wherein, main control module can be communicated with host computer by gigabit Ethernet, by the data that target seeker in host computer produces, utilizes flexible printed circuit to be recorded in memory module by self-defining Data Transport Protocol, the data that can also store from memory module retaking of a year or grade.Notebook data registering instrument has sturdy and durable, and memory capacity is large, and the feature that storage speed is fast, is particularly suitable for the storage to target seeker data, has larger practical value.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (6)
1. the target seeker datalogger based on SoC, it is characterized in that, comprise: main control module and the memory module for storing target seeker data, described main control module is used for memory module write target seeker data, and for reading target seeker data from memory module; Described memory module comprises fpga chip and FLASH storage array, described main control module comprises SoC chip and ethernet physical layer chip, described ethernet physical layer chip electrical is connected to host computer, described ethernet physical layer chip is serially connected between host computer and SoC chip, forms two-way communication be connected for making host computer and SoC chip;
Described host computer is used for data read command to be sent to SoC chip, or for data write order and target seeker data are sent to SoC chip; Described SoC chip is used for when receiving data write order, resolves described data write order; Described SoC chip is used for according to the data write order after resolving, from from choosing corresponding target seeker data the target seeker data of host computer; Described SoC chip is used for the target seeker data chosen to be sent to SoC chip, and described fpga chip is used for the target seeker data from SoC chip to write in described memory module;
Described SoC chip is used for when receiving data read command, resolves described data read command; Described SoC chip is used for the data read command after resolving to be sent to fpga chip; Described fpga chip is used for, according to the data read command after resolving, reading corresponding target seeker data from memory module, and for the target seeker data of correspondence are sent to SoC chip; Described SoC chip is used for the target seeker data from fpga chip to be sent to host computer.
2. a kind of target seeker datalogger based on SoC as claimed in claim 1, is characterized in that, also comprising the first configuring chip for configuring SoC chip and the second configuring chip for configuring fpga chip in described main control module.
3. a kind of target seeker datalogger based on SoC as claimed in claim 1, it is characterized in that, described memory module is made up of 4 groups of FLASH storage chips, often organizes FLASH storage chip and comprises 4 FLASH storage chips; The control line of each group of FLASH storage chip is separate, and each group FLASH storage chip shares a data line; The data line often organizing each FLASH storage chip in FLASH storage chip is separate, often organizes each FLASH storage chip in FLASH storage chip and shares a control line.
4. a kind of target seeker datalogger based on SoC as claimed in claim 1, is characterized in that, also comprise power module, and described power module is used for powering respectively to main control module and memory module.
5. a kind of target seeker datalogger based on SoC as claimed in claim 4, it is characterized in that, also comprise housing, described main control module is packaged on the first printed circuit board, described memory module is packaged on the second printed circuit board, and described power module is packaged on the 3rd printed circuit board; Each printed circuit board is fixed on enclosure interior.
6. a kind of target seeker datalogger based on SoC as claimed in claim 4, it is characterized in that, described memory module is made up of 4 groups of FLASH storage chips, often organizes FLASH storage chip and comprises 4 FLASH storage chips;
The model of described SoC chip is XC7Z020CLG485, and the model of described fpga chip is XC6SLX45FGG484, and the model of described ethernet physical layer chip is 88E1111-BAB, and the model of described each FLASH storage chip is MT29F128G08AJ;
Described power module comprises the first voltage conversion chip, the second voltage conversion chip, tertiary voltage conversion chip and the 4th voltage conversion chip; The model of described first voltage conversion chip is LT3976, and the model of described second voltage conversion chip, tertiary voltage conversion chip and the 4th voltage conversion chip is respectively TPS74401;
The input end of described first voltage conversion chip accesses the 28V DC voltage from outside, described first voltage conversion chip is used for 28V DC voltage to be converted to 5V DC voltage and 3.3V DC voltage respectively, described first voltage conversion chip is used for exporting 3.3V DC voltage to the first power end of SoC chip and the first power end of fpga chip respectively, and described first voltage conversion chip is used for input end 5V DC voltage being exported respectively to the input end of the second voltage conversion chip, the input end of tertiary voltage conversion chip and the 4th voltage conversion chip; Described second voltage conversion chip is used for 5V DC voltage being converted to 1V DC voltage, for 1V DC voltage being exported respectively to the second source end of SoC chip and the second source end of fpga chip; Described tertiary voltage conversion chip is used for 5V DC voltage to be converted to 1.8V DC voltage, for by 1.8V direct voltage output to the 3rd power end of SoC chip; Described 4th voltage conversion chip is used for 5V DC voltage to be converted to 2.5V DC voltage, for the 3rd power end of the 4th power end and fpga chip that 2.5V DC voltage are exported respectively to SoC chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410691300.9A CN104407817A (en) | 2014-11-26 | 2014-11-26 | Seeker data recorder based on SoC |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410691300.9A CN104407817A (en) | 2014-11-26 | 2014-11-26 | Seeker data recorder based on SoC |
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| CN104407817A true CN104407817A (en) | 2015-03-11 |
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| CN201410691300.9A Pending CN104407817A (en) | 2014-11-26 | 2014-11-26 | Seeker data recorder based on SoC |
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Citations (4)
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| CN102520892A (en) * | 2012-01-02 | 2012-06-27 | 西安电子科技大学 | Multifunctional solid state data storage playback instrument |
-
2014
- 2014-11-26 CN CN201410691300.9A patent/CN104407817A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101839974A (en) * | 2010-05-05 | 2010-09-22 | 北京航空航天大学 | Dual-interface radar data recorder |
| CN102063747A (en) * | 2010-12-18 | 2011-05-18 | 重庆长安汽车股份有限公司 | CAN data logger |
| CN102074055A (en) * | 2011-01-04 | 2011-05-25 | 浙江大学 | Multi-machine collaboration framework based fast recorder and self-calibration and multi-machine collaboration method |
| CN102520892A (en) * | 2012-01-02 | 2012-06-27 | 西安电子科技大学 | Multifunctional solid state data storage playback instrument |
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| 闵俊红 等: "弹载雷达信号处理Soc的设计与实现", 《空军预警学院学报》 * |
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Inventor after: Zhu Shengqi Inventor after: Quan Yinghui Inventor after: Xiao Chuanjiang Inventor after: Li Yachao Inventor after: Xing Mengdao Inventor after: Wang Jinlong Inventor after: Song Yaping Inventor after: Lu Xiaoyu Inventor before: Quan Yinghui Inventor before: Xiao Chuanjiang Inventor before: Li Yachao Inventor before: Xing Mengdao Inventor before: Wang Jinlong Inventor before: Song Yaping Inventor before: Lu Xiaoyu |
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Application publication date: 20150311 |
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