CN104270238B

CN104270238B - Method for synchronizing time, device and system

Info

Publication number: CN104270238B
Application number: CN201410524153.6A
Authority: CN
Inventors: 徐贵今; 龙国柱; 冯儒洲
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2009-09-30
Filing date: 2009-09-30
Publication date: 2017-09-12
Anticipated expiration: 2029-09-30
Also published as: CN104270238A

Abstract

The present invention provides a kind of method for synchronizing time, device and system.The method for synchronizing time includes：Obtain main transmission timestamp, from reception timestamp, from transmission timestamp and main reception timestamp, it is main to send the clock time that timestamp is the master clock side that main clock side is read when sending the ad-hoc location of default first special symbol, the clock time from clock side from timestamp is received to be read from clock side when receiving the ad-hoc location of the first special symbol, the clock time from clock side from timestamp is sent to be read from clock side when sending the ad-hoc location of the second special symbol, it is main to receive the clock time that timestamp is the master clock side that main clock side is read when receiving the ad-hoc location of the second special symbol；Adjusted according to the timestamp of acquisition from the clock time of clock side, make its synchronizing clock time with master clock side.The embodiment of the present invention realizes master clock side and the time synchronized from clock side in the pass band transfer system of signal is continuously transmitted in units of symbol.

Description

Method for synchronizing time, device and system

Technical field

The present invention relates to communication technical field, more particularly to a kind of method for synchronizing time, device and system.

Background technology

The appearance of 3G (Third Generation) Moblie (3G) and more advanced digital mobile technology, does not weaken the need to time synchronized Ask, for the demand of cost, safety and business, time synchronized is more important on the contrary.At present, mobile service is for time synchronized Required precision reached Microsecond grade, but the realization of precise synchronization is more difficult.

IEEE1588 Precision clock protocols (Precision Time Protocol, abbreviation PTP) standard to master clock and from Clock carries out Perfect Time and has simultaneously provided fundamental mechanism, and the mechanism, which needs to collect, travels to and fro between master clock and from the foot between clock Enough timestamp informations, time synchronized adjustment is carried out according to the timestamp information of collection to master clock and from clock.

Inventor has found during the embodiment of the present invention is realized, for most such as light, ether access systems, can use same Timestamp information needed for step pulse signal triggering acquisition, for example：Sending the edge of frame signal and corresponding receiving frame letter Number edge, corresponding timestamp is obtained respectively.But, the pass band transfer system for continuously transmitting signal in units of symbol System, is such as based on Discrete multi-tone (Discrete Multi Tone, abbreviation DMT), OFDM (Orthogonal Frequency Division Multiplexing, abbreviation OFDM) etc. system, there is no obvious boundary line between symbol and symbol, Receiving terminal acquisition timestamp information is extremely difficult, so that it is synchronous with the Perfect Time from clock side to be difficult to master clock side.

The content of the invention

The embodiments of the invention provide a kind of method for synchronizing time, device and system, for continuous in units of symbol In the communication system for transmitting signal, master clock side and the time synchronized from clock side are realized.

The embodiments of the invention provide a kind of method for synchronizing time, including：

Obtain main transmission timestamp, from reception timestamp, from transmission timestamp and main reception timestamp, during the main transmission Between stamp be received from clock side, the master clock that master clock side is read when sending the ad-hoc location of default first special symbol The clock time of side, it is described from when receiving timestamp for the ad-hoc location in reception first special symbol from clock side The clock time from clock side read, it is described to send second special symbol from clock side from transmission timestamp to be described Ad-hoc location when the clock time from clock side that reads, the main reception timestamp is that the master clock side is receiving described The clock time for the master clock side read during the ad-hoc location of the second special symbol；

From the clock time of clock side according to being adjusted the timestamp of acquisition, when making its clock with the master clock side Between it is synchronous.

The embodiments of the invention provide a kind of time synchronism apparatus, including：

Timestamp acquisition module, for obtaining main transmission timestamp, from receiving timestamp, from sending timestamp and main reception Timestamp, the main timestamp that sends is spy of from clock side reception, the master clock side in default first special symbol of transmission The clock time for the master clock side that positioning is read when putting, it is described to receive described first from clock side from reception timestamp to be described The clock time from clock side read during the ad-hoc location of special symbol, it is described to exist from transmission timestamp to be described from clock side The clock time from clock side read during the ad-hoc location for sending second special symbol, the main reception timestamp is institute State the clock time for the master clock side that master clock side is read when receiving the ad-hoc location of second special symbol；

Time regulating module, for the clock time according to the adjustment of the timestamp of acquisition from clock side, makes itself and institute State the synchronizing clock time of master clock side.

The embodiments of the invention provide another time synchronism apparatus, including：

Timestamp acquisition module, for obtaining main transmission timestamp and main reception timestamp, the main transmission timestamp is The clock time for the master clock side that master clock side is read when sending the ad-hoc location of default first special symbol, the master connects Receive timestamp be the master clock side that the master clock side is read when receiving the ad-hoc location of default second special symbol when Clock time；

Timestamp sending module, for sending the main transmission timestamp and the main reception timestamp to from clock side, The clock time from clock side is adjusted from clock side for described, makes its synchronizing clock time with the master clock side.

The embodiments of the invention provide a kind of clock synchronization system, including：

Master clock side apparatus, for obtaining main transmission timestamp and main reception timestamp and sending；

From clock side apparatus, for obtaining the main transmission timestamp, from receiving timestamp, from sending timestamp and described Main reception timestamp, is adjusted from the clock time of clock side according to the timestamp of acquisition, makes its clock time with master clock side It is synchronous；

The main timestamp that sends is that the master clock side apparatus is sending the ad-hoc location of default first special symbol When the clock time of master clock side that reads, it is described from receive timestamp for it is described from clock side apparatus to receive described first special The clock time from clock side read during the ad-hoc location for determining symbol, it is described from timestamp is sent to be described from clock side apparatus The clock time from clock side read when sending the ad-hoc location of second special symbol, the main reception timestamp is The clock time for the master clock side that the master clock side apparatus is read when receiving the ad-hoc location of second special symbol.

The embodiment of the present invention in units of symbol in the communication system of signal is transmitted, with predetermined special symbol Ad-hoc location as obtain timestamp information triggering border, and according to the timestamp information of acquisition carry out master-salve clock time It is synchronous so that in the pass band transfer system of signal is continuously transmitted in units of symbol, realize master clock side with from clock side Time synchronized.

Brief description of the drawings

In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing There is the accompanying drawing used required in technology description to be briefly described, it should be apparent that, drawings in the following description are only this Some embodiments of invention, for those of ordinary skill in the art, without having to pay creative labor, may be used also To obtain other accompanying drawings according to these accompanying drawings.

Fig. 1 a are application scenarios time synchronized fundamental mechanism schematic diagram of the embodiment of the present invention；

Fig. 1 b are a kind of method for synchronizing time flow chart provided in an embodiment of the present invention；

Fig. 2 is another method for synchronizing time flow chart provided in an embodiment of the present invention；

Fig. 3 is another method for synchronizing time flow chart provided in an embodiment of the present invention；

Fig. 4 a are another method for synchronizing time flow chart provided in an embodiment of the present invention；

Fig. 4 b are the application example one that the embodiment of the present invention determines average time deviation；

Fig. 4 c are the application example two that the embodiment of the present invention determines average time deviation；

The DSL system structural representation one for the pass band transfer that Fig. 5 provides for application scenarios of the embodiment of the present invention；

The DSL system structural representation two for the pass band transfer that Fig. 6 provides for application scenarios of the embodiment of the present invention；

Fig. 7 is a kind of time synchronism apparatus example structure schematic diagram provided in an embodiment of the present invention；

Fig. 8 is another time synchronism apparatus example structure schematic diagram provided in an embodiment of the present invention；

Fig. 9 is clock synchronization system example structure schematic diagram provided in an embodiment of the present invention.

Embodiment

Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not paid Embodiment, belongs to the scope of protection of the invention.

Fig. 1 a are application scenarios time synchronized fundamental mechanism schematic diagram of the embodiment of the present invention.As shown in Figure 1a, the present invention is real Applying a time synchronized fundamental mechanism can be briefly described as follows：

First, master clock cycle sends a synchronizing information (Sync), after synchronizing information is sent, also send one with With information (Follow_Up), follow information to include a timestamp (Time Stamp), have recorded true when sending synchronizing information Real master clock time, hereinafter referred to as based on send time stamp T m1.When receiving synchronizing information from clock log from clock when Between, hereinafter referred to as from reception time stamp T s1.

Then, delay request (Delay_Req), delay request are sent to master clock after synchronizing information is received from clock Comprising a timestamp, when the timestamp have recorded forward delay interval request from clock time, hereinafter referred to as from sending timestamp Ts2.Master clock is received after delay request, is sent delay response (Delay_Resp) to from clock, is also included in delay response Have a timestamp, have recorded master clock receive delay request when master clock time, hereinafter referred to as based on receive timestamp Tm2。

So, when receiving Delay_Resp from clock, four timestamps are obtained：Tm1, Ts1, Ts2 and Tm2.From Clock can calculate master clock and the time offset (Offset) from clock and transmission according to Tm1, Ts1, Ts2 and Tm2 of acquisition The delay of link.The delay of transmission link includes：The delay (Delay1) and the delay of uplink link of downlink transfer link (Delay2), wherein, master clock to from the transmission link between clock delay be downlink transfer link delay, from clock To the delay of the delay as uplink link of the transmission link between master clock.Time offset (Offset), descending biography Following relation is met between the delay (Delay1) of transmission link and the delay (Delay2) of uplink link：

Offset=Ts1-Tm1-Delay1 (1)

Offset=Ts2-Tm2+Delay2 (2)

Assuming that the delay (Delay1) of downlink transfer link is equal with the delay (Delay2) of uplink link, i.e., Delay1=Delay2, then can obtain：

Offset=(Ts1+Ts2-Tm1-Tm2)/2 (3)

The time offset (Offset) obtained according to formula (3), can be by from the synchronizing clock time of clock to master clock Clock time.

The embodiment of the present invention applies above-mentioned mechanism is transmitting the communication system of signal, such as DMT, OFDM in units of symbol Etc. in system.Due in the systems such as DMT, OFDM, being continuously transmitted between symbol and symbol, the border between symbol is difficult true It is fixed, therefore, the above-mentioned mechanism for realizing time synchronized is applied in the systems such as DMT, OFDM, it is necessary in these communication systems really Surely the triggering border of timestamp information is obtained.The embodiment of the present invention predefines special symbol in master clock side and from clock side The predeterminated position of ad-hoc location, i.e. predetermined symbol is the triggering border for obtaining timestamp information.

Fig. 1 b are a kind of method for synchronizing time flow chart provided in an embodiment of the present invention.The present embodiment method for synchronizing time Executive agent can be from clock side apparatus.As illustrated in figs. 1A and ib, the present embodiment method for synchronizing time includes：

Step 11, obtain main transmission timestamp, from receiving timestamp, from sending timestamp and main reception timestamp, wherein The main timestamp that sends is that from clock side reception, master clock side is read in the ad-hoc location of default first special symbol of transmission Master clock side clock time, from receive timestamp be from clock side receive the first special symbol ad-hoc location when read The clock time from clock side, from send timestamp be from clock side send the second special symbol ad-hoc location when read The clock time from clock side, main reception timestamp be main clock side receive the second special symbol ad-hoc location when read Master clock side clock time.

In the system of signal is continuously transmitted in units of symbol, it can preset and read local clock time for triggering Special symbol ad-hoc location, the position can be specially the original position of the symbol, and the original position of symbol can be specially to accord with Number cyclic prefix after position, can be by intersymbol interference (Inter Symbol during implementing Interference, abbreviation ISI) protection after position be used as symbol original position.In addition, can also by the end position of symbol or Middle any position etc. obtains the ad-hoc location of timestamp as triggering.

When needing to carry out the time synchronized of master-salve clock, main hair is triggered respectively in the relevant position of symbol set in advance Send timestamp, from timestamp, the read action from transmission timestamp and main reception timestamp is received, that is, obtain shown in Fig. 1 a Tm1, Ts1, Ts2 and Tm2.Master clock side is respectively in the ad-hoc location and the ad-hoc location of the second special symbol of the first special symbol The Tm1 and Tm2 read respectively, is carried in the corresponding message shown in Fig. 1 a and is transferred to opposite end, is so combined certainly from clock side The Ts1 and Ts2 read respectively in the ad-hoc location of the first special symbol and the ad-hoc location of the second special symbol, you can obtain Tm1, Ts1, Ts2 and Tm2.

Step 12, the above-mentioned timestamp according to acquisition, are adjusted from the clock time of clock side, make its with master clock side when Clock time is synchronous.

According to main transmission time stamp T m1, from reception time stamp T s1, from transmission time stamp T s2 and main reception time stamp T m2, The clock time of master clock side can be calculated according to formula (3) and from time offset (Offset) between the clock time of clock side, Clock time from clock side is adjusted according to obtained time offset (Offset) so that clock time and master from clock side The clock time of clock side keeps synchronous.

The present embodiment in units of symbol in the communication system of signal is transmitted, with the specific of predetermined special symbol Position is as the triggering border for obtaining timestamp information, when the ad-hoc location of special symbol arrives, and triggering, which is performed, obtains main hair Send timestamp, from reception timestamp, from the action for sending timestamp or main reception timestamp, and according to the above-mentioned timestamp of acquisition Information carries out the time synchronized of master-salve clock, so as in the system of signal is continuously transmitted in units of symbol, realize master clock Side and the time synchronized from clock side.

Fig. 2 is another method for synchronizing time flow chart provided in an embodiment of the present invention.The present embodiment method for synchronizing time Executive agent can be main clock side apparatus.As shown in Fig. 2 the present embodiment method for synchronizing time includes：

Step 21, the main transmission timestamp of acquisition and main reception timestamp, wherein, main transmission timestamp is main clock side in hair The clock time for the master clock side read during the ad-hoc location for sending default first special symbol, main reception timestamp is master clock The clock time for the master clock side that side is read when receiving the ad-hoc location of default second special symbol.

The ad-hoc location of the ad-hoc location of first special symbol and the second special symbol is all set in advance for triggering Local clock time is read in master clock side from clock side.For example：The ad-hoc location of first special symbol is used to trigger master clock Local clock time is read in side when sending the ad-hoc location of first special symbol, that is, reads main transmission time stamp T m1；Second When the ad-hoc location user triggering master clock side of special symbol reads local when receiving the ad-hoc location of second special symbol Clock time, that is, read main reception time stamp T m2.First special symbol and the second special symbol are different, but two special symbols Ad-hoc location can be with identical, such as：The original position of the first special symbol and the second special symbol is pre-set, respectively as The ad-hoc location of the ad-hoc location of one special symbol and the second special symbol.

Step 22, to from clock side send main transmission timestamp and main reception timestamp, for from clock side adjustment from when The clock time of clock side, makes its synchronizing clock time with master clock side.

The ad-hoc location of first special symbol is additionally operable to triggering and is receiving the certain bits of first special symbol from clock side Local clock time is read when putting, that is, is read from reception time stamp T s1；The ad-hoc location of second special symbol be additionally operable to triggering from Clock side reads local clock time when sending the ad-hoc location of second special symbol, that is, reads from transmission time stamp T s2.

From clock side according to the main transmission time stamp T m1 of acquisition, from receiving time stamp T s1, from sending time stamp T s2 and master Time stamp T m2 is received, be can adjust from the clock time of clock side, makes its synchronizing clock time with master clock side, specifically refers to The record of step 12, will not be repeated here in Fig. 1 b correspondence embodiments.

The present embodiment in units of symbol in the communication system of signal is transmitted, with the specific of predetermined special symbol Position is as the triggering border for obtaining timestamp information, and when the ad-hoc location of special symbol arrives, triggering performs read access time The timestamp of reading is sent to from clock side by the action of stamp, master clock side, for carrying out the time of master-salve clock from clock side It is synchronous, so as in the system of signal is continuously transmitted in units of symbol, realize master clock side and the time synchronized from clock side.

Fig. 3 is another method for synchronizing time flow chart provided in an embodiment of the present invention.The present embodiment is specific according to constituting The phase information of the phase information of the subcarrier of symbol, such as single carrier wave, symbol correction is carried out to obtaining timestamp.Such as Fig. 3 institutes Show, the present embodiment method for synchronizing time includes：

When the local clock of master clock side is read in step 31, master clock side when sending the ad-hoc location of the first special symbol Between, i.e., main transmission time stamp T m1 is sent to from clock side by main transmission time stamp T m1.

Step 32, from clock side when receiving the ad-hoc location of the first special symbol, read from clock side it is local when Clock time, i.e., from reception time stamp T s1 '.

In the present embodiment, the ad-hoc location of the first or second special symbol can be specially the original position of the special symbol. When master clock side or from clock side for receive synchronizing information receiving terminal when, can using determine symbol original position existing calculation Method, i.e. sign synchronization algorithm calculate the original position of special symbol, and are obtained in the original position for calculating obtained special symbol It is main reception timestamp or from receive timestamp.

But, due to the influence of the factor such as noise and the limitation of channel non-linearity and sampling rate, symbolization is synchronously calculated Method calculates the obtained original position of special symbol and the true original position of special symbol has certain error, particularly in frequency The relatively low upstream band of rate, because sampling rate is relatively low, channel linearly spent in the frequency response of these frequency bands it is very poor, so as to cause The calculation error of original position is larger.If calculating obtained original position with sign synchronization algorithm, obtain from reception timestamp Ts1 ' or main receives time stamp T m2 ', and the error thus calculated to time departure Offset will increase, so as to reduce The accuracy of time synchronized between clock side and master clock side.In order to improve the time synchronized between clock side and master clock side Accuracy, symbol correction can be carried out to the ad-hoc location of special symbol that calculating be obtained.The present embodiment is according to the specific symbol of composition Number subcarrier phase information, the phase information of such as single carrier wave, to obtain timestamp carry out symbol correction.

Step 33, any subcarrier for obtaining from clock side the first special symbol of composition, in master clock side and from clock side It is respectively relative to the phase difference of the ad-hoc location of special symbol。

Special symbol is generally consisted of a plurality of sub-carriers.In this step, any subcarrier respectively master clock side and from when Phase difference of the clock side relative to the original position of special symbol.Master clock side or the initialization information of receiving device from clock side Or in frequency domain equalization (Frequency domain equalizer, abbreviation FEQ) information, carry subcarrier in master clock side and From the phase difference between clock side, therefore, any subcarrier respectively master clock side and from clock side relative to special symbol The phase difference of original position, can be according to master clock side or from the initialization information or FEQ information of the receiving device of clock side, in advance Obtain.

Or, the phase difference can also according to the signal of the subcarrier in phase of the side relative to the original position of symbol, And the signal of the subcarrier is obtained in opposite side relative to the phase for the original position for calculating obtained symbol.Specifically, Master clock side apparatus or the stage that some known signal specifics are sent from the initialization procedure of clock side apparatus, the letter of subcarrier Number it is known relative to the phase of the original position of symbol.For example：The signal of a certain subcarrier is in master clock side relative to spy The original position for determining symbol is 0 °, but due to the original position and the true original position of special symbol of the special symbol that calculate There is certain error, the signal of the subcarrier can in the phase from original position of the clock side relative to the special symbol calculated It can not be 0 °, such as be 45 °.Under the situation, the signal of the subcarrier can be obtained in master clock side and relative respectively from clock side In the phase difference of the original position of special symbol, such as 。

In order to improve trimming process reliability and accuracy, the harmful effect of the factors such as frequency selective noise is reduced, can The signal of the preferable subcarrier of signal to noise ratio is selected to carry out symbol correction.

Step 34, from clock side determine with above-mentioned phase differenceCorresponding time deviation Δ t.

For example by obtained phase differenceIt is converted into time deviation Δ t.Optionally, time deviation is equal to phase difference With the quotient of angular speed.

Step 35, from clock side according to time deviation Δ t, to being corrected from receiving time stamp T s1 ', obtain Ts1 ' schools Time stamp T s1 after just.

The time deviation obtained from clock side according to the calculating of the subcarrier of the first special symbol of composition is used to correct Ts1 ', The time deviation that master clock lateral root is obtained according to the calculating of the subcarrier of the second special symbol of composition is used to correct Tm2 '.To from reception Time stamp T s1 ' or main, which receives time stamp T m2 ', which carries out symbol correction, may include：Connect in acquisition from time stamp T s1 ' or main is received Receive in timestamp Tm2 ' and subtract corresponding time deviation Δ t, after correct from reception time stamp T s1 or main reception timestamps Tm2。

This step to acquisition from receiving after time stamp T s1 ' and main reception time stamp T m2 ' is corrected, equivalent to will be from Time stamp T s1 ' and Tm2 ' that the ad-hoc location for the special symbol that the larger calculating of error is obtained is obtained, are corrected to real special The ad-hoc location for determining symbol obtains time stamp T s1 and Tm2.

Step 36, from clock side when sending the ad-hoc location of the second special symbol, read from the local clock of clock side Time, i.e., from transmission time stamp T s2, and the second special symbol is sent to master clock side.

Step 37, master clock side when receiving the ad-hoc location of the second special symbol, read master clock side it is local when Clock time, i.e., main reception time stamp T m2 '.

Step 38, master clock lateral root according to obtain constitute the second special symbol any subcarrier, master clock side and from when Clock side is respectively relative to the phase difference of the ad-hoc location of special symbol, it is determined that time deviation corresponding with the phase difference, according to when Between deviation main reception time stamp T m2 ' is corrected, obtain Tm2 ' correction after time stamp T m2.

The method that master clock side is corrected to main reception time stamp T m2 ' in this step, with step 33-35 from clock Side is similar to the method being corrected from reception time stamp T s1 ', will not be repeated here.

Main reception time stamp T m2 after Tm2 ' corrections is sent to from clock side by step 39, master clock side.

Step 310, from clock side according to main transmission time stamp T m1, from send after time stamp T s2, correction from when receiving Between main reception time stamp T m2 after stamp Ts1 and correction, adjust from the clock time of clock side, make its with master clock side when Clock time is synchronous.

Bring above-mentioned Tm1, Ts2, Ts1 and Tm2 into formula (3), solve master clock and the time migration (Offset) from clock, Adjusted according to Offset from the clock time of clock side, make its synchronizing clock time with master clock side.

The present embodiment is according to single carrier time deviation corresponding with the phase difference from clock side relative to master clock side, to master Receive time stamp T m2 ' and be corrected from time stamp T s1 ' is received so that main reception time stamp T m2 after correction and from reception The timestamp that time stamp T s1 convergence receiving terminals as far as possible are obtained in the ad-hoc location of real special symbol, thus reduces master Clock and the error from the time deviation amount between clock, so as to improve the accurate of between clock and master clock time synchronized Property.

Fig. 4 a are another method for synchronizing time flow chart provided in an embodiment of the present invention.The present embodiment is specific according to constituting The phase information of the subcarrier of symbol, the phase information of such as at least two carrier waves carries out symbol correction to obtaining timestamp.As schemed Shown in 4a, the present embodiment method for synchronizing time includes：

Step 41- steps 42 are similar to step 31- steps 32 respectively, will not be repeated here.

In step 43, at least two subcarriers for obtaining the first special symbol of composition from clock side, each subcarrier is when main Clock side and be respectively relative to from clock side special symbol ad-hoc location phase difference.

If calculating the error between the obtained ad-hoc location of special symbol and the ad-hoc location of real special symbol, More than one sub- carrier cycle, then can be carried out by the phase information of one group of subcarrier (subcarriers of such as two or more than two) Symbol correction.The method of any subcarrier acquisition phase difference is similar to step 33 in this step, will not be repeated here.

Step 44, the corresponding average time deviation of each phase difference is determined from clock side, according to average time deviation to from connecing Receive timestamp Ts1' be corrected, after correct from reception time stamp T s1.

Fig. 4 b are the application example one that the embodiment of the present invention determines average time deviation.The horizontal seat of the subgraph in Fig. 4 b upper left corners Subcarrier sequence number is designated as, ordinate is phase.To improve the accuracy of time synchronized, all subcarriers of symbol can constituted In, selection have preferable signal to noise ratio and the subcarrier of two of linear frequency response or more than two, that is, transmit the group son carry Each in ripple has approximately equalised time deviation in carrier wave.The subgraph in Fig. 4 b upper right corner is by numerical value Processing Algorithm, figure The curve matching of 4b upper left corners subgraph is in line, for example：Fig. 4 b upper left corners subgraph can be carried out using Minimum Mean Square Error scheduling algorithm Fitting, obtains the straight line shown in the subgraph in Fig. 4 b upper right corner.The subgraph in Fig. 4 b lower right corner is silver coin figure slope of a curve on Fig. 4 b, And Fig. 4 b lower left corners subgraph is the time deviation for the slope shown in the subgraph in Fig. 4 b lower right corner being converted into each subcarrier.If choosing Linearly degree is preferable for the frequency response of this group of subcarrier taken, and the corresponding time deviation of phase difference of each subcarrier is roughly equal, Straight line is shown as in the subgraph in Fig. 4 b lower left corners.Average time deviation △ t can be calculated according to each time deviation, to calculating The ad-hoc location of the special symbol arrived carries out symbol correction, the ad-hoc location of the special symbol after being corrected.

Fig. 4 c are the application example two that the embodiment of the present invention determines average time deviation.If each sub- load in one group of subcarrier The linear frequency response of ripple is poor, then can determine the corresponding mean time of the phase information of each subcarrier using the method shown in Fig. 4 c Between deviation, to reduce the error of symbol correction.Difference with Fig. 4 b processing methods is, directly by the son in its upper left corner in Fig. 4 c Figure is converted into the slope figure in its lower right corner, and the time for obtaining each subcarrier as shown in its lower left corner respectively according to the slope figure is inclined Difference.

After the time deviation of each carrier wave is obtained, each time deviation is averaged, that is, obtains average time deviation △ T, 5 reporting as shown in the subgraph to Fig. 4 c lower left corners are averaged, and wait until average time deviation △ t.According to average Time deviation Δ t from reception timestamp or main reception timestamp correspondingly to carrying out symbol correction, such as：In acquisition from when receiving Between stab Ts1 ' or main and receive in time stamp T m2 ' and subtract corresponding average time deviation delta t, after being corrected from the reception time Stab Ts1 or main reception time stamp Ts m2.

This step from clock side to from clock side obtain from receiving after time stamp T s1 ' is corrected, equivalent to from clock The time stamp T s1 ' that side obtains the ad-hoc location of the special symbol obtained from the larger calculating of error, is corrected to real special The ad-hoc location for determining symbol obtains time stamp T s1.

Step 45- steps 46 are similar to step 36 and step 37 respectively, will not be repeated here.

In at least two subcarriers that step 47, master clock lateral root constitute the second special symbol according to obtaining, each subcarrier exists Master clock side and be respectively relative to from clock side special symbol ad-hoc location phase difference, determine that each phase difference is corresponding average Time deviation, is corrected, the main reception timestamp after being corrected according to average time deviation to main reception time stamp T m2' Tm2。

The method that master clock side is corrected to main reception time stamp T m2 ' in this step, with step 43- steps 44 from Clock side is similar to the method being corrected from reception time stamp T s1 ', will not be repeated here.

After the main reception time stamp T m2 ' that this step master clock side is obtained to master clock side is corrected, equivalent to master clock The time stamp T m2 ' that side obtains the ad-hoc location of the special symbol obtained from the larger calculating of error, is corrected to real special The ad-hoc location for determining symbol obtains time stamp T m2.

Step 48- steps 49 are similar to step 39 and step 310 respectively, will not be repeated here.

In one group of subcarrier of the present embodiment according at least two sub- carrier waves compositions of the first or second special symbol of composition, According to each carrier wave average time deviation corresponding with the phase difference from clock side relative to master clock side, when correspondingly to main reception Between stab Tm2 ' or be corrected from time stamp T s1 ' is received so that main reception time stamp T m2 after correction and from receiving timestamp Ts1 convergence receiving terminals as far as possible real special symbol ad-hoc location obtain timestamp, thus reduce master clock and From the error of the time deviation amount between clock, so as to improve the accuracy of the time synchronized between clock and master clock.This Embodiment can further solve to calculate between the ad-hoc location of obtained special symbol and the ad-hoc location of real special symbol Error, symbol correction in the case of more than a sub- carrier cycle, thus be conducive to improve time synchronized accuracy.

All assume that downlink delay (Delay1) is equal to up-link time delay in above-mentioned Fig. 1 a- Fig. 4 c correspondences embodiment (Delay2) situation.If downlink delay (Delay1) is not equal to up-link time delay (Delay2), according to Fig. 1 a institutes The fundamental mechanism and formula (1) and formula (2) shown understand, the calculating of time offset (Offset) it needs to be determined that Delay1 and Corresponding relation between Delay2, i.e., according to time stamp T m1, Ts1, Ts2 and Tm2 of acquisition, and Delay1 and Delay2 it Between corresponding relation calculate Offset, adjust local clock time from clock side using Offset, make itself and master clock side sheet The synchronizing clock time on ground.

It is with reference to Digital Subscriber Line (Digital Subscriber Line, abbreviation DSL) technology of pass band transfer Example, illustrates how to determine the corresponding relation between downlink delay (Delay1) and up-link time delay (Delay2).

DSL technologies are a kind of high speed transmission technologies carried out data transmission by twisted-pair feeder, and the DSL of pass band transfer is including non- Symmetric digital subscriber line (Asymmetrical Digital Subscriber Line, abbreviation A DSL), very-high-bit-rate digital subscriber Line (Very High Speed Digital Subscriber Line, abbreviation VDSL) etc..The various DSL of pass band transfer are used DMT modulation techniques are modulated and demodulated.

The DSL system structural representation one for the pass band transfer that Fig. 5 provides for application scenarios of the embodiment of the present invention.Such as Fig. 5 institutes Show, the DSL system of pass band transfer includes：Local side unit (Remote Terminal Unit, abbreviation CO) and ustomer premises access equipment (Customer Premise Equipment, abbreviation CPE), is carried out data transmission, CO is located between CO and CPE by twisted-pair feeder Master clock side, CPE is located at from clock side, and CPE clock time needs are synchronous with CO clock time holding.

CO or CPE can be divided into three sublayers on physical media：Transportation protocol Dependence Convergence sublayer, physical medium correlation are converged Poly- (Physical Media Dependent-TC, abbreviation PMS-TC) sublayer and physical medium (Physical Media Dependent, abbreviation PMD) sublayer.It is therefore, preferable because the path delay of time that the twisted-pair feeder between CO and CPE is introduced is smaller It is the two ends reading local clock information as a reference point in twisted-pair feeder under state, that is, obtains timestamp.But due to twisted-pair feeder Two ends and do not support read-write capability generally for converting analog signals into the hybrid circuit of 2 tunnel telephone wires signals, therefore this Inventive embodiments obtain timestamp in the sublayer close to twisted-pair feeder, i.e. PMD sublayers as far as possible, to reduce equipment delay to calculating The error of time offset, so as to improve the accuracy of time synchronized.

The DSL system structural representation two for the pass band transfer that Fig. 6 provides for application scenarios of the embodiment of the present invention.Shown in Fig. 6 DSL system in CO sides and cpe side only illustrate the situation of PMD sublayer equipment.The PMD sublayers equipment of CO sides includes CO numbers Word signal sending circuit, CO analog signals transtation mission circuit, CO digital signal receiving circuits and CO analog signal receiving circuits；CPE The PMD sublayers equipment of side includes CPE data signals transtation mission circuit, CPE analog signals transtation mission circuit, CPE digital signal receptions electricity Road and CPE analog signal receiving circuits.And CO data signals transtation mission circuit, CO digital signal receiving circuits, CPE data signals are sent out The delay that power transmission road and CPE digital signal receiving circuits are produced can by known circuit-design information, by method of testing or Person is directly obtained by emulation mode, and the delay that these circuits are produced is referred to as equipment delay information.

In downlink from CO to CPE, the Delay Factor of generation includes：The delay △ of CO data signal transtation mission circuits The delay △ t2 of t1, CO analog signal transtation mission circuit, delay △ t3, CPE analog signal receiving circuits of downlink path delay The delay △ t1 ' of △ t2 ', CPE digital signal receiving circuits.Wherein, △ t1 and △ t2 are the main equipment of the embodiment of the present invention Delay, △ t2 ' and △ t1 ' is the slave unit Delay of the embodiment of the present invention, and △ t3 are the embodiment of the present invention Downlink path Delay.Therefore, downlink delay Delay1 is met：

Delay1=△ t1+ △ t2+ △ t3+ △ t2 '+△ t1 ' (4)

In up-link from CPE to CO, the Delay Factor of generation includes：The delay △ of CO digital signal receiving circuits The delay △ t5 of t4, CO analog signal receiving circuit, the delay of delay △ t6, CPE the analog signal transtation mission circuits of up path The delay △ t4 ' of △ t5 ', CPE data signal transtation mission circuits.Wherein, △ t4 and △ t5 are the main equipment of the embodiment of the present invention Delay, △ t5 ' and △ t4 ' is the slave unit Delay of the embodiment of the present invention, and △ t6 are the embodiment of the present invention Up path Delay.Therefore, up-link time delay D elay2 is met：

Delay2=△ t4+ △ t5+ △ t6+ △ t5 '+△ t4 ' (5)

Generally Delay1 ≠ Delay2, the difference of the two is typically larger than 1uS, therefore to time synchronized precision Influence it is larger.In actual applications, corresponding relation that can be between approximate processing Delay1 and Delay2, set up Delay1 and Functional relation between Delay2, for example：

Delay2=f (Delay1) (6)

In formula (6), function f can be linearly or nonlinearly function.Next function f is simplified, function f is simplified Linear function, to reduce the complexity of time offset calculating.

Inventor is prolonged during the embodiment of the present invention is realized by the method for measurement or circuit simulation to Fig. 6 each several parts When (as shown in formula (4)) carry out statistical analysis, find CO analog signals transtation mission circuit and CO analog signals receiving circuit processing not Delay △ t2 and △ t5 with subcarrier tends at fixed value, CPE analog signals transtation mission circuit and CPE analog signal receiving circuits Delay △ t2 ' and the △ t5 ' of reason different sub-carrier tend to fixed value.By investigating the characteristic of twisted-pair feeder, the lower walking along the street of twisted-pair feeder Footpath postpone △ t3 and downlink path delay △ t6 each Frequency point delay it is specific have specific relation, for example：

Delay(48±16×4.3125KHz)≈1.07×Delay(96±16×4.3125KHz) (7)

Above formula represent up 48 × 4.3125KHz nearby the transmission time of signal on the twisted-pair be approximately equal to 96 × 1.07 times of signal near 4.3125KHz.

By above-mentioned analysis, formula (6), which can simplify, to be expressed as follows：

Delay2=a*Delay1+b (8)

Wherein, Delay1 may be considered delay of the downstream signal by twisted-pair feeder；And Delay2 may be considered it is up The delay that signal passes through twisted-pair feeder.A and b is fixed coefficient, and its specific value can be by uplink and downlink device time delay and up and down line Delay-time characteristic obtain.

By formula (1), (2) and (8) simultaneous equations, time offset (Offset) can be solved.

It can also be delayed previously according to equipment and each timestamp is corrected to be carried out according to the timestamp after each correction Time synchronized.Tm1, Ts1, Ts2 and Tm2 shown in Fig. 6 are the timestamp obtained in PMD sublayers entrance, the embodiment of the present invention In the timestamp of acquisition can be corrected according to the equipment delay information of PMD sublayers so that timestamp after correction equivalent to It is to be obtained at twisted-pair feeder two ends.For example considering the timestamp after equipment delay is respectively：

Tm1 "=Tm1+ △ t1+ △ t2 (9)

Ts1 "=Ts1- (△ t1 '+△ t2 ') (10)

Tm2 "=Tm2-(△ t4+ △ t5) (11)

Ts2 "=Ts2+ (△ t4 '+△ t5 ') (12)

So, uplink downlink time delay D elay2 and Delay1 can be equivalent to the up-downgoing path delay of time at twisted-pair feeder two ends Delay2 ' and Delay1 ', Delay2 ' and Delay1 ' be respectively the up path time delay and downlink path time delay of twisted-pair feeder, root It can be obtained according to formula 1,2,4,5,9-12：

Delay2 '=a*Delay1 ' (13)

Offset=Ts1 "-Tm1 "-Delay1 ' (14)

Offset=Ts2 "-Tm2 "+Delay2 ' (15)

In formula (13), a is fixed coefficient, and its specific value can be obtained by the delay-time characteristic of the up and down line of twisted-pair feeder Arrive, it is preferred that a is any value for meeting 1≤a≤1.1.According to formula (13)-(15), it can solve and obtain Offset, according to Clock time on Offset adjustment CPE, makes itself and the synchronizing clock time on CO.Setting by PMD sublayers in the embodiment Standby Delay is corrected to the timestamp of acquisition so that the corresponding relation between uplink downlink time delay can be reduced to multiple twin The corresponding relation in the line up-downgoing path delay of time, the timestamp after correction is the equal of to be obtained at twisted-pair feeder two ends, therefore reduction CO and cpe side time offset calculation error, improves time synchronized accuracy.

Below based on the DSL system shown in Fig. 6, during with reference to symbol correction provided in an embodiment of the present invention and uplink downlink Prolong the determination method of corresponding relation, respectively to the downlink from CO to CPE and the timestamp school of the up-link from CPE to CO Positive process is illustrated.

(1) CO to CPE downlink：CO data signals transtation mission circuit reads corresponding in the ad-hoc location of special symbol CO sides local zone time, that is, obtain main transmission time stamp T m1；Special symbol is connect by downlink transmission to CPE data signals When receiving circuit, CPE digital signal receiving circuits read corresponding cpe side in the ad-hoc location for precalculating obtained special symbol Local zone time, that is, obtain from reception time stamp T s1 '.Next the time stamp T m1 and Ts1 ' of acquisition are corrected, correction point For three parts：

(1) corrections of the CPE to Ts1 '：Using the method shown in Fig. 3 or Fig. 4 a, according to the sub-carrier phase ability corresponding time Deviation from reception time stamp T s1 ' to being corrected, and the time stamp T s1 after Ts1 ' corrections is the equal of in real special symbol Ad-hoc location read.

(2) corrections of the CPE to Ts1：According to formula (10), using slave unit Delay △ t1 ' and the △ t2 ' obtained in advance Ts1 is corrected, the time stamp T s1 " after Ts1 corrections is the equal of that twisted-pair feeder is read close to cpe side.

(3) corrections of the CO to Tm1：According to formula (9), using main equipment Delay △ t1 and the △ t2 couple obtained in advance Tm1 is corrected, and the time stamp T m1 " after Tm1 corrections is the equal of that twisted-pair feeder is read close to CO sides.

It can thus be concluded that following relation：

Offset=Ts1 "-Tm1 "-Delay1 '

=(Ts1- (△ t1 '+△ t2 '))-(Tm1+ △ t1+ △ t2)-Delay1 ' (16)

(2) CPE to CO up-link：CPE data signals transtation mission circuit reads corresponding in the ad-hoc location of special symbol Cpe side local zone time, that is, obtain from send time stamp T s2；Special symbol is transferred to CO data signals by up-link and connect When receiving circuit, CO digital signal receiving circuits read corresponding CO sides sheet in the ad-hoc location for precalculating obtained special symbol The ground time, that is, obtain main reception time stamp T m2 '.Next the time stamp T s2 and Tm2 ' of acquisition are corrected, correction also divides For three parts：

(1) corrections of the CO to Tm2 '：Using the method shown in Fig. 3 or Fig. 4 a, according to the sub-carrier phase ability corresponding time Deviation is corrected to main reception time stamp T m2 ', and the time stamp T m2 after Tm2 ' corrections is the equal of in real special symbol Ad-hoc location read.

(2) corrections of the CO to Tm2：According to formula (11), using slave unit Delay △ t4 and the △ t5 couple obtained in advance Tm2 is corrected, and the time stamp T m2 " after Tm2 corrections is the equal of that twisted-pair feeder is read close to CO sides.

(3) corrections of the CPE to Ts2：According to formula (12), using main equipment Delay △ t4 ' and the △ t5 ' obtained in advance Ts2 is corrected, the time stamp T s2 " after Ts2 corrections is the equal of that twisted-pair feeder is read close to cpe side.

It can thus be concluded that following relation：

Offset=Ts2 "-Tm2 "+Delay2 '

=(Ts2+ (△ t4 '+△ t5 '))-(Tm2-(△ t4+ △ t5))+Delay2 ' (17)

Due to Delay2 '=a*Delay1 ', therefore can obtain Offset, Delay1 ' and Delay2 ', obtained according to solution Offset adjust the clock time of cpe side so that the synchronizing clock time of its time and CO side after adjusting.

The embodiment of the present invention obtains timestamp when PMD sublayers equipment receives and dispatches the ad-hoc location of special symbol, according to sub- load Ripple is corrected in the timestamp that the phase difference of CO sides and cpe side is obtained to receiving terminal, and simplifies pair of uplink downlink time delay It should be related to, secondary correction be carried out to timestamp according to the Delay of CO sides and the PMD sublayer equipment of cpe side so that acquisition The error of the time offset of CO sides and cpe side is significantly reduced, and improves the accuracy of time synchronized.

Fig. 7 is a kind of time synchronism apparatus example structure schematic diagram provided in an embodiment of the present invention.As shown in fig. 7, this Embodiment time synchronism apparatus includes：Timestamp acquisition module 71 and time regulating module 72.

Timestamp acquisition module 71 is used to obtain main transmission timestamp, connect from reception timestamp, from transmission timestamp and master Receive timestamp.Wherein, the main timestamp that sends is sending default first special symbol for received from clock side, master clock side The clock time for the master clock side read during ad-hoc location, is to receive the first special symbol from clock side from timestamp is received The clock time from clock side read during ad-hoc location, the second specific symbol is being sent from transmission timestamp to be described from clock side Number ad-hoc location when the clock time from clock side that reads, main reception timestamp is the master clock side to receive second special The clock time for the master clock side read during the ad-hoc location for determining symbol.

Time regulating module 72 is used for according to the adjustment of the timestamp of acquisition from the clock time of clock side, makes itself and master clock The synchronizing clock time of side.

On the basis of above-mentioned technical proposal, optionally, main reception timestamp can be：Master clock lateral root is special according to composition second Main reception timestamp after the phase information correction for the subcarrier for determining symbol.Time regulating module 72 can further comprise：From connecing Receive timestamp correction unit 721 and very first time adjustment unit 722.It is used for from timestamp correction unit 721 is received according to composition The phase information of the subcarrier of first special symbol, to being corrected from reception timestamp.Very first time adjustment unit 722 is used for According to main transmission timestamp, the main reception timestamp after receiving timestamp and correcting after sending timestamp, correcting, Adjust from the clock time of clock side, make its synchronizing clock time with master clock side.

Optionally, the son that can also be used to obtain the first special symbol of any composition from reception timestamp correction unit 721 is carried Ripple, in master clock side and the phase difference for the ad-hoc location for being respectively relative to from clock side the first special symbol；It is determined that with the phase The corresponding time deviation of difference；According to time deviation to being corrected from reception timestamp.Or, correct unit from timestamp is received 721 can also be used to be additionally operable to obtain the phase difference of the subcarrier of at least two the first special symbols of composition, and the phase difference is each son Carrier wave is respectively relative to the phase difference of the ad-hoc location of the first special symbol in master clock side and from clock side；Respectively determine with The corresponding time deviation of each phase difference；Determine the average time deviation of each time deviation；According to average time deviation to from reception Timestamp is corrected.

Optionally, in above-mentioned technical proposal, the main main PMD equipment for sending timestamp for main clock side is specific in transmission first The clock time for the master clock side read during the ad-hoc location of symbol, is to be connect from the PMD equipment of clock side from timestamp is received The clock time from clock side read during the ad-hoc location for receiving the first special symbol, is from clock side from timestamp is sent PMD equipment clock time from clock side for reading when sending the ad-hoc location of the second special symbol, main reception timestamp is The clock time for the master clock side that the PMD equipment of master clock side is read when receiving the ad-hoc location of the second special symbol.

Further, main transmission timestamp and main reception timestamp can be respectively：Master clock lateral root is according to the master obtained in advance PMD equipment delays information is to the corresponding timestamp after the clock time correction of each master clock side of reading.Time regulating module 72 It may include：Path delay of time determining unit 723, slave unit time delay adjustment unit 724 and the second time adjustment unit 725.During path Prolonging determining unit 723 is used to determine master clock side and between clock side, the correspondence of up path time delay and downlink path time delay Relation；Slave unit time delay adjustment unit 724 according to the slave unit Delay from PMD equipment from clock side obtained in advance, Respectively to being corrected from transmission timestamp and from timestamp is received；After second time adjustment unit 725 is used for according to correction The corresponding relation of timestamp and up path time delay and downlink path time delay, is adjusted from the clock time of clock side, make its with The synchronizing clock time of master clock side.

The present embodiment time synchronism apparatus in units of symbol in the communication system of signal is transmitted, with predetermined spy The ad-hoc location of symbol is determined as the triggering border for obtaining timestamp information, and when carrying out principal and subordinate according to the timestamp information of acquisition The time synchronized of clock so that in the pass band transfer system of signal is continuously transmitted in units of symbol, realize master clock side with from The time synchronized of clock side.The specific manifestation entity of the present embodiment time synchronism apparatus is unrestricted, can be certain from clock side Equipment, such as CPE, it realizes the mechanism of master-salve clock time synchronized reference can be made to Fig. 1 a~Fig. 6 corresponds to the record of embodiment, herein Repeat no more.

Fig. 8 is another time synchronism apparatus example structure schematic diagram provided in an embodiment of the present invention.As shown in figure 8, The present embodiment time synchronism apparatus includes：Timestamp acquisition module 81 and timestamp sending module 82.

Timestamp acquisition module 81 is used to obtain main transmission timestamp and main reception timestamp.Wherein, main transmission timestamp The clock time for the master clock side read for main clock side when sending the ad-hoc location of default first special symbol, main reception Timestamp is the clock time for the master clock side that main clock side is read when receiving the ad-hoc location of default second special symbol.

Timestamp sending module 82 is used to send main transmission timestamp and main reception timestamp to from clock side, for from when Clock side is adjusted from the clock time of clock side, makes its synchronizing clock time with master clock side.

On the basis of above-mentioned technical proposal, optionally, timestamp sending module 82 can further comprise：The main reception time Stamp correction unit 821 and timestamp transmitting element 822.Main reception timestamp correction unit 821 is used for specific according to composition second The phase information of the subcarrier of symbol, is corrected to main reception timestamp.Accordingly, timestamp transmitting element 822 is used to send out Send the main reception timestamp after main transmission timestamp and correction.

Optionally, main reception timestamp correction unit 821 can also be used to obtaining any subcarrier master clock side and from when Clock side is respectively relative to the phase difference of the ad-hoc location of the second special symbol；It is determined that time deviation corresponding with phase difference；According to Time deviation is corrected to main reception timestamp.Or, main reception timestamp correction unit 821 can also be used to obtain at least two The phase difference of individual subcarrier, the phase difference be each subcarrier in master clock side and from clock side, be respectively relative to the second specific symbol Number ad-hoc location phase difference；Time deviation corresponding with each phase difference is determined respectively；Determine the mean time of each time deviation Between deviation；Main reception timestamp is corrected according to average time deviation.

Optionally, the main timestamp that sends is sending the ad-hoc location of the first special symbol for the main PMD equipment of main clock side When the clock time of master clock side that reads；The main timestamp that receives is receiving the second special symbol for the PMD equipment of main clock side Ad-hoc location when the clock time of master clock side that reads.

Further, timestamp sending module 82 may also include main equipment time delay adjustment unit 823.Main equipment time delay adjustment Unit 823 can be used for being corrected respectively according to the main equipment Delay of the main PMD equipment obtained in advance.Accordingly, the time Stamp transmitting element 822 can also be used to send after the main transmission timestamp after main equipment time delay adjustment unit 823 is corrected and correction Main reception timestamp.

The present embodiment time synchronism apparatus in units of symbol in the communication system of signal is transmitted, with predetermined spy The ad-hoc location of symbol is determined as the triggering border for obtaining timestamp information, when the ad-hoc location of special symbol arrives, triggering The action of read access time stamp is performed, the timestamp of reading is sent to from clock side, for carrying out master-salve clock from clock side Time synchronized, so as in the system of signal is continuously transmitted in units of symbol, realize master clock side and the time from clock side It is synchronous.The specific manifestation entity of the present embodiment time synchronism apparatus is unrestricted, can be certain master clock side apparatus, such as CO, It realizes the mechanism of master-salve clock time synchronized reference can be made to the record of Fig. 1 a~Fig. 6 correspondence embodiments, will not be repeated here.

Fig. 9 is clock synchronization system example structure schematic diagram provided in an embodiment of the present invention.As shown in figure 9, this implementation The clock synchronization system that example is provided includes：Master clock side apparatus 91 and from clock side apparatus 92.

Master clock side apparatus 91 is used to obtain main transmission timestamp and main reception timestamp, and sends timestamp and master by main Timestamp is received to be sent respectively to from clock side apparatus 92.

It is used to obtaining main transmission timestamp, from receiving timestamp, from sending timestamp and the master from clock side apparatus 92 Timestamp is received, is adjusted according to the timestamp of acquisition from the clock time of clock side, makes its clock time with master clock side same Step.

In above-mentioned technical proposal, the main timestamp that sends is that main clock side apparatus is sending the spy of default first special symbol The clock time for the master clock side that positioning is read when putting, is described specific in reception first from clock side apparatus from timestamp is received The clock time from clock side read during the ad-hoc location of symbol, is to send second from clock side apparatus from timestamp is sent The clock time from clock side read during the ad-hoc location of special symbol, main reception timestamp is that the master clock side apparatus exists The clock time for the master clock side read during the ad-hoc location for receiving the second special symbol.

In the present embodiment clock synchronization system, believe using the ad-hoc location of predetermined special symbol as timestamp is obtained The triggering border of breath, when the ad-hoc location of special symbol arrives, triggering performs the action of read access time stamp, by the time of reading Stamp is sent to from clock side, for carrying out the time synchronized of master-salve clock from clock side, so as to continuously be passed in units of symbol In the system of defeated signal, master clock side and the time synchronized from clock side are realized.The refinement knot of the present embodiment master clock side apparatus Structure can be found in the record of Fig. 8 correspondence embodiments, and the record of Fig. 7 correspondence embodiments is can be found in from the refinement structure of clock side apparatus, Master clock side apparatus and the mechanism that master-salve clock synchronization is realized from the interaction of clock side apparatus, reference can be made to Fig. 1 a~Fig. 6 correspondences are implemented The record of example, will not be repeated here.

One of ordinary skill in the art will appreciate that：Accompanying drawing be module in the schematic diagram of one embodiment, accompanying drawing or Flow is not necessarily implemented necessary to the present invention.

One of ordinary skill in the art will appreciate that：The module in device in embodiment can be according to embodiment description point It is distributed in the device of embodiment, respective change can also be carried out and be disposed other than in one or more devices of the present embodiment.On The module for stating embodiment can be merged into a module, can also be further split into multiple submodule.

The embodiments of the present invention are for illustration only, and the quality of embodiment is not represented.

One of ordinary skill in the art will appreciate that：Realizing all or part of step of above method embodiment can pass through Programmed instruction related hardware is completed, and foregoing program can be stored in a computer read/write memory medium, the program Upon execution, the step of including above method embodiment is performed；And foregoing storage medium includes：ROM, RAM, magnetic disc or light Disk etc. is various can be with the medium of store program codes.

Finally it should be noted that：The above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although The present invention is described in detail with reference to the foregoing embodiments, it will be understood by those within the art that：It still may be used To be modified to the technical scheme described in previous embodiment, or equivalent substitution is carried out to which part technical characteristic；And These modifications are replaced, and the essence of appropriate technical solution is departed from the spirit and model of technical scheme of the embodiment of the present invention Enclose.

Claims

1. a kind of method for synchronizing time, it is characterised in that including：

Obtain main transmission timestamp, from receiving timestamp, from sending timestamp and main reception timestamp, the main transmission timestamp The master clock side read for received from clock side, master clock side when sending the ad-hoc location of default first special symbol Clock time, it is described from when receiving timestamp for the ad-hoc location in reception first special symbol from clock side The clock time from clock side read, it is described to send the institute of the second special symbol from clock side from transmission timestamp to be described The clock time from clock side read during ad-hoc location is stated, the main reception timestamp is that the master clock side is receiving described The clock time for the master clock side read during the ad-hoc location of the second special symbol；

According to acquisition it is described it is main transmission timestamp, it is described from receive timestamp, it is described from send timestamp and it is described it is main receive The timestamp adjustment clock time from clock side, makes its synchronizing clock time with the master clock side.

2. method for synchronizing time according to claim 1, it is characterised in that the ad-hoc location of first special symbol is Position after the cyclic prefix of first special symbol；The ad-hoc location of second special symbol is the described second specific symbol Number cyclic prefix after position.

3. method for synchronizing time according to claim 2, it is characterised in that the main reception timestamp is：When described main Clock lateral root is according to the main reception timestamp after the phase information correction for the subcarrier for constituting second special symbol；

It is described according to being adjusted the timestamp of acquisition from the clock time of clock side, when making its clock with the master clock side Between it is synchronous, including：

According to the phase information for the subcarrier for constituting first special symbol, it is corrected to described from reception timestamp；

According to the main transmission timestamp, the main reception after receiving timestamp and correcting after sending timestamp, correcting Timestamp, the adjustment clock time from clock side makes its synchronizing clock time with the master clock side.

4. method for synchronizing time according to claim 3, it is characterised in that according to the son for constituting first special symbol The phase information of carrier wave, is corrected to described from reception timestamp, including：

The subcarrier of any composition first special symbol is obtained, in the master clock side and described relative respectively from clock side In the phase difference of the ad-hoc location of first special symbol；

It is determined that time deviation corresponding with the phase difference；

According to the time deviation, it is corrected to described from reception timestamp.

5. method for synchronizing time according to claim 3, it is characterised in that according to the son for constituting first special symbol The phase information of carrier wave, is corrected to described from reception timestamp, including：

The phase difference of the subcarrier of at least two composition first special symbols is obtained, the phase difference is each subcarrier In the master clock side and described from clock side, the phase difference of the ad-hoc location of first special symbol is respectively relative to；

Time deviation corresponding with each phase difference is determined respectively；

Determine the average time deviation of each time deviation；

According to the average time deviation, it is corrected to described from reception timestamp.

6. method for synchronizing time according to claim 3, it is characterised in that：According to it is main transmission timestamp, from send the time After main reception timestamp and correction after stamp, correction from the timestamp adjustment clock time from clock side is received, make it With the synchronizing clock time of the master clock side.

7. the method according to any one of claim 1-6, it is characterised in that first special symbol and described second Special symbol is discrete multitone, DMT DMT symbols.

8. a kind of time synchronism apparatus, it is characterised in that including：

Timestamp acquisition module, for obtaining main transmission timestamp, from receiving timestamp, from sending timestamp and main reception time Stamp, the main timestamp that sends is certain bits of from clock side reception, the master clock side in default first special symbol of transmission The clock time for the master clock side read when putting, described is described specific in reception described first from clock side from timestamp is received The clock time from clock side read during the ad-hoc location of symbol, it is described to exist from transmission timestamp to be described from clock side The clock time from clock side read during the ad-hoc location for sending the second special symbol, the main reception timestamp is the master The clock time for the master clock side that clock side is read when receiving the ad-hoc location of second special symbol；

Time regulating module, for according to acquisition it is described it is main transmission timestamp, it is described from receive timestamp, it is described from send when Between stamp and it is described it is main receive the timestamp adjustment clock time from clock side, make its clock time with the master clock side It is synchronous.

9. time synchronism apparatus according to claim 8, it is characterised in that the ad-hoc location of first special symbol is Position after the cyclic prefix of first special symbol；The ad-hoc location of second special symbol is the described second specific symbol Number cyclic prefix after position.

10. time synchronism apparatus according to claim 9, it is characterised in that the main reception timestamp is：When described main Clock lateral root is according to the main reception timestamp after the phase information correction for the subcarrier for constituting second special symbol；The time adjusts Mould preparation block, including：

From timestamp correction unit is received, for the phase information according to the subcarrier for constituting first special symbol, to institute State and be corrected from reception timestamp；

Very first time adjustment unit, for according to the main transmission timestamp, after sending timestamp, correcting from the time of reception Main reception timestamp after stamp and correction, the adjustment clock time from clock side, make its with the master clock side when Clock time is synchronous.

11. time synchronism apparatus according to claim 10, it is characterised in that

The subcarrier for being additionally operable to obtain any composition first special symbol from reception timestamp correction unit, described Master clock side and the phase difference of the ad-hoc location that first special symbol is respectively relative to from clock side；It is determined that with it is described The corresponding time deviation of phase difference；According to the time deviation, it is corrected to described from reception timestamp.

12. according to any described time synchronism apparatus of claim 8-11, it is characterised in that first special symbol and institute The second special symbol is stated for discrete multitone, DMT DMT symbols.

13. a kind of time synchronism apparatus, it is characterised in that including：

Timestamp acquisition module, for obtaining main transmission timestamp and main reception timestamp, when the main transmission timestamp is main The clock time for the master clock side that clock side is read when sending the ad-hoc location of default first special symbol, during the main reception Between the master clock side read for the master clock side when receiving the ad-hoc location of default second special symbol of stamp clock when Between；

Timestamp sending module, for sending the main transmission timestamp and the main reception timestamp to from clock side, for It is described to adjust the clock time from clock side from clock side, make its synchronizing clock time with the master clock side.

14. time synchronism apparatus according to claim 13, it is characterised in that the ad-hoc location of first special symbol For the position after the cyclic prefix of first special symbol；The ad-hoc location of second special symbol is described second specific Position after the cyclic prefix of symbol.

15. time synchronism apparatus according to claim 14, it is characterised in that the timestamp sending module, including：

Main reception timestamp correction unit, for the phase information according to the subcarrier for constituting second special symbol, to institute Main reception timestamp is stated to be corrected；

Timestamp transmitting element, for sending the main main reception timestamp sent after timestamp and correction.

16. time synchronism apparatus according to claim 15, it is characterised in that

The main reception timestamp correction unit be additionally operable to obtain any subcarrier the master clock side and it is described from when Clock side is respectively relative to the phase difference of the ad-hoc location of second special symbol；It is determined that the time corresponding with the phase difference is inclined Difference；According to the time deviation, the main reception timestamp is corrected.

17. according to any described time synchronism apparatus in claim 13-16, it is characterised in that first special symbol It is discrete multitone, DMT DMT symbols with second special symbol.

18. a kind of clock synchronization system, it is characterised in that including：

From clock side apparatus, for obtaining the main transmission timestamp, being connect from reception timestamp, from transmission timestamp and the master Timestamp is received, is adjusted according to the timestamp of acquisition from the clock time of clock side, makes its synchronizing clock time with master clock side；

The main timestamp that sends is that the master clock side apparatus is read when sending the ad-hoc location of default first special symbol The clock time of the master clock side taken, it is described to receive the first specific symbol from clock side apparatus from reception timestamp to be described Number ad-hoc location when the clock time from clock side that reads, it is described from send timestamp for it is described from clock side apparatus in hair The clock time from clock side read during the ad-hoc location for sending the second special symbol, when the main reception timestamp is described main The clock time for the master clock side that clock side apparatus is read when receiving the ad-hoc location of second special symbol.

19. clock synchronization system according to claim 18, it is characterised in that

The ad-hoc location of first special symbol is the position after the cyclic prefix of first special symbol；Described second is special It is the position after the cyclic prefix of second special symbol to determine the ad-hoc location of symbol.

20. clock synchronization system according to claim 19, it is characterised in that

The master clock side apparatus is additionally operable to the phase information according to the subcarrier for constituting second special symbol, to the master Timestamp is received to be corrected；Send the main main reception timestamp sent after timestamp and correction；

The phase information being additionally operable to from clock side apparatus according to the subcarrier for constituting first special symbol, to it is described from Timestamp is received to be corrected；According to it is described it is main send timestamp, from send timestamp, correction after from receive timestamp, with And the main reception timestamp after correction, the adjustment clock time from clock side, when making its clock with the master clock side Between it is synchronous.