CN104170083A - 用于具有至封装表面的线键合的堆叠封装组件的方法 - Google Patents

用于具有至封装表面的线键合的堆叠封装组件的方法 Download PDF

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Publication number
CN104170083A
CN104170083A CN201380013536.0A CN201380013536A CN104170083A CN 104170083 A CN104170083 A CN 104170083A CN 201380013536 A CN201380013536 A CN 201380013536A CN 104170083 A CN104170083 A CN 104170083A
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Prior art keywords
line
bonding
substrate
line bonding
face
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CN201380013536.0A
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CN104170083B (zh
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雷纳尔多·柯
劳拉·马卡瑞米
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Adeia Semiconductor Solutions LLC
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Tessera LLC
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    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Abstract

一种微电子组件(10)包括具有相对的第一表面和第二表面的衬底(12)。微电子元件(22)覆盖第一表面且第一导电元件(28)可暴露在第一表面或第二表面中的至少一个上。一些第一导电元件(28)电连接至微电子元件(22)。线键合(32)具有联接至导电元件(28)的基(34)和远离衬底与基的端面(38),每个线键合限定在基和端面之间延伸的边缘表面。封装层(42)可从第一表面延伸且填充线键合之间的空隙,以使线键合可以通过封装层相互分离。线键合(32)的未封装部分由线键合的端面(38)的未被封装层(42)覆盖的至少部分限定。

Description

用于具有至封装表面的线键合的堆叠封装组件的方法
相关申请的交叉引用
本申请是在2013年1月29日提交的美国专利申请No.13/752,485的继续申请,美国专利申请No.13/752,485是在2012年2月24日提交的美国专利申请No.13/405,125,即2013年2月12日授权的现在的美国专利No.8,372,741的继续申请,其公开内容通过引用并入本文。
发明背景
本发明的实施例涉及制作可用于堆叠封装组件的微电子封装的各种结构及方式,尤其是涉及包含线键合用作堆叠封装连接的部分的结构。
微电子器件(如半导体芯片)典型地要求至其他电子部件的输入和输出连接。半导体芯片或其他类似的器件的输入和输出触点通常设置成基本覆盖器件的表面的栅格状图案(一般称为“面阵”),或者设置成可以平行且邻近器件的前表面的每个边缘延伸的细长的行,或者设置在前表面的中心。典型地,器件(如芯片)必须物理地安装在衬底(如印刷电路板)上,且器件的触点必须电连接至电路板的导电特征。
半导体芯片通常设置在封装中以便于在制备期间以及将芯片安装到外部衬底(如电路板或其他电路面板)期间处理芯片。例如,许多半导体芯片设置在适于表面安装的封装中。已经提出了大量这种普通类型的封装用于各种应用。一般而言,这种封装包括介质元件,一般称为“芯片载体”,端子形成为在介质上的电镀或刻蚀的金属结构。这些端子典型地通过特征(如沿芯片载体自身延伸的细迹线)以及通过在芯片的触点和端子或迹线之间延伸的精细的引线或者线连接至芯片自身的触点。在表面安装操作中,将封装放置在电路板上以使封装上的每个端子与电路板上的相应的触点焊盘对齐。在端子和触点焊盘之间设置焊锡或者其他键合材料。通过加热组件以熔融或“回流”焊锡或者活化键合材料可以将封装永久地键合在适当的位置。
很多封装包括附接至封装的端子的焊锡球(典型地直径约为0.1mm和0.8mm(5和30毫英寸))形式的焊锡块。具有从其底面突出的焊锡球阵列的封装一般称为球栅阵列或“BGA”封装。称为平面栅阵列或“LGA”封装的其他封装通过由焊锡形成的薄层或焊区紧固至衬底。这种类型的封装可以相当紧凑。某些封装,一般称为“芯片级封装”,占用的电路板的面积等于或仅仅略大于置入封装内的器件的面积。这种封装的优势在于减小组件的整体尺寸且允许使用衬底上的各种器件之间的短互连,这反过来限制器件之间的信号传播时间,从而促进组件的高速运行。
封装的半导体芯片通常设置在“堆叠”布置中,其中一个封装设置在,例如电路板上,而另一个封装安装在第一个封装的顶部。这些布置能允许许多不同芯片安装在电路板上的单个占位面积(footprint)内,并且通过在封装间设置短互连能进一步促进高速运行。通常,这个互连距离仅仅略大于芯片本身的厚度。为了在芯片封装堆叠内实现互连,有必要在每个封装两侧(除了最顶部的封装)设置用于机械连接和电连接的结构。这个步骤可以例如,通过在安装有芯片的衬底的两侧设置触点焊盘或焊区,焊盘通过导电通孔等连接穿过衬底而进行。使用焊锡球等以联接下衬底顶部的触点和下一个上衬底底部的触点之间的空隙。焊锡球必须高于芯片的高度以连接触点。美国专利申请公开No.2010/0232129(“第129公开物”)提供了堆叠芯片布置和互连结构的示例,其公开内容全部通过引用并入本文。
可使用细长的接线柱或引脚形式的微触点元件将微电子封装连接至电路板以及用于微电子封装的其他连接。在一些示例中,通过刻蚀包括一个或多个金属层的金属结构而形成微触点。刻蚀工艺限制了微触点的尺寸。典型地,传统的刻蚀工艺不能形成具有大高宽比(在此称为“纵横比”)的微触点。要形成具有可观的高度和很小的相邻微触点之间的间距或间隙的微触点阵列,是很困难甚至不可能的。此外,通过传统刻蚀工艺形成的微触点的配置是有局限性的。
尽管现有技术具有以上所述的优点,但在微电子封装的制作和测试上仍期待进一步的改进。
发明内容
一种微电子组件可包括具有相对的第一表面及第二表面的衬底。微电子元件可覆盖第一表面,且第一导电元件可暴露在第一表面或第二表面中的至少一个上。一些第一导电元件可电连接至微电子元件。线键合具有联接至导电元件的基和远离衬底与基的端面。每个线键合可限定在基和端面之间延伸的边缘表面。封装层可从第一表面延伸且填充线键合之间的空隙,以使线键合可以通过封装层相互分离。线键合的未封装部分可由线键合的端面的未被封装层覆盖的至少部分限定。
在此公开的各种封装结构包含用作从导电元件(例如,衬底上的导电焊盘)向上延伸的垂直连接的线键合。这种线键合可用来与覆盖介质封装的表面的微电子封装形成堆叠封装电连接。此外,在此公开用于制作微电子封装或微电子组件的方法的各种实施例。
因此,根据本发明的一个方面,一种微电子封装的制作方法可包括:a)从键合工具的毛细管进给具有预定长度的金属线段;b)使用键合工具将金属线的一部分键合至暴露在衬底的第一表面上的导电元件,从而在导电元件上形成线键合的基;c)将线的一部分夹持在键合工具内;d)在被夹持部分和基部分之间的一位置处切割金属线以至少部分地限定线键合的端面,线键合的边缘表面限定在基和端面之间;e)重复步骤(a)-(d)以形成至衬底的多个导电元件的多个线键合;以及e)然后形成覆盖衬底的表面的介质封装层,其中,封装层形成为至少部分地覆盖衬底的表面和线键合的部分,以使线键合的未封装部分由线键合的未被封装层覆盖的端面或边缘表面中的至少一个的部分限定。
因此,根据本发明的一个方面,具有预定长度的金属线段可从键合工具的毛细管进给。键合工具可用于将金属线的一部分键合至暴露在衬底的第一表面上的导电元件。此键合可在导电元件上形成线键合的基。线的一部分可在形成与导电元件的键合之后被夹持。被夹持的线的部分可在键合工具之内。金属线可在被夹持部分与基部分之间的一位置处被切割,且切割该线可至少部分地限定线键合的端面。线键合的边缘表面可限定在基和端面之间。上述步骤可被重复以形成至衬底的多个导电元件的多个线键合。然后,可形成覆盖衬底的表面的介质封装层。该封装层可形成为至少部分地覆盖衬底的表面和线键合的部分。线键合的未被封装部分可由线键合的未被封装层覆盖的端面或边缘表面中的至少一个的部分限定。
在一个示例中,所述金属线可以仅被部分穿过而切割。可以从衬底的表面移开键合工具,而线的部分仍然被夹持。在此过程中,可导致线在切割位置处断裂。端面可通过切割和断裂形成。
在一个示例中,可在大体垂直于线键合的边缘表面的方向上完全穿过线段进行切割。线键合的端面可通过切割形成。
在一个示例中,至少一个微电子元件可覆盖衬底的第一表面。该衬底可具有第一区域和第二区域,且微电子元件可位于第一区域内,如覆盖该第一区域。导电元件可以位于第二区域内,如暴露在第二区域内的第一表面上的导电元件。导电元件可电连接至至少一个微电子元件。介质封装层可形成为至少在衬底的第二区域内覆盖衬底的第一表面,但可在第一区域及第二区域内覆盖第一表面的至少一部分。
在一个示例中,封装可以配置为该类线键合中的第一个线键合适用于承载第一信号电位且该类线键合中的第二个线键合适用于同时承载不同于第一信号电位的第二信号电位。
在一个示例中,可使用安装在键合工具上的激光器切割金属线段。在该示例中,键合工具的毛细管可限定其用于进给所述线段的面。激光器可安装在键合工具上或与键合工具一起安装,以便可将切割光束引导至布置在键合工具的面和线键合的基之间的线段的一位置处。
在一个示例中,键合工具可包括限定其用于进给线段的面的毛细管。毛细管可包括在其侧壁中的开口,且激光器可安装在键合工具上或与键合工具一起安装以使切割光束可穿过开口至布置在毛细管内的线段的一位置处。
在一个示例中,激光器可为CO2、Nd:YAG或铜蒸汽激光器中的一种。
在一个示例中,可使用在毛细管内延伸的切割刃来切割金属线。在一个示例中,切割刃可在朝向与线段相对的所述毛细管的壁的方向上延伸。在一个示例中,可通过作为第一切割刃的切割刃和在毛细管内延伸的第二切割刃的结合使用来切割金属线。第二切割刃可与第一切割刃相对布置。
在一个示例中,毛细管可限定其用于进给线段的面。可使用具有相对的第一切割刃和第二切割刃的切割装置来切割金属线。切割装置可安装在所述键合工具上或与键合工具一起安装,以使线可在键合工具的面和线键合的基之间的一位置处被切割。
该方法的一个示例可包括将模板布置在衬底上。该模板可具有覆盖且暴露导电元件的至少部分的多个开口。这些开口可限定布置在衬底上的第一高度处的各个边缘。线段可通过线抵着模板开口的边缘的横向移动被切割。
根据本发明的一个方面,一种微电子封装的制作方法可包括:将模板布置在加工用单元上,该加工用单元包括具有第一表面和远离第一表面的第二表面的衬底。微电子元件可安装至衬底的第一表面。多个导电元件可暴露在第一表面上。在一个示例中,至少一些导电元件可电连接至微电子元件。该模板可具有覆盖且暴露导电元件的至少部分的多个开口。这些开口可限定布置在衬底上的第一高度处的各个边缘。
根据此方面,该方法可包括通过一工艺形成线键合,该工艺包括从键合工具的毛细管进给金属线,以使预定长度延伸超过毛细管的面且限定金属线段。线段的一部分可联接至多个导电元件的一个导电元件以形成线键合的基。该金属线段的至少一部分可通过线抵着模板开口的边缘的横向移动而从与其连接的线的另一部分剪切,以分离线键合与该线的剩余部分。金属线的剪切可限定线键合的端面,该线键合具有在基和端面之间延伸的边缘表面。可使用该模板的一个或多个开口多次重复如上所述的金属线的进给、键合及剪切,以在多个导电元件上形成多个线键合。
在此方法的一个示例中,介质封装层可形成在加工用单元上,其中封装层形成为至少部分地覆盖第一表面和线键合的部分。线键合的未封装部分可由线键合的未被封装层覆盖的端面或边缘表面中的至少一个的部分限定。
在此方法的一个示例中,延伸超过毛细管的面且在剪切金属线之后剩余的金属线的一部分具有足以形成至少下一个线键合的基的长度。
在此方法的一个示例中,模板可限定在沿着该类孔中的一个的轴线延伸的方向(例如,背离衬底的表面的垂直方向)上的厚度。这类孔中的一些或全部可具有贯穿模板厚度的一致的或恒定的直径。
在此方法的一个示例中,模板可限定在该类孔或开口中的一个的轴线方向(例如,背离衬底的表面的垂直方向)上的厚度。模板中的这类孔或开口中的一些或全部可从开口内的暴露边缘处的第一宽度或较小直径逐渐变成该类孔或开口内且更邻近衬底的另一位置处的第二较大宽度或较大直径。
在一个示例中,模板可包括具有在衬底的厚度的方向上的第一厚度且沿着衬底的一个或多个边缘延伸的边缘件。第一厚度可限定第一高度。中心部分可包括该类孔或开口且可由边缘件界定。中心部分可具有背离衬底的外表面。该外表面可设置在第一高度处。该中心部分可具有小于第一厚度的厚度。
附图说明
图1示出根据本发明实施例的微电子封装;
图2示出图1中的微电子封装的俯视正视图;
图3示出根据本发明一个可选实施例的微电子封装;
图4示出根据本发明一个可选实施例的微电子封装;
图5示出根据本发明一个可选实施例的微电子封装;
图6示出根据本发明实施例的包括微电子封装的堆叠微电子组件;
图7示出根据本发明一个可选实施例的微电子封装;
图8A-8E示出根据本发明的各种实施例的微电子封装的一部分的详细视图;
图9示出根据本发明一个可选实施例的微电子封装的一部分的详细视图;
图10A-10D示出根据本发明各种实施例的微电子封装的一部分的详细视图;
图11-14示出根据本发明实施例在各个制造步骤中的微电子封装;
图15示出根据本发明一个可选实施例的一个制造步骤中的微电子封装;
图16A-16C示出根据本发明实施例的在各个制造步骤中的微电子封装的一部分的详细视图;
图17A-17C示出根据本发明一个可选实施例的在各个制造步骤中的微电子封装的一部分的详细视图;
图18示出根据本发明一个可选实施例的微电子封装的俯视正视图;
图19示出根据本发明一个可选实施例的微电子封装的一部分的俯视正视图;
图20示出根据本发明另一可选实施例的微电子封装的俯视图;
图21示出权利要求20所示的微电子封装的前正视图;
图22示出根据本发明另一可选实施例的微电子封装的前正视图;
图23示出根据本发明另一实施例的系统;
图24示出根据本发明另一可选实施例的微电子封装的前正视图;
图25示出根据本发明另一可选实施例的微电子封装的前正视图;
图26示出根据图25所示的实施例的变型的微电子封装的俯视图;
图27示出根据本发明另一可选实施例的微电子封装的前正视图;
图28示出根据图27所示的实施例的变型的微电子封装的俯视图;
图29示出根据另一实施例的微电子封装的剖视图;
图30示出根据另一个实施例的微电子封装的剖视图;
图31A-C是根据进一步实施例的微电子封装实施例的示例的剖视图;
图32A和图32B示出在根据本发明另一个实施例的方法的各个阶段中形成各种线键合通孔所用的机器的一部分;
图33示出在根据本发明另一个实施例的方法中形成各种线键合通孔所用的机器的一部分;
图34A-C示出根据本发明实施例的在制作线键合的方法中所用的装置的各种形式。
具体实施方式
现在来看附图,其中使用类似的标号用以指示类似的特征,图1所示为根据本发明实施例的微电子组件10。图1所示的实施例是以封装的微电子元件形式的微电子组件(例如,用于电脑或其他电子设备的半导体芯片组件)。
图1所示的微电子组件10包括具有第一表面14和第二表面16的衬底12。衬底12典型地为基本上平坦的介质元件的形式。介质元件可为片状且可以很薄。在特定实施例中,介质元件可包括但不限于一层或多层有机介质材料或复合介质材料,例如,聚酰亚胺,聚四氟乙烯(“PTFE”),环氧树脂,环氧玻璃,FR-4,BT树脂,热塑性材料或热固性塑料材料。第一表面14和第二表面16优选为基本上相互平行,且在垂直于表面14和16的方向上相互间隔开一段距离以限定衬底12的厚度。衬底12的厚度优选为本发明大体可接受厚度范围内。在一个实施例中,第一表面14和第二表面16之间的距离大约为25μm-500μm。为了上述目的,第一表面14可布置成相对于或远离第二表面16。这种描述以及在此使用的元件的相对位置(即这些元件的垂直或水平位置)的任何其他描述仅仅是相应于附图中的元件的位置所作的示意性说明,不用于限定本发明。
在优选实施例中,衬底12可分成第一区域18和第二区域20。第一区域18位于第二区域20内且包括衬底12的中心部分并从中心部分向外延伸。第二区域20基本环绕第一区域18,且从第一区域18向外延伸至衬底12的外边缘。在这个实施例中,衬底自身不存在具体特征物理地划分为这两个区域,但是为了在此讨论关于应用于这两个区域的处理或包含在这两个区域中的特征,两个区域被区分开。
微电子元件22可以安装至衬底12的第一区域18内的第一表面14。微电子元件22可为半导体芯片或另一个可类比的器件。在图1的实施例中,微电子元件22安装至第一表面14,以称为常规的或“面朝上”的方式。在这个实施例中,可以使用引线24将微电子元件22电连接至暴露在第一表面14处的多个导电元件28中的一些导电元件。引线24还可以联接至衬底12内的迹线(未示出)或其他导电特征,迹线(未示出)或其他导电特征又连接至导电元件28。
导电元件28包括暴露在衬底12的第一表面14处的各个“触点”或焊盘30。如本文中使用的,当导电元件描述为“暴露在”具有介质结构的另一元件表面时,这说明导电结构可以与在垂直于介质结构表面的方向上从介质结构外部向介质结构表面移动的理论点接触。因此,暴露在介质结构的表面的端子或其他导电结构可从这样的表面突出;可与这样的表面平齐;或者可相对于这样的表面凹入并通过介质中的孔或凹入部暴露。导电元件28可为平且薄的元件,其中焊盘30暴露在衬底12的第一表面14处。在一个实施例中,导电元件28可基本为圆形,且可彼此互连或通过迹线(未示出)连接至微电子元件22。至少在衬底12的第二区域20内形成导电元件28。此外,在某些实施例中,也可在第一区域18内形成导电元件28。当将微电子元件122(图3)以称为“倒装”的配置安装至衬底112时,这样的布置特别有用,其中微电子元件122上的触点可通过布置在微电子元件122下的焊锡凸块126等连接至第一区域118内的导电元件128。在如图22所示的另一个配置中,微电子元件622可面朝下安装在衬底612上,且通过在衬底612的面向外的表面(如表面616)上延伸的引线624电连接至芯片上的导电特征。在所示实施例中,引线625穿过衬底612中的开口625且可通过包胶模具699密封。
在一个实施例中,导电元件28可由固体金属材料形成,固体金属材料例如为铜,金,镍或其他该应用可接受的材料,包括各种合金,该合金包含铜、金、镍或其组合中的一种或多种。
至少一些导电元件28可互连至相应的第二导电元件40,例如,暴露在衬底12的第二表面16处的导电焊盘。使用形成在衬有或填充有导电金属的衬底12中的通孔41以完成这种互连,衬底12可以衬有或填充同导电元件28和40相同的材料。可选地,导电元件40可通过衬底12上的迹线进一步互连。
微电子组件10进一步包括联接至至少一些导电元件28(如导电元件28的焊盘30)的多个线键合。线键合32在其基34处联接至导电元件28,且可延伸至远离各个基34和远离衬底12的自由端部36。线键合32的端部36的自由的特征在于其没有电连接或以其他方式联接至微电子元件22或微电子组件10中的任何其他导电特征,这些其他导电特征又连接至微电子元件22。换句话说,自由端部36可以直接或间接地通过焊锡球或在此所述的其他特征电连接至组件10外部的导电特征。端部36通过封装层42(举例而言)保持在预定的位置或以其他方式联接或电连接至另一个导电特征,这并不意味着端部36不是如在此所述的“自由”,只要任何这种特征没有电连接至微电子元件22即可。相反地,如在此所述,基34不是自由的,因为它直接或间接地电连接至微电子元件22。如图1所示,基34的形状基本为圆形,且从基34和端部36之间限定的线键合32的边缘表面37向外延伸。基34的特定尺寸和形状可根据用于形成线键合32的材料类型,线键合32和导电元件28之间连接的预期强度,或用于形成线键合32的特定工艺而改变。制作线键合28的示例性方法在美国专利No.7,391,121,Otremba和美国专利申请公开No.2005/0095835(描述一种线键合的形式的楔形键合工艺)中描述,两者的公开内容皆通过引用全部并入本文。可选实施例也是可行的,其中线键合32可另外地或可选地联接至暴露在衬底12的第二表面16上且从第二表面16延伸的导电元件40。
线键合32可由导电材料(如铜、金、镍、焊锡、铝等)制成。此外,线键合32可由各种材料的组合制成,例如由芯和涂布在芯上的涂层制成,芯由导电材料(如铜或铝)制成。涂层可由第二导电材料(如铝,镍等)制成。可选地,涂层可由绝缘材料(如绝缘夹套)制成。在一个实施例中,用于形成线键合32的线可具有约15μm-150μm的厚度(即横穿线的长度的尺寸)。在包括其中使用楔形键合的其他实施例中,线键合32可具有厚达约500μm的厚度。一般而言,线键合使用本领域已知的专用设备而形成在导电元件(例如导电元件28、焊盘、迹线等)上。线段的引导端经加热且压着线段所键合的容纳表面,典型地,形成联接至导电元件28的表面的球状或类似于球状的基34。从键合工具拉伸出用于形成线键合的线段的预期长度,然后该键合工具可在预期长度处切割线键合。例如,可用于形成铝线键合的楔形键合是一种工艺,其中线被加热的部分被拖曳跨过容纳表面以形成大体与表面平行的楔子。然后经楔形键合形成的线键合可向上弯曲(如果需要),且在切割之前延伸至预期长度或位置。在特定实施例中,用于形成线键合的线的横截面可为圆柱形。另外,从工具进给的用于形成线键合或经楔形键合的线键合的线可具有多边形横截面,例如矩形或梯形。
线键合32的自由端部36具有端面38。端面38可形成由多个线键合32的各个端面38形成的阵列中的触点的至少一部分。图2示出这种由端面38形成的触点阵列的示例性图案。这种阵列可形成为面阵配置,使用在此所述的结构可实现阵列变型。这种阵列可用于电连接和机械连接微电子组件10至另一个微电子结构,例如印刷电路板(“PCB”),或其他封装的微电子元件(图6示出一个示例)。在这种堆叠布置中,线键合32和导电元件28和40可通过该布置承载多个电子信号,每个电子信号具有不同的信号电位以允许不同的信号由单个堆叠中不同的微电子元件处理。焊锡块52可用于这种堆叠中微电子组件的互连,例如通过将端面38电附接和机械附接至导电元件40。
微电子组件10进一步包括由介质材料形成的封装层42。在图1所示的实施例中,封装层42形成在衬底12的第一表面14的未被微电子元件22或导电元件28覆盖或占据的部分上。类似地,封装层42形成在导电元件28(包括导电元件28的焊盘30)的未被线键合32覆盖的部分上。封装层42也可基本覆盖微电子元件22,线键合32(包括线键合32的基34和线键合32的边缘表面37的至少一部分)。线键合32的一部分可保持不被封装层42覆盖,该部分也可称为未封装的,由此使线键合能够电连接至位于封装层42外部的特征或元件。在一个实施例中,线键合32的端面38保持不被封装层42覆盖在封装层42的主表面44内。其他实施例也是可行的,其中边缘表面37的一部分未被封装层42覆盖,除了或者替代具有未被封装层42覆盖的端面38。换句话说,封装层42可覆盖微电子组件10的除线键合36的一部分(例如端面38、边缘表面37或二者的组合)之外的第一表面14及以上的所有特征。在如图所示的实施例中,封装层42的表面(如主表面44)可以一段足以覆盖微电子元件22的距离与衬底12的第一表面14间隔开。因此,其中线键合32的端面38与表面44平齐的微电子组件10的实施例将包括高于微电子元件22的线键合32以及用于倒装连接的任何底层焊锡凸块。但是,封装层42的其他配置也是可行的。例如,封装层可具有不同高度的多个表面。在这种配置中,内部布置有端面38的表面44可高于或低于其下设置有微电子元件22的面朝上的表面。
封装层42用于保护微电子组件10内的其他元件,特别是线键合32。这保障更加坚固的结构,以使在对其检测或运输或组装至其他微电子结构的过程中不太可能被损坏。封装层42可由具有绝缘性能的介质材料形成,例如美国专利申请公开No.2010/0232129中描述的,其公开内容全部通过引用并入本文。
图3示出微电子组件110的实施例,微电子组件110包括线键合132,线键合132具有未直接布置在线键合132的各个基34之上的端部136。换言之,考虑到衬底112的第一表面114在两个横向上延伸,以大体上限定平面,端部136或至少一个线键合132在这些横向中的至少一个上从基134的相应的横向位置移动。如图3所示,线键合132沿着其纵向轴线基本是直的,如图1的实施例所示,纵向轴线相对于衬底112的第一表面114成角度146。虽然图3的剖视图只示出在垂直于第一表面114的第一平面的角度146,线键合132在垂直于第一平面和第一表面114的另一个平面内相对于第一表面114成一个角度。这个角度可基本等于或不同于角度146。换言之,端部136可相对于基134在两个横向上移动,且可以在每个横向上移动相同或不同的距离。
在一个实施例中,各个线键合132可在不同方向上移动且可以在组件110内移动不同量。这种布置允许组件110具有配置在不同于衬底12所在水平面的表面144的水平面上的阵列。例如,与衬底112的第一表面114相比较,阵列在表面144上可比在第一表面114水平面处覆盖较小的总面积或具有较小间距。进一步,一些线键合132可具有布置在微电子元件122之上的端部136,以容纳不同大小的封装的微电子元件的堆叠布置。在如图19所示的另一示例中,线键合132可以配置为一个线键合132A的端面138A大体布置另一个线键合132B的基134B之上,线键合132B的端面138B布置在其他地方。这种布置可称为相对于第二表面116上的相应的触点阵列的位置,在触点阵列内改变触点端面138的相对位置。在这种阵列中,触点端面的相对位置可如所期待的根据微电子组件的应用或其他要求而改变或变化。
在如图30所示的进一步示例中,线键合132可布置为基134布置成具有间距的第一图案。线键合132可配置为其未封装部分139(包括端面138)可设置成在封装层142的主表面144的位置处的图案,未封装部分139具有大于附接至导电元件128的线键合的各相邻基134之间的最小间距的最小间距。相应地,在封装表面146上相邻线键合之间的最小间距可大于线键合所附接的衬底的导电元件128之间的相应最小间距。
为了实现这点,线键合可成角度(如图30所示),或可以如图4所示弯曲,以使端面138从如上所述的基134在一个或多个横向上移动。如图30进一步所示,导电元件128和端面138可布置成各行或各列,且在一行中的端面138的横向位移可大于另一行中的位移。为了实现这点,线键合132可相对于衬底112的表面116成不同角度146A、146B(举例而言)。
图4示出微电子子组件210的进一步实施例,该微电子子组件210包括线键合232,线键合232具有相对于基234位于移动的横向位置的端部236。在图4的实施例中,线键合132通过包括其弯曲部分248而实现横向移动。弯曲部分248可在线键合形成过程的额外步骤中形成,且(举例而言)当线部分被拉伸至预期长度时,可出现弯曲部分248。利用可用的线键合设备可进行这一步骤,其中包括使用单个机器。
根据需要,弯曲部分248可采用多种形状以达到线键合232的端部236的预期位置。例如,弯曲部分248可形成为各种形状的S型曲线(如图4所示的S型曲线)或更平滑的形式(如图5所示的)。此外,弯曲部分248可布置在比接近端部236而更接近基234的位置,反之亦然。弯曲部分248可为螺旋形或环形,或为包括多个方向上的或不同形状或性质的曲线的组合。
图5示出微电子封装310的进一步示例性实施例,微电子封装310包括具有导致基334和端部336之间各种相对的横向位移的各种形状的线键合332的组合。线键合332A中的一些基本上是直的且端部336A布置在线键合各个基334A之上,而其他线键合332B包括导致端部336B和基334B之间略微相对的横向位移的略微弯曲的部分348B。进一步,一些线键合332C包括具有流线型形状的弯曲部分348C,该弯曲部分348C导致端部336C从相关的基334C横向移动一段大于端部334B移动的距离的距离。图5也示出一对示例性的这种线键合332Ci和332Cii,线键合332Ci和332Cii具有布置在衬底所在水平面的阵列中同一行的基334Ci和334Cii,以及布置在相应的衬底所在水平面的阵列的不同行的端部336Ci和336Cii。
线键合332D的进一步变型配置为在其侧表面47上不被封装层342覆盖。在这个实施例中,自由端部336D未被覆盖,但是,边缘表面337D的一部分可另外地或可选地不被封装层342覆盖。这种配置可用于通过电连接至适当的特征而将微电子组件10接地,或用于机械或电连接至横向布置在微电子组件310上的其他特征。此外,图5示出封装层342的经过刻蚀、模塑或其他方式形成的区域,以限定布置为比主表面342更接近衬底12的凹入表面345。一个或多个线键合(如线键合332A)可在沿着凹入表面345的区域内不被覆盖。在图5所示的示例性实施例中,端面338A和边缘表面337A的部分未被封装层342覆盖。这种配置可提供至另一个导电元件的连接,例如通过焊锡球等,通过允许焊锡吸附在边缘表面337A且联接至边缘表面337A和端面338。线键合的一部分可不被封装层342沿着凹入表面345覆盖的其他配置也是可行的,这些配置包括其中端面大体与凹入表面345平齐的配置或在此所示的关于封装层342的任何其他表面的其他配置。类似地,线键合332D沿着侧表面347的一部分未被封装层342覆盖的其他配置可类似于本文其他地方所述的关于封装层的主表面的变型。
图5进一步示出在一个示例性布置中具有两个微电子元件322和350的微电子组件310,其中微电子元件350面朝上堆叠在微电子元件322上。在这种布置中,引线324用于将微电子元件322电连接至衬底312上的导电特征。各种引线用于将微电子元件350电连接至微电子元件310的各种其他特征。例如,引线380将微电子元件350电连接至衬底312的导电特征,且引线382将微电子元件350电连接至微电子元件322。此外,在结构上类似于各个线键合332的线键合384用于在电连接至微电子元件350的封装层342的表面344上形成触点表面386。这可以用于将另一个微电子组件的特征从封装层342之上电连接至微电子元件350。当只包括该微电子元件而不包括附接在其上的第二微电子元件350时,还可以包括连接至微电子元件322的引线。封装层342上形成有开口(未示出),且开口从封装层342的表面344延伸至沿例如引线380的点,由此提供至引线380的通道用于通过位于表面344外的元件电连接至引线380。可以在其他任何一个引线或线键合332上形成类似的开口,例如,在远离线键合332的端部336C的点处的线键合332C上形成开口。在这个实施例中,端部336C可以布置在表面344之下,且开口提供用于电连接至其上的唯一通道。
图6示出微电子组件410和488的堆叠封装。在这种布置中,焊锡块452将组件410的端面438电连接和机械连接至组件488的导电元件440。堆叠封装可包括另外的组件且可最终附接至PCB 490等上的触点492,以供在电子器件中使用。在这种堆叠布置中,线键合432和导电元件430可通过其承载多个电子信号,每个信号具有不同的信号电位以允许不同的信号由单个堆叠中的不同的微电子元件(如微电子元件422或微电子元件489)处理。
在图6的示例性配置中,线键合432可配置有弯曲部分448,以使至少一些线键合432的端部436延伸至覆盖微电子元件422的主表面424的区域内。这个区域可由微电子元件422的外围限定,且从外围向上延伸。图18以面朝衬底412的第一表面414的视角示出这种配置的一个示例,其中线键合432覆盖微电子元件422的背面的主表面,微电子元件422在其前面425处倒装键合至衬底412。在另一个配置(图5)中,微电子元件422可面朝上安装至衬底312,且前面325背离衬底312,且至少一个线键合336覆盖微电子元件322的前面。在一个实施例中,这种线键合336未与微电子元件322电连接。键合至衬底312的线键合336也可覆盖微电子元件350的前面或背面。如图18所示的微电子组件410的实施例使得导电元件428布置成形成第一阵列的图案,其中导电元件428布置成环绕微电子元件422的行和列,且可具有各个导电元件428之间的预定间距。线键合432联接至导电元件428,以使线键合432的各个基434遵循导电元件428设置的第一阵列的图案。但是,线键合432配置为线键合432的各个端部436可以根据第二阵列配置布置成不同的图案。在所示的实施例中,第二阵列的间距可不同于,且在一些情况下小于第一阵列的间距。但是,其他实施例也是可行的,其中第二阵列的间距大于第一阵列的间距,或导电元件428未设置成预定阵列,而线键合432的端部436设置成预定阵列。此外,导电元件428可配置在遍及衬底412的阵列组中,且线键合432配置为端部436在不同的阵列组或单个阵列中。
图6进一步示出沿着微电子元件422的表面延伸的绝缘层421。在形成线键合之前,绝缘层421可由介质或其他电绝缘的材料形成。绝缘层421可保护微电子元件不与在其上延伸的线键合423中的任何一个接触。特别地,绝缘层421可避免线键合之间的短路以及线键合与微电子元件422之间的短路。通过这种方式,绝缘层421可帮助避免由于线键合432和微电子元件422之间的误电接触导致的故障或可能的损坏。
图6和图18所示的线键合配置可允许微电子组件410连接至另一个微电子组件(如微电子组件488),在例如微电子组件488和微电子组件422的相对尺寸不允许的某些情况下。在图6的实施例中,微电子组件488的尺寸形成为一些触点焊盘440位于面积小于微电子元件422的前表面424或后表面426的面积的区域内的阵列中。在具有大体垂直的导电特征(如接线柱)的微电子组件中,代替线键合432,导电元件428和焊盘440之间的直接连接是不可行的。但是,如图6所示,具有适当配置的弯曲部分448的线键合432可在适当位置具有端部436,以实现微电子组件410和微电子组件488之间必要的电连接。这种布置可用于制作堆叠封装,其中微电子组件418为例如具有预定的焊盘阵列的DRAM芯片等,且其中微电子元件422为用于控制DRAM芯片的逻辑芯片。这允许单个类型的DRAM芯片与不同尺寸的多个不同的逻辑芯片(包括那些比DRAM芯片大的逻辑芯片)一起使用,因为线键合432可具有布置在必要位置以和DRAM芯片形成期待的连接的端部436。在一个可选实施例中,微电子封装410可安装在另一配置内的印刷电路板490上,其中线键合432的未封装表面436电连接至电路板490的焊盘492。此外,在这个实施例中,另一个微电子封装(如封装488的变型)可通过联接至焊盘440的焊锡球452安装在封装410上。
具有多个微电子元件的微电子封装的其他布置如图31A-C所示。这些布置可与例如图5所示及图6所示的堆叠封装布置中的线键合的布置结合使用,如下文进一步讨论的。具体来讲,图31A示出一种布置,其中下微电子元件1622倒装键合至衬底1612的表面1614上的导电元件1628。第二微电子元件1650面朝上安装在第一微电子元件1622的顶部且通过线键合1688连接至其他导电元件1628。图31B示出一种布置,其中第一微电子元件1722面朝上安装在表面1714上且通过线键合1788连接至导电元件1728。第二微电子元件1750通过第二微电子元件1750的一组触点1726倒装安装在第一微电子元件1722的顶部,该组触点1726面向且联接至第一微电子元件1722的前面上的相应触点。第一微电子元件1722上的触点又可通过第一微电子元件1722的电路图案相连接且通过一些线键合1788连接至衬底1712上的导电元件1728。
图31C示出一种布置,其中第一微电子元件1822和第二微电子元件1850并排安装在衬底1812的表面1814上。微电子元件(以及另外的微电子元件)中的一个或者两个可以以如上所述的面朝上或倒装配置安装。此外,这种布置中采用的微电子元件中的任何一个可通过一个或两个这种微电子元件上,或衬底上,或前述两种上的电路图案相互连接,电路图案电连接与微电子元件电连接的各个导电元件1828。
图7示出具有沿着封装层42的表面44延伸的再分布层54的图1所示的类型的微电子组件10。如图7所示,迹线58电连接至内触点焊盘61,内触点焊盘61电连接至线键合32的端面38且穿过再分布层54的衬底56延伸至暴露在衬底56的表面62上的触点焊盘60。然后,另一个微电子组件可通过焊锡块等连接至触点焊盘60。类似于再分布层54的结构(称为扇出层(fan-out layer))可以沿着衬底12的第二表面16延伸。扇出层可允许微电子组件10连接至与导电元件40阵列原本允许的配置不同的配置的阵列。
图8A-8E示出可实施于类似图1-7的结构中的线键合32的端部36的结构中或其附近的各种配置。图8A示出一种结构,其中腔64形成在封装层42的一部分中,以使线键合32的端部36突出在腔64处的封装层的次表面43上。在所示的实施例中,端面38布置在封装层42的主表面44下,且腔64构造成在表面44处暴露端面38以允许电子结构与端面38连接。其中端面38大体与表面44平齐或在表面44上间隔开的其他实施例也是可行的。进一步地,腔64可配置为线键合32的端部36附近的端面37的一部分可不被腔64内的封装层42覆盖。这可允许从端面38及端部36附近的端面37的未覆盖部分进行从组件10的外部至线键合32的连接,例如焊锡连接。这种连接在图8B中示出且可使用焊锡块52提供至第二衬底94的更为稳健的连接。在一个实施例中,腔64可在表面44下方具有约10μm-50μm的深度,且可具有约100μm-300μm的宽度。图8B示出具有类似于图8A所示的结构但具有锥形侧壁65的腔。进一步地,图8B示出第二微电子组件94,第二微电子组件94通过触点焊盘96处的暴露于其衬底98的表面处的焊锡块52电连接和机械连接至线键合32。
腔64可通过在腔64的预期区域中移除封装层42的一部分而形成。这可通过已知的工艺进行,该工艺包括激光刻蚀、湿法刻蚀、研磨等。可选地,在其中可通过注射成型形成封装层42的一个实施例中,腔64可通过在模具中包括相应的特征而形成。这种工艺在美国专利申请公开No.2010/0232129中论述,该美国专利申请全部通过引用并入本文。图8B所示的腔64的锥形形状可为其形成中使用的特殊刻蚀工艺的结果。
图8C和图8E示出包括线键合32上的大体圆形的端部分70的端部结构。圆形端部分70配置成具有宽于基34和端部36之间的线键合32的部分的横截面的横截面。进一步地,圆形端部分70包括边缘表面71,边缘表面71在其与线键合32的边缘表面37之间的过渡处从边缘表面37向外延伸。圆形边缘部分70的并入可用于通过提供锚定特征而将线键合32紧固在封装层42内,其中表面71方向的改变给予封装层42在三个侧面上包围端部70的位置。这可帮助防止线键合32与衬底12上的导电元件28分离,从而导致电连接失败。此外,圆形端部分70可提供可进行电连接的表面44内不被封装层42覆盖的增加表面面积。如图8E所示,圆形端部分70可在表面44上延伸。可选地,如图8C所示,圆形端部分70可进一步碾磨或以其他方式变平以提供与表面44大体齐平的表面,且可具有大于线键合32的横截面的面积。
圆形端部分70可通过在用于制作线键合32的线的端部处以火焰或火花的形式施加局部热量而形成。已知的线键合机器可改装用于执行此步骤,该步骤可在切割线以后立即进行。在此过程中,热量在线的端部处使线熔化。液体金属的局部可通过其表面张力而变圆且当金属冷却时仍保持圆形。
图8D示出微电子组件10的配置,其中线键合32的端部36包括在封装层42的主表面44之上间隔开的表面38。这种配置可体现类似于以上关于腔64所述的益处,具体地,通过使用焊锡块68提供更为稳健的连接,该焊锡块68沿着边缘表面37的表面44上的未被封装层42覆盖的部分吸附。在一个实施例中,端面38可以约10μm-50μm的距离在表面42上间隔开。此外,在图8D所示的实施例及其中边缘表面37的一部分在封装层42表面上且未被封装层42覆盖的其他实施例中,端部可包括在其上形成的保护层。这种保护层可包括氧化保护层,包括由金、氧化物涂料或OSP制作的氧化保护层。
图9示出具有形成在线键合32的端面38上的凸点72的微电子组件10的实施例。凸点72可在制作微电子组件10之后通过应用在端面44的顶部且任选地沿着表面44的一部分延伸的另一个改变的线键合而形成。在不拉伸线的长度的情况下,在其基的附近切割或以其他方式剪切改变的线键合。含有某些金属的凸点72可直接应用于端部38,而无需首先应用诸如UBM的键合层,因此提供了形成与不通过焊锡直接润湿的键合焊盘的导电互连的方式。当线键合32由不可润湿的金属制成时,这极为有用。一般而言,基本上由铜、镍、银、铂及金中的一种或多种组成的凸点可以这种方式应用。图9示出形成在凸点72上的焊锡块68,以用于电连接或机械连接至另外的微电子组件。
图10A-10D示出包括弯折或弯曲形状的线键合32的端部36的配置。在每个实施例中,弯曲线键合32的端部36以使其一部分74大体平行于封装层42的表面44而延伸,以使边缘表面76的至少一部分不被,例如,主表面44覆盖。边缘表面37的部分可在表面44之外向上延伸或可经碾磨或以其他方式变平以便与表面44大体齐平地延伸。图10A的实施例包括在端部36的部分74处的线键合32中的突然弯折,该突然弯折平行于表面44且终止于大体垂直于表面44的端面38。图10B示出端部36,端部36具有在平行于表面44的端部36的部分74附近的比图10A所示更为平缓的弯曲。其他配置也是可行的,包括其中根据图3、图4或图5所示的线键合的一部分包括其一部分大体平行于表面44且其边缘表面的一部分在表面44内的一位置处且不被封装层42覆盖的一端的配置。此外,图10B所示的实施例包括其端部上的钩状部分75,钩状部分75将端面38布置在封装层42内在表面44下。这可为端部36提供不太可能会从封装层42内移动的更为坚固的结构。图10C和图10D示出分别类似于图10A和图10B所示的结构但通过形成于封装层42中的腔64而在沿着表面44的一位置处不被封装层42覆盖的结构。这些腔可在结构上类似于图8A和图8B所述的结构。包括端部36(包括平行于表面44而延伸的其一部分74)可由于延长的未被覆盖的边缘表面75为与其的连接提供增加的表面积。这一部分74的长度可大于用于形成线键合32的线的横截面的宽度。
如图29所示的进一步示例中,多个线键合1432可联接在单个导电元件1428上。这样一组线键合1432可用于制作封装层1442上的另外的连接点以与导电元件1428电连接。共同联接的线键合1432的暴露部分1439可在尺寸例如大约是导电元件1428本身的尺寸的区域或接近键合块的预定尺寸的另一区域内在封装层1442的表面1444上的分组,以形成线键合1432组的外部连接。如图所示,这种线键合1432可为如上所述的导电元件1428上的球形键合或边缘键合。在形成与衬底上的导电元件的多个线键合时,可采用在此所述的用于在线键合过程中切断金属线的各种技术(例如,通过激光器或其他切割装置)。
图11-15示出微电子组件10制造方法的各个步骤中的微电子组件10。图11示出其中微电子元件22已电连接且机械连接至衬底12在其第一表面14上且在第一区域18内的一步骤的微电子组件10’。如图11所示,微电子元件22以倒装布置安装在衬底12上,例如,通过面向且联接至衬底的相对表面14上的相应触点的微电子元件22上的触点。举例而言,可通过诸如块26的导电材料(如导电膏、导电基质材料、焊锡块)来制作微电子元件的触点和衬底的触点之间的联接,且该触点可采用诸如焊盘、接线柱(如微柱、凸点等)以及其他任何适合的配置。本文使用的“倒装键合”意指微电子元件和衬底的相应触点之间,或微电子元件和另一个微电子元件之间面对面的电键合的布置。
可选地,可使用诸如图1的示例所示的微电子元件的触点至衬底的面朝上的线键合代替。在图11所示的这个方法步骤的实施例中,介质填充层66设置在微电子元件22和衬底12之间。
图12示出微电子组件10″,其具有应用于暴露在衬底12的第一表面14上的导电元件28的焊盘30上的线键合32。如所讨论的,线键合32可通过加热线段的端部以软化端部,以使当被压至导电元件28时,形成至导电元件28的沉积键合,形成基34而得以应用。然后将线从导电元件28中拉出,如果需要,则在切断或以其他方式切断以形成线键合32的端部36和端面38之前以特定形状操作。可选地,线键合32可由例如铝线通过楔形键合形成。楔形键合通过加热邻近线键合端部的线部分且将该部分沿着导电元件28通过施加在其上的压力拉出而形成。这种工艺在美国专利No.7,391,121中进一步描述,其公开内容全部通过引用并入本文。
在图13中,封装层42通过用于衬底的第一表面14上,从第一表面14且沿着线键合32的边缘表面37向上延伸而被附加在微电子组件10″′上。封装层42还覆盖填充层66。如图12所示,通过在微电子组件10”上沉积树脂而形成封装层42。通过将组件10”放在适当配置的模具内进行上述操作,该模具具有在可容纳组件10’的封装层42中的所需形状的腔。这种模具和这种形成封装层的方法可在美国专利申请公开No.2010/0232129示出和描述,其公开内容通过引用全部并入本文。可选地,使用至少部分柔性的材料将封装层42预先制造成所需形状。在这种配置中,介质材料的柔性性质允许封装层42被压入线键合32和微电子元件22之上的位置。在这个步骤中,线键合32穿过柔性材料在其里面形成各个孔,封装层42通过各个孔接触边缘表面37。此外,微电子元件22可使柔性材料变形,以使微电子元件22可容纳进去。柔性介质材料可压缩以将端面38暴露在外表面44上。可选地,任何额外的柔性介质材料可从封装层移除以形成表面44,在表面44上,线键合32的端面38未被覆盖,或形成腔64以在表面63内的位置处不覆盖端面38。
在图13所示的实施例中,封装层形成为其表面44最初在线键合32的端面38之上间隔开。为了暴露端面38,在端面38之上的封装层42的部分可被移除,暴露大体与端面42齐平的新表面44’(如图14所示)。可选地,形成腔64(诸如图8A和8B所示的腔),其中端面38未被封装层42覆盖。进一步可选地,封装层42可以形成为表面44大体与端面48齐平,或表面44布置在端面48之下(如图8D所示)。如果必要,可通过碾磨、干法刻蚀、激光刻蚀、湿法刻蚀、研磨等移除封装层42的部分。如果需要,线键合32的端部36的部分也可以在相同步骤或其他的步骤中移除以获得大体与表面44齐平的且大体为平坦的端面38。如果需要,在这个步骤后形成腔64,或也可应用如图10所示的凸点。所得的微电子组件10可附接在PCB上或以其他方式并入另外的组件(例如图6所示的堆叠封装)中。
在图15所示的一个可选实施例中,线键合32最初成对地形成为线环86的部分32’。在这个实施例中,环86以上述的线键合的形式制成。线段向上拉伸,然后在具有其至少一个部件的方向上在衬底13的第一表面14的方向上弯折且拉伸至大体覆盖相邻的导电元件28的一位置。然后在切割或以其他方式切断该线之前将其大体向下拉伸至相邻的导电元件28的附近的一位置处。然后加热该线且通过沉积键合等将该线连接至相邻的导电元件28以形成环86。然后形成封装层42以大体覆盖环86。然后通过碾磨、刻蚀等,通过也可通过移除环86的一部分以使环被切断且分成其两部分32’的工艺来移除封装层42的一部分,由此形成具有在沿着形成在封装层42上的表面44的一位置处未被封装层42覆盖的端面38的线键合32。后续的修整步骤可应用于组件10,如上文所述。
图16A-16C示出用于制作环绕线键合32的端部36的腔64的可选实施例中的步骤(如上文所述)。图16A示出关于图1-6所述的一般类型的线键合32。线键合32具有应用于其端部36上的牺牲材料块78。牺牲材料块78的形状大体为球形(此可由其形成过程中的材料表面张力所致),或为本领域技术人员可理解的其他所需的形状。可通过将线键合32的端部36浸在焊锡膏中以涂布其端部而形成牺牲材料块78。在浸渍之前可调节焊锡膏的粘度,以控制由于吸附及表面张力而附接至端部36的焊锡块的量。相应地,这可影响应用于端部36上的块78的大小。可选地,可通过将可溶材料沉积在线键合32的端部36上而形成块78。其他可能的块78可为各个焊锡球,或在端部上的其他块,或通过其他手段使用在微电子部件制造过程中所用的稍后可移除的其他材料,如铜或金闪镀。
在图16B中,所示介质层42已添加至组件10,包括沿着线键合32的边缘表面37向上。该介质层也沿着牺牲材料块78的表面的一部分延伸,以使其由此与线键合32的端部36间隔开。随后,移除牺牲材料块78,例如通过在溶剂中洗涤或漂洗,熔融,化学刻蚀或其他技术,从而在移除块78之前在介质层42内留下大体为块78的负形的腔64,且暴露线键合32的端部36附近的边缘表面37的一部分。
可选地,牺牲材料块78可形成为通过沿着线键合32的边缘表面37延伸而大体涂布于所有线键合32。这种布置在图17A中示出。该涂层可在形成组件10之后应用于线键合32上(如上所述),或可作为涂层应用于制作线键合32的线。基本上,这将为经涂布的线或两部分的线的形式,例如具有铜内核及焊锡涂层。图17B示出应用于线键合32和牺牲块78上的介质层42,以沿着牺牲块78的边缘表面79延伸,从而大体沿着线键合的长度将介质层42与线键合32间隔开。
图17C示出由移除牺牲材料块78的一部分从而形成绕着端部36且暴露边缘表面37的一部分的腔64所致的结构。在这个实施例中,大多数或至少一部分牺牲材料块78可留在介质层42和线键合32之间的位置处。图17C进一步示出电连接且机械连接线键合32至另一个微电子结构10A的触点焊盘40A的焊锡块52。
在形成线段和将其键合至导电元件以形成线键合(尤其是上述的球形键合)之后,线键合(例如图1中的32)在毛细管(如图32A中的804)内与线的剩余部分分离。这可以在远离线键合32的基34的任何位置进行,且优选在远离基34至少足够限定线键合32的所需高度的一段距离处进行。可通过设置在毛细管804内或设置在毛细管804外的在面806和线键合32的基34之间的机构执行上述分离。在一种方法中,线段800可通过利用火花或火焰有效燃烧在所需分离点穿过线800来进行分离。为了对线键合高度获得更大的精确度,可用不同形式切割线段800。如在此所述,切割可用来描述部分切割,可在所需位置磨损线或完全切断线,以将线键合32与剩余线段800完全分离。
在图32所示的示例中,切割片805可被集成至键合头组件,例如毛细管804内。如图所示,开口807可包括在毛细管804的侧壁820内,切割片805可延伸穿过开口807。切割片805可在毛细管804的内部移进移出,以使交替地允许线800自由穿出或接合线800。相应地,线800可被拉出,且线键合32形成且键合至导电元件28,切割片805在毛细管内部外的位置处。形成键合之后,使用集成至键合头组件的夹具803夹持线段800,以保证线的位置。然后切割片803可移动进入线段以完全切割线或部分切割或磨损线。完全的切割可形成线键合32的端面38,此时毛细管804可远离线键合32移动以例如形成另一个线键合。类似地,如果线段800被切割片805磨损,在线仍被线夹具803保持的情况下的键合头单元的移动可以通过在由部分切割磨损的区域处断裂线段800而引起分离。
切割片805的移动可通过气动装置或伺服电动机使用偏心凸轮启动。在其他示例中,切割片805的移动可由弹簧或膜片启动。启动切割片805的触发信号可以基于从球形键合的形成开始计时的时间延迟,或通过将毛细管804移动至线键合基34之上的预定高度以启动触发信号。这种信号可与操控键合机器的其他软件关联,以使在任何随后的键合形成之前重新设定切割片805的位置。切割机构也可包括在与切割片805相对且间隔开的第二切割片(未示出),以从线的相对两侧切割线。
在另一个示例中,将激光器809与键合头单元组装且定位以切割线段。如图33所示,激光器头809可设置在毛细管804的外部,例如通过安装至毛细管804或安装在包括毛细管804的键合头单元上的另一个点。激光器可在所需时间启动(例如上述关于图32中的切割片805讨论的),以切割线800,在基34之上的预定高度形成线键合32的端面38。在其他实施中,激光器809可以布置为引导切割光束穿过或进入毛细管804本身,且进入键合头单元内部。在一个示例中,可以使用二氧化碳激光器,或可选地,可以使用Nd:YAG或铜蒸汽激光器。
在另一实施例中,使用图34A-C所示的模板824以将线键合32与剩余线段800分离。如图34A所示,模板824可为具有本体的结构,该本体在或接近线键合32的所需高度限定上表面826。模板824可以配置为接触导电元件28或在导电元件28之间的衬底12的任一部分。模板824包括相应于线键合32的所需位置(如在导电元件28之上)的多个孔828。孔828的尺寸可形成为在其中容纳键合头单元的毛细管804,以使毛细管延伸进入孔到相对于导电元件28的位置处,以将线800键合至导电元件28以形成基34(如通过球形键合等)。当线段被拉至所需长度时,毛细管804可垂直地移出孔828。一旦从孔828清除出去,线段可以被夹持(如通过夹具803)在键合头单元内,且毛细管804在横向(如平行于模板824的表面826的方向)上移动,以使线段800移动接触由孔828的表面和模板824的外表面826的交线限定的模板824的边缘829。这种移动可以导致线键合32与仍保持在毛细管804内的线段800的剩余部分分离。重复上述过程以在所需位置形成所需个数的线键合32。在实施中,在线分离之前,垂直移动毛细管,以使剩余的线段突出超过毛细管804的面806一段足以形成下一个球形键合的距离802。图34B示出模板824的变型,其中孔828可逐渐变小以使孔的直径从在表面826的第一直径增大到远离表面826的更大直径。在图34C所示的另一变型中,可形成具有一定厚度的外框架821的模板,该厚度足以使表面826以所需距离与衬底12间隔开。框架821可至少部分地环绕腔823,框架821配置为邻近衬底12布置,模板824的厚度在表面826和敞开区域823之间延伸,以使模板824的包括孔828的部分与衬底12在布置在衬底12上时间隔开。
图20和图21示出微电子组件510的进一步的实施例,其中线键合532形成在引线框架结构上。引线框架结构的示例示出和描述在美国专利No.7,176,506和No.6,765,287中,其公开内容通过引用并入本文。一般而言,引线框架是由导电金属片(如铜)形成的结构,导电金属片被图案化为包括多个引线的段且可进一步包括底盘(paddle)和框架。如果在组件制造过程中使用这种框架,其可用于紧固引线和底盘。在一个实施例中,微电子元件(如晶片或芯片)可面朝上联接至底盘且使用线键合电连接至引线。可选地,微电子元件可直接安装至在微电子元件下延伸的引线上。在这个实施例中,微电子元件上的触点可通过焊锡球等电连接至各个引线。然后引线可用于形成与各种其他导电结构的电连接,这些导电结构用于承载电子信号电位至微电子元件或承载来自微电子元件的电子信号电位。当结构的组装(包括在其上形成封装层)完成时,框架的临时元件可从引线框架的引线和底盘处移除,以形成单独的引线。为了达到本发明的目的,单独的引线513和底盘515被看作是分开的部分,共同形成在与其一体形成的部分内包括导电元件528的衬底512。此外,在这个实施例中,底盘515被看作在衬底512的第一区域518内,引线513被看作在第二区域520内。在图21的正视图中,线键合524将承载在底盘515之上的微电子元件22连接至引线515的导电元件528。线键合532可在线键合的基534处进一步联接至引线515上另外的导电元件528。封装层542形成至组件510上,使线键合532的端部538在表面544内的位置处不被覆盖。在关于在此所述的其他实施例的相应的结构中,线键合532可具有未被封装层542覆盖的另外的或可选的部分。
图24-26示出具有闭合环线键合832的微电子封装810的进一步可选实施例。该实施例的线键合832包括可联接至相邻导电元件828a和828b的两个基834a和834b(如图24所示)。可选地,基834a和834b两者皆可联接至共用导电元件828(如图25和图26所示)。在此实施例中,线键合832限定在两个基834a、834b之间以环延伸的边缘表面837,以使边缘表面837在各个部分837a和837b中从基向上延伸至衬底812上的封装层842的表面844处的顶点839。封装层842沿着至少一些边缘表面部分837a、837b延伸,以使各个部分相互分离,且与封装810中的其他线键合832分离。在顶点839处,边缘表面837的至少一部分未被封装层842覆盖,以使线键合832可用于与另一部件电互连,另一部件可为另一微电子部件或其他部件,诸如分立元件,如电容器或电感器。如图24-26所示,线键合832形成为顶点839跨越衬底812的表面沿着至少一个横向从导电元件828偏置。在一个示例中,顶点839可覆盖微电子元件820的主表面,或以其他方式覆盖与微电子元件820对齐的衬底812的第一区域。线键合832的其他配置也是可行的,包括其中顶点839布置在其他实施例中所述的线键合的端面的任何一个位置处的配置。进一步地,顶点839可在孔中不被覆盖(如图8A所示)。更进一步地,顶点839可被拉伸且可在表面844上不被覆盖且在表面844的长度上延伸,如关于图10A-10D中的边缘表面所示。通过以包围顶点839的未覆盖的边缘表面837的形式提供连接特征(其由在两个基834a、834b(而非一个)之间延伸的线键合832支撑),可实现在由主表面844限定的方向上的连接特征的更为精确的布置。
图27和图28示出图24-26中的实施例的变型,其中使用键合带934代替线键合834。键合带可为导电材料的大体扁平的片,例如先前所述的线键合的形成材料中的任何一种。与线键合(其横截面大体为圆形)相比,键合带结构的宽度可大于其厚度。如图27所示,每个键合带934包括键合且沿着导电元件928的一部分延伸的第一基934a。键合带932的第二基934b可联接至第一基934a的一部分。边缘表面937在基934a和934b之间以两个对应部分937a及937b延伸至顶点939。顶点939所在区域中的边缘表面的一部分未被封装剂942覆盖且沿着主表面944的一部分设置。进一步的变型也是可行的,例如关于本文公开的其他实施例中所用的线键合所描述的其他变型。
以上讨论的结构可用于构造不同的电子系统。例如,根据本发明的进一步实施例的系统711包括微电子组件710(如上所述)以及其他电子部件713和715。在所描述的示例中,部件713是半导体芯片而部件715是显示屏,但也可使用任何其他部件。当然,尽管图23只描述了两种额外的部件(为了清楚说明),但系统可包括任何数目的此类组件。如上所述的微电子组件710可为(举例而言)以上结合图1所述的微电子组件,或参见图6所述的包含多个微电子组件的结构。组件710可进一步包括图2-22所述的实施例中的任何一个。在进一步变型中,可提供多个变型,且可使用任何数目的此类结构。
微电子组件710和部件713及715安装在共用壳体719(以虚线示意性示出)内,且视需要彼此电互连以形成所需的电路。在所述示例性系统中,系统包括电路板717,例如柔性印刷电路板,且该电路板包括使部件互连的很多导体721(图23仅示出其中一个)。但是,这仅仅是示例性的,可使用适用于进行电连接的任何适当的结构。
壳体719被描述为可用于例如移动电话或个人数字助理类型的便携式壳体,且屏幕715暴露在该壳体的表面处。在微电子组件710包括光敏元件(如成像芯片)的情况下,也可提供透镜723或其他光学装置来用于引导光线至该结构。同样,图23所示的简化系统仅仅是示例性的,可使用以上所述的结构制作其他系统,包括通常被视为固定结构的系统,如台式电脑、路由器等。
本发明的上述实施例和变型可与除了以上具体描述的方式之外的其他方式结合。本文旨在涵盖本发明范围和精神之内的所有这样的变型。
尽管本文已参考特定实施例来阐述本发明,但应理解这些实施例仅说明本发明的原理及应用。因此应理解为:在不背离所附权利要求所限定的本发明的精神及范围的情况下,可对说明性实施例进行诸多修改且可设计其他布置。

Claims (41)

1.一种微电子封装的制作方法,包括:
a)从键合工具的毛细管进给具有预定长度的金属线段;
b)使用所述键合工具将所述金属线的一部分键合至暴露在衬底的第一表面上的导电元件,从而在所述导电元件上形成线键合的基;
c)将所述线的一部分夹持在所述键合工具内;
d)在被夹持部分和所述基部分之间的一位置处切割所述金属线以至少部分地限定所述线键合的端面,所述线键合的边缘表面限定在所述基和所述端面之间;
e)重复步骤(a)-(d)以形成至所述衬底的多个所述导电元件的多个线键合;以及
e)然后形成覆盖所述衬底的所述表面的介质封装层,其中,所述封装层形成为至少部分地覆盖所述衬底的所述表面和所述线键合的部分,以使所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的端面或边缘表面中的至少一个的部分限定。
2.根据权利要求1所述的方法,其中,所述金属线仅被部分穿过而切割,其中,从所述衬底的所述表面移开所述键合工具,而所述线的所述部分仍然被夹持,以使所述线在切割位置处断裂,所述端面通过所述切割和所述断裂形成。
3.根据权利要求1所述的方法,其中,在大体垂直于所述线键合的所述边缘表面的方向上完全穿过所述线段进行切割,所述线键合的所述端面通过所述切割形成。
4.根据权利要求1所述的方法,其中,至少一个微电子元件覆盖所述衬底的所述第一表面,其中,所述衬底具有第一区域和第二区域,所述微电子元件位于所述第一区域内,所述导电元件位于所述第二区域内且电连接至所述至少一个微电子元件,其中,所述介质封装层形成为至少在所述衬底的所述第二区域内覆盖所述衬底的所述第一表面。
5.根据权利要求4所述的方法,其中所述封装配置为第一个所述线键合适用于承载第一信号电位且第二个所述线键合适用于同时承载不同于所述第一信号电位的第二信号电位。
6.根据权利要求1所述的方法,其中,使用安装在所述键合工具上的激光器切割所述金属线段。
7.根据权利要求6所述的方法,其中,所述毛细管限定其用于进给所述线段的面,其中所述激光器安装在所述键合工具之上以将切割光束引导至布置在所述键合工具的所述面和所述线键合的所述基之间的所述线段的一位置处。
8.根据权利要求6所述的方法,其中,所述键合工具包括限定其用于进给所述线段的面的毛细管,所述毛细管包括在其侧壁中形成的壁,其中,所述激光器安装在所述键合工具上以引导切割光束穿过所述开口至布置在所述毛细管内的所述线段的一位置处。
9.根据权利要求6所述的方法,其中,所述激光器是CO2、Nd:YAG或铜蒸汽激光器中的一种。
10.根据权利要求1所述的方法,其中,使用在所述毛细管内延伸的切割刃来切割所述金属线。
11.根据权利要求10所述的方法,其中,所述切割刃在朝向与所述线段相对的所述毛细管的壁的方向上延伸。
12.根据权利要求10所述的方法,其中,通过作为第一切割刃的所述切割刃和在所述毛细管内延伸以与所述第一切割刃相对的第二切割刃的结合使用来切割所述金属线。
13.根据权利要求1所述的方法,其中,所述毛细管限定其用于进给所述线段的面,其中,使用具有相对的第一切割刃和第二切割刃的切割装置来切割所述金属线,其中,所述切割装置安装在所述键合工具上以在所述键合工具的所述面和所述线键合的所述基之间的一位置处切割所述线段。
14.根据权利要求1所述的方法,进一步包括将模板布置在所述衬底上,所述模板具有覆盖且暴露所述导电元件的至少部分的多个开口,所述开口限定布置在所述衬底上的第一高度处的各个边缘,其中,通过所述线抵着所述模板开口的所述边缘的横向移动来切割所述线段。
15.一种微电子封装的制作方法,包括:
a)将模板布置在加工用单元上,该加工用单元包括具有第一表面和远离所述第一表面的第二表面的衬底,微电子元件安装至所述衬底的所述第一表面,多个导电元件暴露在所述第一表面上,至少一些所述导电元件电连接至所述微电子元件,所述模板具有覆盖且暴露所述导电元件的至少部分的多个开口,所述开口限定布置在所述衬底上的第一高度处的各个边缘;
b)通过一工艺形成线键合,所述工艺包括从键合工具的毛细管进给具有预定长度的金属线段,将所述线段的部分联接至一个所述导电元件以形成所述线键合的基,以及通过所述线抵着所述模板开口的所述边缘的横向移动来剪切所述线段,以分离所述线键合和所述线段的剩余部分且在所述线键合上限定端面,所述线键合限定在所述基和所述端面之间延伸的边缘表面;以及
c)重复步骤(b)以在多个所述导电元件上形成多个线键合。
16.根据权利要求15所述的方法,进一步包括在所述加工用单元上形成介质封装层,其中,所述封装层形成为至少部分地覆盖所述第一表面和所述线键合的部分,以使所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的所述端面或所述边缘表面中的至少一个的部分限定。
17.根据权利要求15所述的方法,其中,延伸超过所述毛细管的面的所述线段的所述剩余部分具有足以形成至少下一个线键合的基的长度。
18.根据权利要求15所述的方法,其中,所述模板限定在一个所述孔的轴线方向上的厚度,其中,至少一些所述孔具有贯穿所述模板的所述厚度的一致的直径。
19.根据权利要求15所述的方法,其中,所述模板限定在一个所述孔的轴线方向上的厚度,其中,至少一些所述孔从邻近所述边缘的较小直径逐渐变成所述边缘与所述衬底之间的一位置处的较大直径。
20.根据权利要求15所述的方法,其中,所述模板包括具有在所述衬底的厚度的方向上的第一厚度且沿着所述衬底的一个或多个边缘延伸的边缘件,所述第一厚度限定所述第一高度,且中心部分包括所述孔且由所述边缘件界定,所述中心部分具有背离所述衬底的外表面,所述外表面设置在所述第一高度处,所述中心部分进一步具有小于所述第一厚度的厚度。
21.一种微电子封装的制作方法,包括:
a)从键合工具的毛细管进给具有预定长度的金属线段;
b)使用所述键合工具将所述金属线的一部分键合至暴露在衬底的第一表面上的导电元件,从而在所述导电元件上形成线键合的基;
c)将所述线的一部分夹持在所述键合工具内;以及
d)在所述毛细管内在被夹持部分和所述基之间的一位置处切割所述金属线以至少部分地限定距所述线键合的所述基预定距离的所述线键合的端面。
22.根据权利要求21所述的方法,进一步包括:
e)重复步骤(a)-(d)以形成至所述衬底的多个所述导电元件的多个线键合;以及
f)然后形成覆盖所述衬底的所述第一表面的介质封装层,其中,所述封装层形成为至少部分地覆盖所述衬底的所述第一表面和所述线键合的部分,以使所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的所述端面或在所述基和所述端面之间延伸的边缘表面中的至少一个的部分限定。
23.根据权利要求21所述的方法,其中,所述金属线仅被部分穿过而切割,其中,从所述衬底的所述第一表面移开所述键合工具,而所述线的所述部分仍然被夹持,以使所述线在切割位置处断裂,所述端面通过所述切割和所述断裂形成。
24.根据权利要求21所述的方法,其中,在大体垂直于在所述基和所述端面之间延伸的所述线键合的边缘表面的方向上完全穿过所述线段进行切割,所述线键合的所述端面通过所述切割形成。
25.根据权利要求22所述的方法,其中,至少一个微电子元件覆盖所述衬底的所述第一表面,其中,所述衬底具有第一区域和第二区域,所述微电子元件位于所述第一区域内,所述导电元件位于所述第二区域内且电连接至所述至少一个微电子元件,其中,所述介质封装层形成为至少在所述衬底的所述第二区域内覆盖所述衬底的所述第一表面。
26.根据权利要求25所述的方法,其中所述封装配置为第一个所述线键合适用于承载第一信号电位且第二个所述线键合适用于同时承载不同于所述第一信号电位的第二信号电位。
27.根据权利要求21所述的方法,其中,使用安装在所述键合工具上的激光器切割所述金属线。
28.根据权利要求21所述的方法,其中,使用在所述毛细管内延伸的切割刃切割所述金属线。
29.根据权利要求28所述的方法,其中,所述切割刃在朝向所述毛细管的壁的方向上延伸。
30.根据权利要求21所述的方法,其中,所述毛细管限定其用于进给所述线的面,其中,使用具有相对的第一切割刃和第二切割刃的切割装置来切割所述金属线,其中,所述切割装置安装在所述键合工具上以在所述毛细管内切割所述线。
31.一种微电子封装的制作方法,包括:
a)提供与加工用单元的衬底相关联的结构的表面,所述衬底具有第一表面和远离所述第一表面的第二表面,多个导电元件暴露在所述第一表面上,所述结构具有覆盖且暴露所述导电元件的至少部分的多个开口;以及
b)通过一工艺形成线键合,所述工艺包括从键合工具的毛细管进给金属线,将所述线的部分联接至一个所述导电元件以形成所述线键合的基,相对于所述线键合的所述基来移动所述键合工具以为所述线键合提供预定长度的所述线,以及通过所述键合工具相对于所述结构的所述表面的移动来分离所述线键合与所述线的剩余部分,以限定远离所述线键合的所述基的所述线键合的自由端部。
32.根据权利要求31所述的方法,其中,所述结构为可移除的模板。
33.根据权利要求31所述的方法,其中,所述结构布置在所述衬底的所述第一表面上。
34.根据权利要求31所述的方法,其中,所述结构的所述表面包括在至少一个所述开口处的边缘,其中,通过所述线抵着所述边缘的移动来剪切所述线,直至所述线键合与所述线分离。
35.根据权利要求31所述的方法,其中,微电子元件安装至所述衬底的所述第一表面,以及至少一些所述导电元件电连接至所述微电子元件。
36.根据权利要求31所述的方法,进一步包括:
c)重复步骤(b)以在多个所述导电元件上形成多个线键合。
37.根据权利要求36所述的方法,进一步包括在所述加工用单元上形成介质封装层,其中,所述介质封装层形成为至少部分地覆盖所述线键合的所述第一表面和部分,以使所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的所述自由端部的端面或在所述基和所述端面之间延伸的边缘表面中的至少一个的部分限定。
38.根据权利要求31所述的方法,其中,延伸超过所述毛细管的面的所述线的所述剩余部分具有足以形成至少下一个线键合的基的长度。
39.根据权利要求31所述的方法,其中,所述结构限定在一个所述开口的轴线方向上的厚度,其中,至少一些所述开口具有贯穿所述结构的厚度的一致的直径。
40.根据权利要求31所述的方法,其中,所述结构限定在一个所述开口的轴线方向上的厚度,其中,至少一些所述开口从邻近布置在所述衬底上的第一高度处的所述结构的所述表面的边缘的较小直径逐渐变成所述边缘与所述衬底之间的一位置处的较大直径。
41.根据权利要求31所述的方法,其中,所述结构包括具有在所述衬底的厚度的方向上的第一厚度且沿着所述衬底的一个或多个边缘延伸的边缘件,所述第一厚度限定所述结构的所述表面的边缘在所述衬底上所布置的第一高度,且中心部分包括所述开口且由所述边缘件界定,所述中心部分具有背离所述衬底的外表面,所述外表面设置在所述第一高度处,所述中心部分进一步具有小于所述第一厚度的厚度。
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