CN104011858A - 具有线键合通孔的堆叠封装组件 - Google Patents

具有线键合通孔的堆叠封装组件 Download PDF

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Publication number
CN104011858A
CN104011858A CN201280062529.5A CN201280062529A CN104011858A CN 104011858 A CN104011858 A CN 104011858A CN 201280062529 A CN201280062529 A CN 201280062529A CN 104011858 A CN104011858 A CN 104011858A
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Prior art keywords
line bonding
encapsulated layer
substrate
microelectronics packaging
bonding
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CN201280062529.5A
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CN104011858B (zh
Inventor
埃利斯·周
雷纳多·科
罗莎娜·阿拉托雷
菲利普·丹贝格
王纬舜
杨世英
赵志军
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Adeia Semiconductor Solutions LLC
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Tessera LLC
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    • Y10T29/49151—Assembling terminal to base by deforming or shaping

Abstract

一种微电子封装(10)可以包括具有键合至衬底(12)上的各个导电元件(28)的基(34)和相对于基(34)的端部(36)的线键合(32)。介质封装层(42)从衬底(12)延伸且覆盖线键合(32)的部分，以使线键合(32)的被覆盖部分通过封装层(42)相互分离，其中线键合(32)的未封装部分(39)由线键合(32)的未被封装层(42)覆盖的部分限定。未封装部分(39)设置成具有最小间距的图案，该最小间距大于相邻的线键合(32)的基(34)之间的第一最小间距。

Description

具有线键合通孔的堆叠封装组件
相关申请的交叉引用
本申请是2012年2月24日提交的标题为“Package-On-Package Assembly with Wire BondVias”的美国专利申请No.13/404,408；13/404,458和13/405,108的继续申请，这些美国专利申请要求2011年10月17日提交的美国临时专利申请No.61/547,930的申请日的权益，其公开内容通过引用并入本文。
背景技术
微电子器件(如半导体芯片)典型地要求至其他电子部件的输入和输出连接。半导体芯片或其他类似的器件的输入和输出触点通常设置成基本覆盖器件的表面的栅格状图案(一般称为“面阵”)，或者设置成可以平行且邻近器件的前表面的每个边缘延伸的细长的行，或者设置在前表面的中心。典型地，器件(如芯片)必须物理地安装在衬底(如印刷电路板)上，且器件的触点必须电连接至电路板的导电特征。
半导体芯片通常设置在封装中以便于在制备期间以及将芯片安装到外部衬底(如电路板)期间处理芯片。例如，许多半导体芯片设置在适于表面安装的封装中。已经提出了大量这种普通类型的封装用于各种应用。一般而言，这种封装包括介质元件，一般称为“芯片载体”，其具有形成在介质上的作为电镀或刻蚀的金属结构的端子。这些端子典型地通过特征(如沿芯片载体自身延伸的细迹线)以及通过在芯片的触点和端子或迹线之间延伸的精细的引线或者线连接至芯片自身的触点。在表面安装操作中，将封装放置在电路板上以使封装上的每个端子与电路板上的相应的触点焊盘对齐。在端子和触点焊盘之间设置焊料或者其他键合材料。通过加热组件以熔融或“回流”焊料或者活化键合材料可以将封装永久地键合在适当的位置。
很多封装包括附接至封装的端子的焊料球(典型地直径约为0.1mm和0.8mm(5和30毫英寸))形式的焊料块。具有从其底面突出的焊料球阵列的封装一般称为球栅阵列或“BGA”封装。称为平面栅阵列或“LGA”封装的其他封装通过由焊料形成的薄层或焊区紧固至衬底。这种类型的封装可以相当紧凑。某些封装，一般称为“芯片级封装”，占用的电路板的面积等于或略大于置入封装内的器件的面积。这种封装的优势在于减小组件的整体尺寸且允许使用衬底上各种器件之间的短互连，这反过来限制器件之间的信号传播时间，从而促进组件的高速运行。
封装的半导体芯片通常设置在“堆叠”布置中，其中一个封装设置在，例如电路板上，而另一个封装安装在第一个封装的顶部。这些布置能允许许多不同芯片安装在电路板上的单个占位面积(footprint)内，并且通过在封装间设置短互连能进一步促进高速运行。通常，这个互连距离略大于芯片本身的厚度。为了在芯片封装堆叠内实现互连，有必要为每个封装两侧(除了最顶部的封装)的机械连接和电连接设置结构。这个步骤可以例如，通过在安装有芯片的衬底的两侧设置触点焊盘或焊区，焊盘通过导电通孔等连接穿过衬底而进行。使用焊料球等以联接下衬底顶部的触点和下一个上衬底底部的触点之间的空隙。焊料球必须高于芯片的高度以连接触点。美国专利申请公布No.2010/0232129(第129公开物)提供了堆叠芯片布置和互连结构的示例，其全部公开内容通过引用并入本文。
可使用细长的接线柱或引脚形式的微触点元件将微电子封装连接至电路板以及用于微电子封装的其他连接。在一些示例中，通过刻蚀包括一种或多种金属层的金属结构而形成微触点。刻蚀工艺限制了微触点的尺寸。典型地，传统的刻蚀工艺不能形成具有大高宽比(在此称为“纵横比”)的微触点。要形成具有可观的高度和很小的相邻微触点之间的间距或间隙的微触点阵列，是很困难甚至不可能的。此外，通过传统刻蚀工艺形成的微触点的配置是有局限性的。
尽管现有技术具有以上所述的优点，但在微电子封装的制作和测试上仍期待进一步的改进。
发明内容
一种微电子封装可以包括线键合，线键合具有键合至衬底上各个导电元件的基，以及相对于基的端部。从衬底延伸的介质封装层覆盖线键合的部分，以使线键合的被覆盖部分通过封装层相互分离，其中，线键合的未封装部分由线键合的未被封装层覆盖的部分限定。未封装部分可以设置成具有最小间距的图案，最小间距大于相邻线键合的基之间的第一最小间距。
在此公开的各种封装结构包含用作从导电元件(例如，衬底上的导电焊盘)向上延伸的垂直连接的线键合。这种线键合可用来制作与覆盖介质封装的表面的微电子封装电连接的堆叠封装。此外，在此公开用于制作微电子封装或微电子组件的方法的各种实施例。
根据本发明的一个方面，一种微电子封装可以包括衬底，衬底具有第一区域和第二区域，衬底具有第一表面和远离第一表面的第二表面。一个或多个微电子元件可以覆盖在第一区域内的第一表面上。导电元件可以暴露在衬底的第一表面和第二表面中的至少一个处，且导电元件可以暴露在第二区域内。一些或所有的导电元件可电连接至至少一个微电子元件。
线键合可以限定边缘表面，且具有键合至各个导电元件的基。线键合的基可以包括沿着导电元件延伸的边缘表面的第一部分以及相对于第一部分成25°-90°的角度的边缘表面的第二部分。线键合可以具有远离衬底和基的端部，例如，在相对于基的位置。
介质封装层可以从第一表面和第二表面中的至少一个延伸。封装层可覆盖线键合的部分，以使线键合的被覆盖部分通过封装层相互分离。封装层可覆盖衬底的第二区域，也可覆盖另一部分(例如，第一区域)。线键合的未封装部分可由线键合的未被封装层覆盖的部分限定。未封装部分可以包括端部。导电元件可以设置成多个导电元件中的各个相邻的导电元件之间具有第一最小间距的图案。未封装部分可以设置成多个线键合中的各个相邻的线键合的端部之间具有第二最小间距的图案。在一个示例中，第二间距可大于第一间距。
在一个示例中，边缘表面的各部分可以以80°-90°的角度设置。
在一个示例中，线键合的至少一些未封装部分中的每个包括球形部分。每个球形部分与该线键合的圆柱形部分可以成一体。在一个示例中，每个球形部分和每个圆柱形部分可至少具有基本上由铜、铜合金或金构成的芯。在一个示例中，与球形部分成一体的圆柱形部分突出超过封装层的表面。
在一个示例中，至少一些线键合具有主金属的芯和金属面层，金属面层包括不同于主金属且覆盖主金属的第二金属。在一个示例中，主金属可为铜，金属面层可包括一层银。
在一个示例中，导电元件可为第一导电元件。微电子封装可以进一步包括电连接至线键合的未封装部分的多个第二导电元件，且第二导电元件可不接触第一导电元件。在一个示例中，第二导电元件可以通过在形成封装层之后，接触线键合的未封装部分电镀形成。
在一个示例中，至少一个线键合的端部在平行于衬底的第一表面的方向上从基移动至少等于导电元件之间的最小间距和100微米之一的距离。一个或多个线键合可以包括线键合的基和线键合的未封装部分之间的至少一个弯曲。至少一个线键合的弯曲可位于远离线键合的基和线键合的未封装部分的位置。在一个示例中，弯曲的半径可大于至少一个线键合的圆柱形部分的直径的十二倍。在一个示例中，弯曲的半径可小于至少一个线键合的圆柱形部分的直径的十倍。在一个示例中，至少一个线键合的未封装部分可以在与衬底的第一表面的垂线成25度以内的方向上突出在封装层上。
在一个示例中，一些或所有导电元件可为非阻焊层限定的。
在一个示例中，球形键合可联接至及覆盖线键合的基的部分。
在一个示例中，至少一个微电子元件可以包括覆盖在第一区域内的第一表面上的第一微电子元件和第二微电子元件。导电元件的一些或全部可与第一微电子元件电连接，且导电元件的一些或全部可与第二微电子元件电连接。第一微电子元件和第二微电子元件在微电子封装内可以相互电连接。
根据本发明的方面，封装层可具有主表面和相对于主表面倾斜的对齐表面。线键合的至少一个未封装部分可布置在主表面上，对齐表面在邻近于未封装部分的位置处接近主表面。通过这种方式，对齐表面可用于将设置在对齐表面之上的导电突起引导朝向线键合的未封装部分。在一个示例中，突起可包括键合金属，例如在其他可能的配置中的附接至电路元件的焊料球。
在一个示例中，封装层可限定封装层的角区域，封装层进一步包括布置在角区域内的且比主表面更远离衬底的至少一个次表面。对齐表面可在次表面和主表面之间延伸。在一个示例中，主表面可为覆盖衬底的第一区域的第一主表面。封装层可进一步限定覆盖第二区域且比主表面更靠近衬底的第二主表面。对齐表面可在第一主表面和第二主表面之间延伸。
根据本发明的方面的微电子组件可以包括如上所述的具有对齐表面的第一微电子封装，和具有前表面和前表面上的端子的第二微电子封装。多个导电突起将线键合的至少一些未封装部分与各个端子连接。在这个组件中，至少一个导电突起可接触对齐表面的部分布置。在一个示例中，导电突起可包括焊料球。
在上述微电子封装的变型中，球形键合可设置在至少一些导电元件顶上，且限定线键合的基的线键合的边缘表面可以形成在导电元件顶上的球形键合上或联接至导电元件顶上的球形键合。
根据本发明的方面，可以提供微电子组件，其包括上述的第一微电子封装，第一微电子封装具有暴露在相对于第一表面的衬底的第二表面处的多个端子，并且第一微电子封装具有在衬底的第一表面和第二表面之间延伸的外边缘。第二微电子封装可以具有其上具有触点的衬底和与触点电连接的第二微电子元件。第二微电子封装可以具有暴露在衬底的表面且通过触点与第二微电子元件电连接的端子。第二微电子元件的端子可以面对线键合的各个未封装部分且与线键合的各个未封装部分电连接。
电路板可包括第一表面和暴露在电路板的表面处的板式触点。第一微电子封装可覆盖电路板且具有联接至电路板的板式触点的端子。整体填充层可覆盖第一微电子封装的至少一个外边缘且可设置在环绕第一微电子封装的端子和电路板的板式触点之间的联接的空间内。整体填充层可以设置在环绕第二微电子封装的端子和第一微电子封装的端子之间的联接的空间内。
在根据特定示例的微电子封装中，封装层可以限定在覆盖衬底的第一区域的面积内的第一表面之上的第一高度处的第一表面部分以及在覆盖衬底的第二区域的面积内的第一表面之上的第二高度处的第二表面部分。第二高度可以小于第一高度。在一个示例中，微电子元件可以具有在第一表面之上的第三高度处的前表面。第二高度可小于第三高度。
在根据特定示例的微电子封装中，取代键合至(例如联接至)衬底的导电元件的边缘表面，线键合可具有联接至各个第一导电元件的球形键合基。线键合的端面可以小于基的直径的三倍的距离远离衬底和基。每个线键合可以限定在线键合的基和端面之间延伸的边缘表面。在一个示例中，球形键合基可以包括联接至各个导电元件的第一球形键合以及联接至第一球形键合的第二球形键合，第二球形键合从第一球形键合的顶表面延伸。线键合可以在端面和第二球形键合之间延伸。
在根据特定示例的微电子封装中，两个或更多个线键合可以被联接(例如键合)至衬底的多个导电元件中的一个。在该示例中，这种线键合可以使用在此描述的工艺，通过键合至单个导电元件的球形键合的方式，或通过键合至单个导电元件的线键合的边缘表面的方式，或通过两种方式的结合而形成。
在根据特定示例的微电子封装中，封装层可以形成为包括主表面和相对于主表面成角度的对齐表面。线键合的至少一个未封装部分暴露在主表面处，且对齐表面可以从主表面处延伸，例如，在接近未封装部分的位置处与主表面相交，以使对齐表面用于将设置在对齐表面之上的导电突起引导朝向线键合的未封装部分。在一个示例中，封装层可以形成为限定封装层的角区域以及以进一步包括布置在角区域内的至少一个次表面。次表面可设置在比主表面更远离衬底的位置。对齐表面可以在次表面和主表面之间延伸。
在一个示例中，封装层的主表面可为覆盖衬底的第一区域的第一主表面。封装层可以形成为限定覆盖第二区域以及布置在比主表面更靠近衬底的位置的第二主表面。对齐表面可在次表面和主表面之间延伸。
根据本发明的方面的一种微电子组件的制作方法可以包括将第二微电子封装与在此描述的第一微电子封装对齐。第二微电子封装可以包括限定其上暴露有触点(例如，触点焊盘)的第一表面的衬底。在一些情况下，触点可包括与其联接的导电块。通过将至少一个导电块移动至与对齐表面和至少一个线键合的至少一个端面相接触，而使第二微电子封装与第一微电子封装对齐。对导电块进行加热或固化以制作电连接，例如，第二微电子封装的触点和线键合的未封装部分之间的联接。
根据本发明的方面，一种微电子组件的制作方法可以包括将第二微电子封装与具有在此所描述的结构的第一微电子封装对齐，其中封装层的表面横向延伸超过第二微电子封装的相对的表面的边缘。这种方法可以包括在点胶区域上沉积填充材料，例如，在将第二微电子封装布置在第一微电子封装的封装层的顶部之后或可能地之前。然后，填充材料可以流入至限定在封装层和第二微电子封装的衬底的第一表面之间的空间。点胶区域上沉积的填充材料的量可以流入至第一微电子封装和第二微电子封装相对的表面之间的空间内。
在一个示例中，第二微电子封装可包括四个边缘表面，且点胶区域可以由横向延伸超过所有四个边缘表面的封装层的一部分限定以环绕第二微电子封装。
在一个示例中，第二微电子封装可包括四个边缘表面，且点胶区域可以由横向延伸超过两个相邻的边缘表面的封装层的一部分限定。
在一个示例中，第二微电子封装可包括四个边缘表面，且点胶区域可以由横向延伸超过一个边缘表面的封装层的一部分限定。
根据本发明的方面，一种微电子组件的制作方法可以包括将具有多个导电块的第一微电子封装和第二微电子封装布置在各个封装的端子之间，例如，布置至由线键合的未封装部分限定的第一微电子封装的端子，或具有接触未封装部分的第二导电元件的第一微电子封装的端子。绕第一微电子封装和第二微电子封装的边缘表面组装柔性边框。实施联接步骤，例如，通过加热，回流或固化导电块以将各个第一触点焊盘与第二触点焊盘联接。
根据一个示例，在一种微电子组件的制作方法中，可以从键合工具的毛细管进给具有预定长度的金属线。在形成单元的第一表面和第二表面上可以移动毛细管的面以使金属线段成形，以使金属线段具有在沿着毛细管的外壁的方向上向上突出的第一部分。可以使用键合工具将金属线的第二部分键合至联接在暴露在衬底的第一表面的导电元件上的球形键合。金属线的第二部分可以布置为沿着导电元件延伸。在一个示例中，第一部分可以布置为相对于第二部分成25°-90°的角度。
根据一个示例，在一种微电子组件的制作方法中，环绕如上所述的第一微电子封装的暴露部分可以形成整体填充层。整体填充层可以形成为填充环绕第一微电子封装的端子和封装之下的电路板之间的联接的空间。形成整体封装层的步骤也可以填充环绕设置在第一微电子封装之上的第二微电子封装的端子之间的联接的空间，端子面对且联接至第一微电子封装的线键合的各个未封装部分。
一种微电子封装的制作方法可以包括在加工用单元上的介质封装层的表面上形成牺牲材料层。加工用单元可包括具有端面和远离端面且布置在封装层内的基，每个线键合限定在基和端面之间延伸的边缘表面。封装层可以覆盖线键合的部分，以使线键合的未封装部分由线键合的端面和未被封装层覆盖的边缘表面的部分限定。牺牲材料层可以覆盖线键合的未被封装层覆盖的部分。平面化牺牲材料层的部分以及线键合的部分以使线键合未被封装层覆盖的部分达到预定的基本一致的高度。这种方法可以包括从封装层去除牺牲材料层的剩余部分。
根据示例的一种微电子封装的制作方法可以使用加工用单元实施，加工用单元具有联接至其衬底的导电元件的线键合以及位于连接至衬底的微电子元件的表面的导电元件。例如，线键合可以连接至微电子元件的后面。形成至少覆盖线键合的部分的封装层之后，这种方法可以包括同时去除封装层的部分和线键合的部分以使线键合被分割为联接至衬底的导电元件的连接通孔；以及联接至微电子元件的表面的热通孔。连接通孔和热通孔都具有远离基(例如，去除步骤后，暴露在封装层的表面的基)的端面。去除步骤可进一步使得线键合的未封装部分由线键合的未被封装层覆盖的端面的至少部分限定。
根据本发明的方面的一种微电子封装的制作方法可以包括：在包括具有第一表面和远离第一表面的第二表面的衬底的加工用单元上形成多个线键合。微电子元件可以安装至衬底的第一表面上，多个导电元件暴露在第一表面处，至少一些导电元件电连接至微电子元件。线键合可具有联接至导电元件的基以及远离基的端面。每个线键合可以限定在基和端面之间延伸的边缘表面。在一个示例中，至少两个线键合可形成在一个导电元件上。在加工用单元上可形成介质封装层，其中封装层形成为至少部分地覆盖第一表面和线键合的部分。线键合的未封装部分由线键合的端面或未被封装层覆盖的边缘表面的至少一个的部分限定。
根据本发明的方面的一种微电子封装的制作方法可以包括在包括具有第一表面和远离第一表面的第二表面的衬底的加工用单元上形成牺牲结构。微电子元件安装至衬底的第一表面。多个导电元件暴露在第一表面处，且至少一些导电元件可电连接至微电子元件。牺牲结构中可具有暴露至少一个导电元件的开口。牺牲结构可限定邻近开口且远离衬底的第一表面的表面。这种方法可包括形成具有联接至导电元件的基以及远离基的端面的多个线键合，每个线键合限定在基和端面之间延伸的边缘表面，并且在开口的外侧以及邻近牺牲结构的表面的位置切割线键合。此后，牺牲结构可被去除，且这种方法可进一步包括在加工用单元上形成介质封装层。封装层可以形成为至少覆盖第一表面和线键合的部分。线键合的未封装部分可由线键合的端面或未被封装层覆盖的边缘表面的至少一个的部分限定。
根据本发明的方面的一种微电子封装的制作方法可以包括从键合工具的毛细管进给具有预定长度的金属线段。毛细管的面可以在形成单元的第一表面和第二表面上移动以使金属线段成形，以使金属线段具有在沿着毛细管的外壁的方向向上突出的第一部分。可使用键合工具将金属线的第二部分键合至暴露在衬底的第一表面处的导电元件。例如，金属线的第二部分可布置为沿着导电元件延伸，第一部分布置为相对于第二部分成25°-90°的角度。重复步骤(a)-(c)以将多个金属线键合至衬底的多个导电元件。介质封装层可以形成为覆盖衬底的表面。封装层形成为至少部分地覆盖衬底的表面和线键合的部分。线键合的未封装部分可由线键合的端面或未被封装层覆盖的边缘表面的至少一个的部分限定。
在一个示例中，第一个线键合可适用于携载第一信号电位且第二个线键合可适用于同时携载不同于第一信号电位的第二信号电位。
在一个示例中，这种方法可以包括将微电子元件安装且电互连至衬底，这种方法将微电子元件与至少一些线键合电互连。
在一个示例中，衬底可为电路板。在一个示例中，衬底可为引线框架，且这种方法可包括将微电子元件安装且电互连至引线框架，微电子元件可与至少一些线键合电互连。
在一个示例中，衬底可为第一微电子元件。这种方法可包括将第二微电子元件安装且电互连至第一微电子元件。这种方法可包括将第二微电子元件通过第一微电子元件与至少一些线键合电互连。
在一个示例中，金属线段可为第一金属线段。这种方法可包括，形成向上突出的部分之后，(i)进给与第一金属线段成一体的第二金属线段，以及(ii)在形成单元的第三表面上移动毛细管的面以使第二金属线段成形，以使第二金属线段具有在沿着毛细管的外壁的方向向上突出的第二部分。在一个示例中，第二部分可通过金属线的第三部分连接至向上突出的第一部分。
在这个示例中，可形成初始封装层，然后初始封装层的至少一部分可凹入以形成封装层以及限定线键合的未封装部分。在一个示例中，凹入步骤包括激光剥离使初始封装层。在一个示例中，凹入步骤包括湿法喷砂初始封装层。
在一个示例中，这种方法可以包括利用封装剂和模板之间的临时薄膜成型封装层。线键合可延伸至临时薄膜。可去除临时薄膜以暴露线键合的未封装部分。
在一个示例中，这种方法可包括将临时薄膜的连续薄层的部分施加在模板上。这种方法可在至少部分地由模板限定的腔内形成封装层。用临时薄膜的连续薄层的另一部分替换临时薄膜的当前部分。
在一个示例中，形成封装层之后，这种方法可包括形成接触线键合的未封装部分的第二导电元件。
在一个示例中，形成第二导电元件的步骤可包括在线键合的未封装部分上沉积导电材料。
在一个示例中，形成第二导电元件的步骤可包括在线键合的未封装部分上电镀金属层。
在一个示例中，形成第二导电元件的步骤可包括在线键合的未封装部分上沉积导电胶。
在一个示例中，沉积导电材料的步骤可包括通过点胶、模板印刷、丝网印刷或喷涂中的至少一种方式将导电材料涂在线键合的未封装部分上。
在一个示例中，毛细管的外壁可基本竖直。在形成单元的第二表面上移动毛细管的面以使金属线段的第一部分相对于第二部分成80°-90°的角度。
在一个示例中，在至少一个导电元件上可形成两个或更多个线键合。
在一个示例中，毛细管可限定金属线段所穿过的开口，以及从开口周围延伸至由外壁限定的边缘的前壁。前面可限定邻近边缘的凸起部分。在步骤(b)中，凸起部分可在接近第一部分的位置处被压在金属线中。
在一个示例中，封装层可以形成为包括主表面和相对于主表面成角度的对齐表面。线键合的至少一个未封装部分可布置在主表面上，且对齐表面与主表面在接近未封装部分的位置相交。在这种情况下，对齐表面可用于将设置在对齐表面之上的导电突起引导朝向线键合的未封装部分。
在一个示例中，封装层可以形成为限定封装层的角区域以及以进一步包括布置在角区域内的且比主表面更远离衬底的至少一个次表面，对齐表面在次表面和主表面之间延伸。
在一个示例中，封装层的主表面可为覆盖衬底的第一区域的第一主表面，封装层进一步形成为限定覆盖第二区域且比主表面更靠近衬底的第二主表面。对齐表面可在次表面和主表面之间延伸。
在一个示例中，将第二部分键合至导电元件之后，形成球形键合以使其在金属线的第二部分上延伸。
根据本发明的方面的一种方法可包括，将第二微电子封装与根据本发明的方面的第一微电子封装对齐。第二微电子封装可包括限定其上暴露有触点焊盘的第一表面的衬底以及与触点焊盘联接的导电块。通过将至少一个焊料球移动至与对齐表面和至少一个线键合的至少一个端面相接触来将第二微电子封装与第一微电子封装对齐。加热、回流或固化导电块以将导电块与线键合的各个未封装部分联接。
根据本发明的方面的一种方法可包括将第一微电子封装布置在第二微电子封装上，第一微电子封装包括其上暴露有端子的第一表面的衬底，端子包括从第一表面突出的联接元件。
第二微电子封装可包括具有第一区域和第二区域的衬底，衬底具有第一表面和远离第一表面的第二表面。至少一个微电子元件可覆盖在第一区域内的第一表面上。导电元件可暴露在衬底的第二区域内的第一表面和第二表面中的至少一个处，至少一些导电元件电连接至至少一个微电子元件。限定边缘表面的线键合可具有键合至各个导电元件的基。基可以包括沿着导电元件延伸的边缘表面的第一部分以及相对于第一部分成25°-90°的角度的边缘表面的第二部分。线键合可进一步具有远离衬底和基的端部。介质封装层可以从第一表面和第二表面中的至少一个延伸且覆盖线键合的部分，以使线键合的被覆盖部分通过封装层相互分离，封装层至少覆盖衬底的第二区域。线键合的未封装部分可由线键合的未被封装层覆盖的部分限定。未封装部分可包括端部。加热、固化或回流联接元件以例如将其与第二微电子封装的线键合的未封装部分联接。
在一个示例中，这种方法可进一步包括形成填充层的步骤，以填充由第一微电子封装和第二微电子封装相对的表面之间限定的空间，以及环绕第一微电子封装的端子和第二微电子封装的线键合的未封装部分之间的导电突起。
根据本发明的方面的一种微电子封装可包括具有第一区域和第二区域的衬底，衬底具有第一表面和远离第一表面的第二表面。微电子元件可覆盖在第一表面，例如在第一区域内。导电元件可暴露在衬底的第二区域内的第一表面和第二表面中的至少一个处。至少一些导电元件可电连接至至少一个微电子元件。线键合限定边缘表面且具有键合至各个导电元件的基。基可以包括沿着导电元件延伸的边缘表面的第一部分以及相对于第一部分成，例如，25°-90°的角度的边缘表面的第二部分。线键合可进一步具有远离衬底和基的端部。介质封装层可以从第一表面和第二表面中的至少一个延伸且覆盖线键合的部分。线键合的被覆盖部分通过封装层相互分离。封装层可覆盖衬底的第二区域，且也可覆盖衬底的第一区域或其他区域。线键合的未封装部分可由线键合的未被封装层覆盖的部分限定。未封装部分可包括线键合的端部，例如，远离导电元件的线键合的端部。
在一个示例中，边缘表面的第一部分和第二部分成45°-90°的角度。在一个示例中，第一个线键合可适用于例如携载第一信号电位，且第二个线键合可适用于例如同时携载不同于第一信号电位的第二信号电位。
每个线键合可具有在线键合的基和端面之间延伸的边缘表面。线键合的未封装部分由线键合的端部和邻近端部的边缘表面的未被封装层覆盖的部分限定。
至少一些线键合的端部可包括锥形尖端。在一个示例中，锥形尖端可具有在径向方向上从线键合的圆柱形部分的轴线偏移的形心。
在一个示例中，未封装部分上可具有键合工具标。
在一个示例中，线键合的至少一些未封装部分中的每个包括球形部分。每个球形部分可与线键合的圆柱形部分成一体。每个球形部分和每个圆柱形部分至少具有基本上由铜、铜合金或金构成的芯。
在一个示例中，球形部分的直径可大于与球形部分成一体的圆柱形部分的直径。在这个示例或其他示例中，封装层可完全覆盖与球形部分成一体的圆柱形部分。在一个示例中，封装层可部分覆盖球形部分。
在一个示例中，氧化保护层可以接触线键合的至少一些未封装部分。
在一个示例中，至少一些线键合具有主金属的芯和金属面层，金属面层包括不同于主金属且覆盖主金属的第二金属。在一个示例中，金属面层可包括钯。
在一个示例中，至少一些线键合由主金属、覆盖主金属的镍层以及覆盖镍层的金层或银层形成。在一个示例中，主金属可为金或铜中的一种。
在一个示例中，导电元件可为第一导电元件，且微电子封装进一步包括多个电连接至线键合的未封装部分的第二导电元件。第二导电元件可以布置为使得第二导电元件不接触第一导电元件。
在一个示例中，第二导电元件可包括基本上由单种金属组成的整体金属层。在一个示例中，单种金属可为镍、金、铜、钯或银中的一种。
在一个示例中，第二导电元件可包括接触线键合的未封装部分的导电胶。
在一个示例中，至少一个线键合的端部在平行于衬底的第一表面的方向上从基移动至少等于多个导电元件中的相邻的导电元件之间的最小间距和100微米之一的距离。
在一个示例中，至少一个线键合包括线键合的基和线键合的未封装部分之间的至少一个弯曲。
在一个示例中，至少一个线键合的弯曲可远离线键合的基和线键合的未封装部分。
在一个示例中，至少一个线键合的未封装部分可覆盖微电子元件的主表面。
在一个示例中，线键合的基可位于具有多个线键合的各个相邻的基之间的第一最小间距的第一图案内，且线键合的未封装部分可位于具有多个线键合的各个相邻的线键合的未封装部分之间的第二最小间距的第二图案内，第二最小间距大于第一间距。
在一个示例中，至少一个微电子元件可包括覆盖在第一区域内的第一表面上的第一微电子元件和第二微电子元件，且其中至少一些导电元件与第一微电子元件连接。在一个示例中，至少一些导电元件可与第二导电元件连接。在一个特定示例中，第一微电子元件和第二微电子元件在微电子封装内相互电连接。
在一个示例中，至少一个第一导电元件可具有联接至其上的至少两个线键合。
根据本发明的方面的微电子组件可包括第一微电子封装。第一微电子封装可包括具有第一区域和第二区域的衬底，衬底具有第一表面和远离第一表面的第二表面。至少一个微电子元件可覆盖在第一区域内的第一表面上。导电元件可暴露在衬底的第二区域内的第一表面和第二表面中的至少一个处。至少一些导电元件可电连接至至少一个微电子元件。限定边缘表面的线键合可具有键合至各个导电元件的基。基可包括沿着导电元件延伸的边缘表面的第一部分以及相对于第一部分成一角度(如25°-90°)的边缘表面的第二部分。线键合具有远离衬底和基的端部。介质封装层可从第一表面和第二表面中的至少一个延伸且覆盖线键合的部分，以使线键合的被覆盖部分通过封装层相互分离。封装层可至少覆盖衬底的第二区域。线键合的未封装部分由线键合的未被封装层覆盖的部分限定。未封装部分可包括端部。
本发明的这个方面可包括第二微电子封装，第二微电子封装包括第二导电元件，以及电连接至第二微电子元件且暴露在第二微电子封装的表面处的端子。多个导电突起可将线键合的至少一些未封装部分与第二微电子封装的各个端子电连接。
在一个示例中，第一微电子封装的封装层可具有主表面和相对于主表面向上倾斜的对齐表面。线键合的至少一个未封装部分可布置在主表面上，且对齐表面可延伸至接近主表面且接近线键合的至少一个未封装部分的位置处。在这种情况下，连接至线键合的至少一个未封装部分的导电突起可接触对齐表面。
在一个示例中，填充层可布置在由第一微电子封装和第二微电子封装的相对的表面之间限定的空间内，和多个导电突起中的各个相邻的导电突起之间限定的空间内。
附图说明
图1是根据本发明实施例的微电子封装的剖视图；
图2是图1所示的微电子封装的俯视图；
图3是根据图1所示的实施例的变型的微电子封装的剖视图；
图4是根据图1所示的实施例的变型的微电子封装的剖视图；
图5A是根据图1所示的实施例的变型的微电子封装的剖视图；
图5B是根据本发明实施例的形成在线键合的未封装部分上的导电元件的局部剖视图；
图5C是根据图5B所示的变型的形成在线键合的未封装部分上的导电元件的局部剖视图；
图5D是根据图5B所示的变型的形成在线键合的未封装部分上的导电元件的局部剖视图；
图6是包括根据一个或多个上述实施例所示的微电子封装、另外的微电子封装和电连接至微电子封装的电路板的微电子组件的剖视图；
图7是根据本发明实施例的微电子封装的俯视正视图；
图8是根据本发明实施例的微电子封装进一步的局部俯视正视图；
图9是根据本发明实施例的包括引线框架型衬底的微电子封装的正视图；
图10是图9所示的微电子封装相应的剖视图；
图11是根据图6所示的实施例的变型的包括相互电连接的且经填充层强化的多个微电子封装的微电子组件的剖视图；
图12是具有第一部件的线键合和附接至第一部件的第二部件的焊料块之间的键合的组件的摄影图像；
图13A是根据本发明实施例的微电子封装中的线键合通孔的局部剖视图；
图13B是根据本发明实施例的微电子封装中的线键合通孔的局部剖视图；
图13C是根据图13B所示的实施例的微电子封装中的线键合通孔的放大的局部剖视图；
图13D是根据本发明实施例的微电子封装中的线键合通孔的局部剖视图；
图13E是根据图13D所示的实施例的微电子封装中的线键合通孔的放大的局部剖视图；
图13F是根据本发明实施例的微电子封装中的线键合通孔的局部剖视图；
图14示出根据本发明实施例的将线段键合至导电元件之前形成金属线段的方法的各个阶段；
图15进一步示出图14所描述的方法和用于此方法的形成单元；
图16是根据本发明实施例的形成的线键合的俯视正视图；
图17示出根据本发明实施例的将线段键合至导电元件之前形成金属线段的方法的各个阶段；
图18和图19是根据本发明实施例的形成微电子封装的封装层的方法中一个阶段及下一阶段的剖视图；
图20是图19相应的阶段的进一步放大的剖视图；
图21是根据本发明实施例的制造微电子封装的封装层的一个阶段的剖视图；
图22是图21所示的制造微电子封装的封装层的阶段的下一个阶段的剖视图；
图23A和图23B是根据另一个实施例的线键合的局部剖视图；
图24A和图24B是根据进一步实施例的微电子封装的剖视图；
图25A和图25B是根据进一步实施例的微电子封装的剖视图；
图26示出根据另一个实施例的微电子封装的剖视图；
图27A-C是根据进一步实施例的微电子封装实施例的示例的剖视图；
图28A-D示出根据本发明实施例的微电子组件的形成步骤中微电子封装的各个实施例；
图29示出在根据本发明实施例的微电子组件的形成步骤中微电子封装的另一个实施例；
图30A-C示出在根据本发明另一个实施例的微电子组件的形成步骤中微电子封装的实施例；
图31A-C示出在根据本发明的另一个实施例的微电子组件的形成步骤中微电子封装的实施例；
图32A和32B示出根据本发明的另一个实施例的在形成各种线键合通孔的方法的各个步骤中使用的装置的部分；
图33示出根据本发明的另一个实施例的在形成各种线键合通孔的方法中使用的装置的部分；
图34A-C示出根据本发明实施例的在制作线键合的方法中使用的仪器的各种形式；
图35示出根据本发明的另一个实施例的在形成各种线键合通孔的方法中使用的装置的部分；
图36示出根据本发明的另一个实施例的在形成各种线键合通孔的方法中使用的装置的部分；
图37A-D示出根据本发明实施例的制造微电子封装的步骤的剖视图；
图38A和图38B是根据本发明的另一个实施例的制造微电子封装的步骤的剖视图；
图39A-C是根据本发明的另一个实施例的制造微电子封装的步骤的剖视图；
图40示出根据本发明实施例的微电子封装；
图41-44示出根据本发明实施例的制造微电子封装的各个步骤中的微电子封装。
具体实施方式
现在来看附图，其中使用相同的标号用以指示类似的特征。图1所示为根据本发明实施例的微电子组件10。图1所示的实施例是以封装的微电子元件形式的微电子组件(例如，用于电脑或其他电子设备的半导体芯片组件)。
图1所示的微电子组件10包括具有第一表面14和第二表面16的衬底12。衬底12典型地为基本上平坦的介质元件的形式。介质元件可为片状且可以很薄。在特定实施例中，介质元件可包括但不限于一层或多层有机介质材料或复合介质材料，例如，聚酰亚胺，聚四氟乙烯(PTFE)，环氧树脂，环氧玻璃，FR-4，BT树脂，热塑性材料或热固塑料材料。衬底可为具有与电路板(例如线路板)进一步电连接的端子的封装的衬底。可选地，衬底可为电路板或线路板。在衬底的一个示例中，衬底可为双列直插式存储模块(DIMM)的模块板。在另一个变型中，衬底可为微电子元件，例如是或包括配备多个有源器件(如以集成电路或其他形式)的半导体芯片。
第一表面14和第二表面16优选为基本上相互平行，且在垂直于表面14和16的方向上相互间隔开一段距离以限定衬底12的厚度。衬底12的厚度优选为本发明大体可接受范围内。在一个实施例中，第一表面14和第二表面16之间的距离大约为25μm-500μm。为了上述目的，第一表面14可布置成相对于或远离第二表面16。这种描述以及在此使用的元件的相对位置(即这些元件的垂直或水平位置)的任何其他描述仅仅是相应于附图中的元件的位置所作的示意性说明，不用于限定本发明。
在优选实施例中，衬底12可分成第一区域18和第二区域20。第一区域18位于第二区域20内且包括衬底12的中心部分并从中心部分向外延伸。第二区域20基本环绕第一区域18，且从第一区域18向外延伸至衬底12的外边缘。在这个实施例中，衬底自身不存在具体特征物理地划分为这两个区域，但是为了在此讨论关于应用于这两个区域的处理或包含在这两个区域中的特征，两个区域被区分开。
微电子元件22安装在衬底12的第一区域18内的第一表面14上。微电子元件22可为半导体芯片或另一个可类比的器件。在图1的实施例中，微电子元件22安装在第一表面14，称为常规的或“面向上”的方式。在这个实施例中，使用引线24将微电子元件22电连接至暴露在第一表面14处的多个导电元件28中的一些导电元件。引线24可以联接至衬底12内的迹线(未示出)或其他导电特征，接着连接至导电元件28。
导电元件28包括暴露在衬底12的第一表面14的各个“触点”或焊盘30。如本文中使用的，当导电元件描述为“暴露在”具有介质结构的另一元件表面时，这说明导电结构可以与在垂直于介质结构表面的方向从介质结构外部向介质结构表面移动的理论点接触。因此，暴露在介质结构的表面的端子或其他导电结构可从这样的表面突出；可与这样的表面平齐；或者可相对于这样的表面凹入并通过介质中的孔或凹入部暴露。导电元件28可为平且薄的元件，其中焊盘30暴露在衬底12的第一表面14处。在一个实施例中，导电元件28可基本为圆形，且可彼此互连或通过迹线(未示出)连接至微电子元件22。至少在衬底12的第二区域20内形成导电元件28。此外，在某些实施例中，也可在第一区域18内形成导电元件28。当将微电子元件122(图3)以称为“倒装”的配置安装至衬底112时，这样的布置特别有用，其中微电子元件122上的触点可通过布置在微电子元件122底下的焊料凸块126等连接至第一区域118内的导电元件128。在一个实施例中，导电元件28可由固体金属材料(如铜，金，镍或其他本发明可接受的材料)形成，包括各种包含铜，金，镍或其组合中的一种或多种的合金。
至少一些导电元件28可互连至相应的第二导电元件40，例如，暴露在衬底12的第二表面16的导电焊盘。使用形成在内部衬有或填充有导电金属的衬底12中的通孔41以完成这种互连，衬底12可以衬有或填充同导电元件28和40相同的导电金属。可选地，导电元件40可通过衬底12上的迹线进一步互连。
微电子组件10进一步包括多个联接至至少一些导电元件28(如导电元件28的焊盘30)的多个线键合。线键合32沿着其边缘表面37的部分键合至导电元件28。这种键合的示例包括针脚式键合，楔形键合等。正如以下将进一步详细描述的，线键合工具可用于针脚式键合从线键合工具的毛细管延伸至导电元件28的线段，且从毛细管的线供应处切断线的针脚式键合的端部。在各个线键合的基34处，线键合针脚式键合至导电元件28。以下，这种针脚式键合的线键合32的“基”34即指用导电元件28形成联接的线键合的部分。可选地，线键合联接至至少一些使用球形键合的导电元件，这些示例将在共同待决，共同转让的美国专利申请中示出及描述，其全部公开内容通过引用并入本文。
在此所述的各种形式的边缘键合的并入可以允许导电元件28成为非阻焊层限定(“NSMD”)型的导电元件。在使用其他类型的导电元件的连接(如焊料球等)的封装中，导电元件由阻焊层限定。换言之，导电元件暴露在形成在阻焊材料层中的开口中。在这种布置中，阻焊层可部分覆盖导电元件或可接触沿着阻焊层的边缘的导电元件。相反，NSMD导电元件不与阻焊层接触。例如，导电元件可暴露在不具有阻焊层的衬底的表面上，或者即使有阻焊层，但表面上的阻焊层可以具有开口，且开口的边缘与导电元件分离。这种NSMD导电元件可制成非圆形的形状。当意欲用于通过焊料块键合至元件时，阻焊层限定的焊盘通常为圆形，以在表面上形成大体的圆形轮廓。例如，当使用边缘键合附接至导电元件时，本身轮廓并非圆形的键合适用于非圆形的导电元件。这种非圆形导电元件可为例如椭圆，矩形，或具有圆角的矩形。为了适应键合，可进一步将这些导电元件设置成边缘键合的方向上更长，而线键合32的宽度方向上更短。这可以允许衬底12的更小的间距。在一个示例中，导电元件28可在两个方向上比基34的设定尺寸约大10％-25％，以允许基34的位置精确度的改变和键合过程中的改变。
在一些实施例中，边缘键合的线键合(如以上所述，线键合可为针脚式键合形式)可与球形键合结合。如图23A所示，球形键合1333可形成在导电元件1328上，以及可以利用沿着边缘表面1337的部分针脚式键合至球形键合1372的基1338形成。在另一示例中，球形键合的大体尺寸和布置可如1372’所示。在图23B所示的另一变型中，线键合1332可沿着导电元件1328边缘键合，例如通过如上所述的针脚式键合。然后，球形键合1373可在线键合1334的基1338的顶部形成。在一个示例中，球形键合的尺寸和布置可如1373’所示。线键合32中的每个可延伸至远离这种线键合的基34和远离衬底12的自由端部36。线键合32的端36的自由的特征在于其没有电连接或联接至微电子元件22或微电子组件10中的任何其他导电部件，这些其他导电部件接着连接至微电子元件22。换句话说，自由端部36可以直接或间接地通过焊料球或其他在此所述的特征电连接至组件10外部的导电特征。端36通过封装层42等联接或电连接至另一个导电特征来固定在预定的位置，这并不意味着端部36不是如在此所述的“自由”，只要任何这种特征没有电连接至微电子元件22。相反地，基34不是自由的，因为它直接或间接地电连接至微电子元件22，如本文所述。如图1所示，线键合32的基34典型地在与各个导电元件28针脚键合(或其他边缘键合)的联接处弯曲。每个线键合具有在这种线键合的基34和这种线键合的端部36之间延伸的边缘表面37。基34的特定尺寸和形状可根据用于形成线键合32的材料类型，线键合32和导电元件28之间的连接的预期强度，或用于形成线键合32的特定流程而改变。其他实施例也是可能的，其中线键合32可另外地或选择性地联接至暴露在衬底12的第二表面16且远离第二表面16延伸的导电元件40。
在图40所示的另一个布置中，基2734的形状基本为圆形，且从基2734和端2736之间限定的线键合2732的边缘表面2737向外延伸。基2734的特定尺寸和形状可根据用于形成线键合2732的材料类型，线键合2732和导电元件2728之间的连接的预期强度，或用于形成线键合2732的特定流程而改变。制作线键合2728的示例性方法在美国专利No.7,391,121，Otremba和美国专利申请公布No.2005/0095835(描述一种线键合的形式的楔形键合工艺)中描述，两者的公开内容通过引用全部并入本文。其他实施例也是可能的，其中线键合2732可另外地或选择性地联接至暴露在衬底2712的第二表面2716且远离第二表面2716延伸的导电元件2740。球形键合的线键合的示例将在标题为“METHOD FORPACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATIONSURFACE”、发明人为Reynaldo Co和Laura Mirkarimi的共同所有共同待决的美国专利申请No.13/405,125中示出和描述，其公开内容通过引用并入本文。
在特定示例中，线键合32中的第一个线键合可适用于，即构造，布置，或电连接至衬底上的其他电路以携载第一信号电位，且线键合32中的第二个线键合可适用于同时携载不同于第一信号电位的第二信号电位。因此，当如图1和图2所示的微电子封装通电，则第一线键合和第二线键合可同时携载第一信号电位和不同的第二信号电位。
线键合32可由导电材料(如铜，铜合金或金)制成。此外，线键合32可由各种材料的组合，例如具有涂层的导电材料(如铜或铝)的芯制成。涂层可由第二导电材料(如铝，镍等)制成。可选地，涂层可由绝缘材料(如绝缘夹套)制成。
在特定实施例中，线键合可具有主金属的芯和金属面层，且金属面层包括不同于主金属且覆盖所述主金属的第二金属。例如，线键合具有由铜、铜合金或金构成的主金属的芯，且金属面层可包括钯。钯可避免芯金属(如铜)的氧化，且可作为扩散势垒区以避免焊料可溶金属(如金)在线键合的未封装部分39和以下进一步所述的另一部件之间的焊料联接处的扩散。因此，在一个示例中，线键合可由钯涂布的铜线或钯涂布的金线形成，铜线和金线可通过线键合工具的毛细管进给。
在一个实施例中，形成线键合32的线可具有约15μm-150μm的厚度(即横穿线的长度的尺寸)。一般而言，在导电元件(例如导电元件28、焊盘、迹线等)上且使用本领域专用设备形成线键合。线键合32的自由端部36具有端面38。端面38可形成由多个线键合32的各个端面38形成的阵列中的触点的至少一部分。图2示出这种由端面38形成的触点阵列的示例性图案。这种阵列可形成为面阵配置，使用在此所述的结构可实现阵列变型。这种阵列可用于电连接和机械连接微电子组件10至另一个微电子结构，例如印刷电路板(“PCB”)，或其他封装的微电子元件(图6出示一个示例)。在这种堆叠布置中，线键合32和导电元件28和40可通过该布置携载多个电子信号，每个电子信号具有不同的信号电位以允许不同的信号由同一堆叠中不同的微电子元件处理。焊料块52可用于这种堆叠中微电子组件的互连，例如通过将端面38电附接和机械附接至导电元件40。
微电子组件10进一步包括由介质材料形成的封装层42。在图1所示的实施例中，封装层42形成在衬底12的第一表面14的未被微电子元件22或导电元件28覆盖或占据的部分上。类似地，封装层42形成在导电元件28(包括未被线键合32覆盖的导电元件28的焊盘30)的部分上。封装层42也可基本覆盖微电子元件22，线键合32(包括线键合32的基34和线键合32的边缘表面37的至少一部分)。线键合32的一部分可保持不被封装层42覆盖，该部分也可称为未封装部分39，由此使线键合能够电连接至位于封装层42外部的特征或元件。在一个实施例中，线键合32的端面38保持不被封装层42覆盖在封装层42的主表面44内。其他实施例也是可能的，其中边缘表面37的一部分未被封装层42覆盖，此外或者可选地具有未被封装层42覆盖的端面38。换句话说，封装层42可覆盖微电子组件10的除线键合36的一部分(例如端面38、边缘表面37或二者的组合)之外的第一表面14及以上的所有特征。在如图所示的实施例中，封装层42的表面(如主表面44)可以一段足以覆盖微电子元件22的距离与衬底12的第一表面14间隔开。因此，其中线键合32的端面38与表面44平齐的微电子组件10的实施例将包括高于微电子元件22的线键合32以及用于倒装连接的底层焊料凸块。但是，封装层42的其他配置也是可能。例如，封装层可具有多个不同高度的表面。在这种配置中，端面38所布置的表面44可高于或低于其下设置有微电子元件22的面朝上的表面。
封装层42用于保护微电子组件10内的其他元件，特别是线键合32。这保障一个更加坚固的结构，以使在对其检测或运输或组装至其他微电子结构的过程中不太可能被损坏。具有绝缘属性的介质材料可形成封装层42，例如美国专利申请公布No.2010/0232129中描述的，其公开内容通过引用并入本文。
图3示出微电子组件110的实施例，微电子组件110包括具有未直接布置在线键合132的各个基34之上的端部136的线键合132。因此，考虑到衬底112的第一表面114在两个横向上延伸，以大体上限定平面，端部136或至少一个线键合132在这些横向中的至少一个上从相应的基134的横向位置移动。如图3所示，线键合132沿着其纵向轴线上基本是直的，如图1的实施例所示，纵向轴线相对于衬底112的第一表面114成一个角度146。虽然图3的剖视图只示出在垂直于第一表面114的第一平面的角度146，线键合132在垂直于第一平面和第一表面114的另一个平面内相对于第一表面114成一个角度。这个角度可基本等于或不同于角度146。换言之，端部136可相对于基134在两个横向上移动，且可以在每个横向上移动相同或不同的距离。
在一个实施例中，各个线键合132可在不同方向上移动且可以在组件110内移动不同量。这种布置允许组件110具有配置在不同于衬底12所在水平面的表面144的水平面上的阵列。例如，阵列可覆盖较小的总区域或具有不同于衬底112的第一表面114的表面144上的较小间距。进一步，一些线键合132可具有布置在微电子元件122之上的端部138，以容纳不同大小的封装的微电子元件的堆叠布置。在另一示例中，配置线键合132以使一个线键合的端部大体布置第二个线键合的基之上，其中第二个线键合的端部布置在其他地方。这种布置可称为相对于第二表面116上的相应的触点阵列的位置，在触点阵列内改变触点端面136的相对位置。在如图8所示的另一示例中，配置线键合132以使一个线键合132A的端部136A大体布置在另一个线键合134B的基134B之上，线键合134B的端部132B布置在其他地方。这种布置可称为相对于第二表面116的相应的触点阵列的位置，在触点阵列内改变触点端面136的相对位置。在这种阵列中，触点端面的相对位置可如所期待的根据微电子组件的应用或其他要求而改变。图4示出微电子子组件210的进一步实施例，该子组件210包括线键合232，线键合232具有相对于基234的横向位置移动的端部236。在图4的实施例中，线键合132通过包括其弯曲部分248而实现横向移动。在线键合形成过程的额外步骤中可形成弯曲部分248或，例如，当线部分被拉伸至期待的长度时，出现弯曲部分248。利用可用的线键合设备可进行这一步骤，其中包括使用单个机器。
根据需要，弯曲部分248可采用多种形状以达到线键合232的端部236的期待位置。例如，弯曲部分248可形成为各种形状的S型曲线，如图4所示或如图5所示的更平滑的形式。此外，弯曲部分248可布置在比接近端部236而更接近基234的位置，反之亦然。弯曲部分248可为螺旋形式或环形，或为包括多个方向上的或不同形状或性质的曲线的组合。
在如图26所示的进一步示例中，线键合132可以布置为使得基134布置成具有间距的第一图案。线键合132可以配置为使得线键合132的包括端面138的未封装部分139可设置成具有暴露在封装层的表面44的线键合32的相邻的未封装部分38之间的最小间距的图案，该最小间距大于多个基134中的各个相邻的基之间的最小间距(和相应地，基所联接的导电元件128之间的最小间距)。为了达到这点，线键合可包括以相对于导电元件的法线方向的一个或多个角度延伸的部分，如图26所示。在另一个示例中，线键合可以如图4所示弯曲，以使端部238在一个或多个横向上从基134移动，如上所述。如图26进一步所示，导电元件128和端部138可布置成各行或各列，且在一些位置(例如在端部的一行中)的端面138的从其联接至的衬底上各个导电元件开始的横向位移可以大于其他位置的未封装部分从其连接至的各个导电元件开始的横向位移。为了达到这点，线键合132可相对于衬底112的表面116成例如不同角度146A、146B。
图5A示出微电子封装310的进一步示例性实施例，微电子封装310包括具有导致基334和端部336之间各种相对的横向位移的各种形状的线键合332的组合。线键合332A中的一些基本上是直的且端部336A布置在线键合各个基334A之上，而其他线键合332B包括导致端部336B和基334B之间略微相对的横向位移的略微弯曲的部分348B。进一步，一些线键合332C包括具有流线型形状的弯曲部分348C，该弯曲部分348C导致端部336C从相关的基334C横向移动一段大于端部334B移动的距离。图5也示出一对示例性的这种线键合332Ci和332Cii，线键合332Ci和332Cii具有布置在衬底所在水平面的阵列中同一行的基334Ci和334Cii，以及布置在相应的衬底所在水平面的阵列的不同行的端部336Ci和336Cii。在一些情况下，在线键合332Ci和332Cii中的弯曲的半径可为很大，以使在线键合中的曲线可呈连续状。在其他情况下，弯曲的半径可较小，且线键合甚至可在线键合的弯曲之间具有笔直的部分或相对笔直的部分。此外，在一些情况下，线键合的未封装部分可从其基移动至少一段衬底的触点328之间的最小间距。在其他情况下，线键合的未封装部分可从其基移动至少200微米。
线键合332D的进一步变型配置为在其侧表面47上不被封装层342覆盖。在这个实施例中，自由端部336D未被覆盖，但是，边缘表面337D的一部分可另外地或可选择地不被封装层342覆盖。这种配置可用于通过将其电连接至适当的特征而将微电子组件10接地，或用于机械或电连接至横向布置在微电子组件310上的其他特征。此外，图5示出封装层342的经过刻蚀、模塑或其他方式形成的区域以限定布置比主表面342更接近衬底12的凹入表面345。一个或多个线键合(如线键合332A)可在沿着凹入表面345的区域内不被覆盖。在图5所示的示例性实施例中，端面338A和边缘表面337A的部分不被封装层342覆盖。这种配置可提供至另一个导电元件的连接，例如通过焊料球等，通过允许焊料吸附在边缘表面337A且联接至边缘表面337A和端面338。其他的线键合的一部分可不被沿着凹入表面345的封装层342覆盖的配置也是可能的，这些配置包括端面大体与凹入表面345平齐，或在此所示的关于封装层342的任何其他表面的其他配置。类似地，线键合332D的一部分未被沿着表面347的封装层342覆盖的其他配置可类似于本文其他地方所述的关于封装层的主表面的变型。
图5A进一步示出在一个示例性布置中具有两个微电子元件322和350的微电子组件310，其中微电子元件350面朝上堆叠在微电子元件322上。在这种布置中，引线324用于将微电子元件322电连接至衬底312上的导电特征。各种引线用于将微电子元件350电连接至微电子元件310的各种其他特征。例如，引线380将微电子元件350电连接至衬底312的导电特征，且引线382将微电子元件350电连接至微电子元件322。此外，在结构上类似于各个线键合332的线键合384用于在电连接至微电子元件350的封装层342的表面344上形成触点表面386。这可以用于将另一个微电子组件的特征从封装层342之上电连接至微电子元件350。当只包括该微电子元件而不包括附加在其上的第二微电子元件350时，还可以包括连接至微电子元件322的引线。封装层342上形成有开口(未示出)，且开口从封装层342的表面344延伸至沿例如引线380的点，由此提供至引线380的通道用于通过位于表面344外的元件电连接至引线380。可以在其他任何一个引线或线键合332上形成类似的开口，例如，在远离线键合332的端部336C的点处的线键合332C上形成开口。在这个实施例中，端部336C可以布置在表面344之下，且开口提供用于电连接至其上的唯一通道。
具有多个微电子元件的微电子封装的其他布置如图27A-C所示。这些布置可用于如以下所述的图5A所示的线键合的布置和图6所示的堆叠封装的布置。具体来讲，图27A示出一种布置，其中下微电子元件1622倒装键合至衬底1612的表面1614上的导电元件1628。第二微电子元件1650可覆盖第一微电子元件1622且面朝上连接至衬底上的附加导电元件1628，例如通过线键合1688。图27B示出一种布置，其中第一微电子元件1722面朝上安装在表面1714上且通过线键合1788连接至导电元件1728。第二微电子元件1750可具有暴露在其表面上的触点，该触点面对且联接至背向衬底的第一微电子元件1722的表面上相应的触点，通过第二微电子元件1750的一组触点1726，第二微电子元件的一组触点1726面对且联接至第一微电子元件1722的前面上的相应的触点。联接至第二微电子元件的相应的触点的第一微电子元件1722的这些触点可接着通过第一微电子元件1722的电路图案连接，且通过线键合1788连接至衬底1712上的导电元件1728。
图27C示出示例，其中第一微电子元件1822和第二微电子元件1850在沿着衬底1812的表面1814的方向上相互间隔开。微电子元件中的一个或者两个(以及附加的微电子元件)可以以如上所述的面朝上或倒装配置安装。此外，这种布置中采用的微电子元件中的任何一个可通过一个或两个这种微电子元件上，或衬底上，或前述两种上的电路图案相互连接，以电连接与微电子元件电连接的各个导电元件1828。
图5B进一步示出根据以上所述实施例的变型的结构，其中第二导电元件43可接触暴露或突出在封装层42的表面44之上的线键合的未封装部分39而形成，第二导电元件不接触第一导电元件28(图1)。在图5B所示的一个实施例中，第二导电元件可包括延伸至封装层的表面44上的焊盘45，焊盘45可提供表面用于联接与其连接的部件的键合金属或键合材料。
可选地，如图5C所示，第二导电元件48可为在线键合的未封装部分39上选择性地形成的金属面层。在任一情况下，在一个示例中，第二导电元件43或48可通过例如电镀由接触线键合未封装部分且覆盖线键合的芯的镍层，以及覆盖镍层的金层或银层形成。在另一示例中，第二导电元件可为基本上由单种金属组成的整体金属层。在一个示例中，单种金属层可为镍、金、铜、钯或银。在另一示例中，第二导电元件43或48可包括接触线键合的未封装部分39的导电胶或由接触线键合的未封装部分39的导电胶形成。例如，模板印刷、点胶、丝网印刷、可控制的喷涂(例如类似于喷墨打印的工艺)、或转移模塑法(transfer molding)可用于形成线键合的未封装部分39上的第二导电元件43或48。
图5D进一步示出可由金属或其他导电材料(如以上对于导电元件43，48所述的)形成的第二导电元件43D，其中第二导电元件43D至少部分地形成在延伸至封装层42的外表面44内的开口49内。在一个示例中，开口49可通过在在固化或部分固化封装层后去除封装层的部分以同时暴露线键合的一部分而形成，线键合的一部分然后成为线键合的未封装部分。例如，开口49可通过激光剥离或刻蚀形成。在另一个示例中，在形成封装层前，将可溶解材料预先放置在开口处，然后在形成封装层后去除预先放置的材料科以形成开口。
在图24A-24B所示的进一步示例中，多个线键合143可具有联接至单个导电元件1428的基。这样一组线键合1432可用于制作封装层1442上的另外的连接点以与导电元件1428电连接。共同联接的线键合1432的暴露部分1439可在封装层1442的表面1444上的尺寸例如大约是导电元件1428本身的尺寸的区域或接近键合块的意欲尺寸的另一区域内分组，以形成与线键合1432组的外部连接。如图所示，这种线键合1432可如上所述球形键合(图24A)或边缘键合(图24B)在导电元件1428上，或者可键合至如上关于图23A或23B或两者所述的导电元件。
如图25A和25B所示，球形键合的线键合1532可在至少一些导电元件1528上形成为凸点。如在此所述，凸点可为球形键合的线键合，其中在基1534和端面1538之间延伸的线段的长度至多是球形键合基1534的直径的300％。如其他实施例所示，端面1538和可选择地，凸点的边缘表面1537的一部分可不被封装层1542封装。如图25B所示，这种凸点1532A可在另一个凸点1532B的顶部形成，以基本上形成由两个球形键合组合成的线键合1532的基1534，线段从基1534延伸至封装层1542的表面1544。这种线键合1532可具有小于线键合(如本发明别处所述的线键合)的高度。因此，封装层可包括在区域(例如，覆盖微电子元件1522)内的主表面1544和在衬底1512的表面1514之上低于主表面1544的高度的次表面1545。这种布置可用于通过利用凸点型的线键合以及在此公开的其他类型的线键合，而形成对齐特征和降低封装的整体高度，同时容纳导电块1552，该导电块1522可以将线键合1532的未封装部分1539与另一个微电子封装1588上的触点1543相连接。
图6示出微电子组件410和488的堆叠封装。在这种布置中，焊料块452将组件410的端面438电连接和机械连接至组件488的导电元件440。堆叠封装可包括另外的组件且可最终附接至PCB490等上的触点492，以供在电子器件中使用。在这种堆叠布置中，线键合432和导电元件430可通过其携载多个电子信号，每个信号具有不同的信号电位以允许不同的信号由同一个堆叠中的不同的微电子元件(如微电子元件422或微电子元件489)处理。
在图6的示例性配置中，线键合432可配置有弯曲部分448，以使至少一些线键合432的端部436延伸至覆盖微电子元件422的主表面424的区域内。这个区域可由微电子元件422的外围限定，且从外围向上延伸。图18以面朝衬底412的第一表面414的视角示出这种配置的一个示例，其中线键合432覆盖微电子元件422的背面的主表面，微电子元件422在其前面425处倒装键合至衬底412。在另一个配置中(图5)，微电子元件422可面朝上安装至衬底312，且前面325背离衬底312，且至少一个线键合336覆盖微电子元件322的前面。在一个实施例中，这种线键合336未与微电子元件322电连接。键合至衬底312的线键合336也可覆盖微电子元件350的前面或背面。如图7所示的微电子组件410的实施例使得导电元件428布置成形成第一阵列的图案，其中导电元件428布置成环绕微电子元件422的行和列，且可具有各个导电元件428之间的预定间距。线键合432联接至导电元件428，以使线键合432的各个基434遵循导电元件428设置的第一阵列的图案。但是，线键合432配置为线键合432的各个端部436可以根据第二阵列配置布置成不同的图案。在所示的实施例中，第二阵列的间距可不同于，且在一些情况下小于第一阵列的间距。但是，其他实施例也是可能的，其中第二阵列的间距大于第一阵列的间距，或导电元件428未设置成预定阵列，而线键合432的端部436设置成预定阵列。此外，导电元件428可配置在遍及衬底412的阵列组中，且线键合432配置为端部436在不同的阵列组或同一阵列中。
图6进一步示出沿着微电子元件422的表面延伸的绝缘层421。在形成线键合之前，绝缘层421可由介质或其他电绝缘的材料形成。绝缘层421可保护微电子元件不与在其上延伸的线键合423中的任何一个接触。特别地，绝缘层421可避免线键合之间的短路以及线键合与微电子元件422之间的短路。通过这种方式，绝缘层421可帮助避免由于线键合432和微电子元件422之间的误电接触导致的故障或可能的损坏。
图6和图7所示的线键合配置可允许微电子组件410连接至另一个微电子组件(如微电子组件488)，在例如微电子组件488和微电子组件422的相对尺寸不允许的某些情况下。在图6的实施例中，微电子组件488的尺寸形成为一些触点焊盘440位于面积小于微电子元件422的前表面424或后表面426的区域内的阵列中。在具有大体垂直的导电特征(如支柱)的微电子组件中，代替线键合432，导电元件428和焊盘440之间的直接连接是不可能的。但是，如图6所示，具有适当配置的弯曲部分448的线键合432可在适当位置具有端部436，以实现微电子组件410和微电子组件488之间必要的电连接。这种布置可用于制作堆叠封装，其中微电子组件418为例如具有预定的焊盘阵列的DRAM芯片等，且其中微电子元件422为用于控制DRAM芯片的逻辑芯片。这允许单个类型的DRAM芯片与不同尺寸的不同的逻辑芯片(包括那些比DRAM芯片大的逻辑芯片)一起使用，因为线键合432可具有布置在必要位置以和DRAM芯片形成期待的连接的端部436。在可选的实施例中，微电子封装410可安装在另一配置内的印刷电路板490上，其中线键合432的未封装表面436电连接至电路板490的焊盘492。此外，在这个实施例中，另一个微电子封装(如封装488的变型)可通过联接至焊盘440的焊料球452安装在封装410上。
图9和图10示出微电子组件510的进一步的实施例，其中线键合532形成在引线框架结构上。引线框架结构的示例示出和描述在美国专利No.7,176,506和No.6,765,287中，其公开内容通过引用并入本文。一般而言，引线框架是由导电金属片(如铜)形成的结构，导电金属片被图案化为包括多个引线的段的且可进一步包括底盘(paddle)和框架。如果在组件制造过程中使用这种框架，其可紧固引线和底盘。在一个实施例中，微电子元件(如晶片或芯片)可面朝上联接至底盘且使用线键合电连接至引线。可选地，微电子元件可直接安装至在微电子元件下延伸的引线上。在这个实施例中，微电子元件上的触点可通过焊料球等电连接至各个引线。然后引线可用于形成与各种其他导电结构的电连接，这些导电结构用于携载电子信号电位至微电子元件或携载来自微电子元件的电子信号电位。当结构的组装(包括在其上形成封装层)完成时，框架的临时元件可从引线框架的引线和底盘处去除，以形成单独的引线。为了达到本发明的目的，单独的引线513和底盘515被看作是分开的部分，共同形成在与其一体形成的部分内包括导电元件528的衬底512。此外，在这个实施例中，底盘515被看作在衬底512的第一区域518内，引线513被看作在第二区域520内。在图10的正视图中，线键合524将承载在底盘515之上的微电子元件22连接至引线515的导电元件528。线键合532可在线键合的基534处进一步联接至引线515上另外的导电元件528。封装层542形成至组件510上，使线键合532的端部538在表面544内的位置处不被覆盖。在关于在此所述的其他实施例的相应的结构中，线键合532可具有另外的或可选的未被的封装层542覆盖的部分。
图11进一步示出填充层620的用途，用于机械地强化一个封装610A的线键合632和安装在封装610A上的另一个封装610B的焊料块652之间的联接。如图11所示，虽然填充层620只需设置在封装610A和封装610B相对的表面642和644之间，填充层620可接触封装610A的边缘表面，且可接触其上安装有封装610的电路板690的第一表面692。此外，填充层620的沿着封装610A和610B的边缘表面延伸的部分(如有)相对于其上设置有封装的电路板的主表面成0°-90°角，且可从在邻近电路板处的较大的厚度逐渐减小至在高于该电路板且临近一个或多个封装处的较小的厚度。
图28A-D所示的封装布置可在制作填充层(特别是其设置在封装1910A和1910B的相对的面(例如封装1910A的表面1942和封装1910B的表面1916)之间的部分)的技术中实现。如图28A所示，封装1910A可延伸超出封装1910B的边缘表面1947，以使例如封装层1942的表面1944具有暴露在封装1910B外面的部分。这个区域可用作点胶区域1949，由此装置可从垂直于点胶区域1949的位置处在点胶区域上沉积流动状态的填充材料。在这个布置中，点胶区域1949的尺寸可以形成为填充材料可在表面上大面积沉积，当达到足够体积时不会溢出表面的边缘，以使填充材料在封装1910B下流动，且由毛细管拉进在封装1910A和1910B的相对的表面之间的区域，包括大约在相对的表面之间的任何联接，如焊料块等。当填充材料被拉进相对的表面之间时，另外的材料可以沉积在点胶区域上，以获得连续的流动而不会大量地溢出封装1910A的边缘。如图28B所示，点胶区域1949可环绕封装1910B且在每边上在远离封装1910B的外边缘的正交方向上具有大约1毫米的尺度D。这种布置可允许在封装1910B的一边点胶，或依次或同时在多于一边点胶。在如图28C所示的可选的布置中，点胶区域1949只沿着封装1910B的两个相邻的边延伸且在远离第二封装的外边缘的正交方向上具有大约1mm的尺度D′，在28D的布置中，点胶区域1949沿着封装1910B的一个边延伸且在远离封装的外边缘的正交方向具有例如1.5mm-2mm的尺度D″。
在一种布置中，微电子封装2010A和2010B在水平剖面中大小相同，柔性边框2099可用于在附接过程中将封装2010A和2010B紧固在一起，该附接例如，通过将第二封装的端子与包括线键合2032的未封装部分2039的元件联接，如，通过加热或固化导电块2052，例如回流焊料块，以将封装2010A和2010B联接在一起。在如图29所示的布置中，封装2010B通过导电块2052(例如联接至封装2010B上的端子2043的焊料块)组装在封装2010A上。如上所述，对齐封装以使焊料块2052与封装2010A的线键合2032的未封装部分2039对齐，或与联接至线键合2032的端面2038的第二导电元件对齐。边框2099可以接着绕封装2010A和2010B被组装，以在加热过程中保持这种对齐，其中第二封装的端子与线键合2032或第一封装的第二导电元件联接。例如，加热过程可以用于回流焊料块2052以将第二封装的端子与线键合2032或第二导电元件键合。边框2099也可沿着封装2010B的表面2044的部分和封装2010A的表面2016的部分向内延伸，以保持回流前和回流过程中封装之间的接触。边框2099可为柔性材料，如橡胶、TPE、PTFE(聚四氟乙烯)、硅树脂等且可相对于组装的封装大小缩小尺寸，以使边框在适当位置时施加压缩力。在填充材料的涂敷过程中，边框2099可留在适当位置，且可包括适应此次涂敷的开口。在封装组装后，柔性边框2099被去除。
此外或可选地，微电子封装2110A和微电子封装2110B的组装正如图30A-F所示，下封装2110A可包括至少一个对齐表面2151。在图30A所示的一个示例中，对齐表面2151被包括在接近封装2110B的角的封装层2142内。对齐表面相对于主表面倾斜，且限定在0°-90°(包括90°)的范围的在相对于主表面2144某个位置的角度，对齐表面的延伸位置接近主表面2144和在衬底2112之上比主表面2144间隔开更大一段距离的各个次表面2145。次表面2145可与封装2110A的角相邻设置，且可在封装相交边之间部分地延伸。如图30B所示，对齐表面也可形成相对于封装2110A相交边的内角，且可以类似形式包括在封装2110A的所有角(例如四个角)内。如图30C所示，对齐表面2151可布置在离相应的线键合2132的未封装部分适当距离处，以使具有突起(例如，导电突起，例如联接至其上的导电块或焊料球)的第二封装2110B堆叠在封装2110A的顶部，对齐表面2151将焊料球导向至合适位置以覆盖与对齐表面2151相应的线键合2132的未封装部分。回流焊料球以将其与封装2110A的线键合2132的未封装部分联接。
采用对齐表面2251的进一步布置如图31A-C所示，其中对齐表面2251在提升的内表面2244和较低的外表面2245之间延伸。在这种布置中，内表面2244可覆盖微电子2222且可相应地在衬底212之上间隔开。外表面2245可在衬底厚度的方向上与衬底2212较近地间隔开，且可垂直布置在衬底2212的表面2214和微电子2222的表面2223之间。线键合2232的一个或多个未封装部分可相对于对齐表面2251布置，以获得如图30A-C所描述的焊料球2252或其他导电突起的对齐。如上所述，这种阶梯状布置可使用或不使用所述对齐功能，以假定某个键合块的尺寸条件下获得整个较低组件的高度。此外，引入提升的内表面2244可导致封装2210A的抗弯性的增强。
图12是第一部件610A的线键合632和第二部件(如微电子封装610B)的相应的焊料块652之间的示例性联接的摄影图像。在图12中，标号620指示填充层的设置位置。
图13A、图13B、图13C、图13D、图13E、图13F示出如上所述的相对于图1的线键合32的结构的一些可能的变型。例如，如图13A所示，线键合732A可具有向上延伸的部分736，并在具有和部分736相同半径的端部738A内结束。
图13B示出变型，其中端部738B为相对于部分736逐渐变小的尖端。此外，如图13C所示，线键合732A的逐渐变小的尖端738B可具有在径向方向741上从与其成一体的线键合的圆柱形部分的轴线偏移的形心740。这种形状可为将在如下所述的线键合的形成过程中产生的键合工具标。可选地，除了所示的738B，键合工具标还可存在于线键合的未封装部分上。如图13A进一步所示，线键合的未封装部分739可以以与其上设置有导电元件728的衬底的表面730成25°以内的角750远离衬底712突出。
图13D示出线键合732D的未封装部分可包括球形部分738D。封装上所有线键合中的一些可具有这种结构。如图13D所示，球形部分738D可与线键合732D的圆柱形部分736成一体，其中球形部分和线键合的圆柱形部分的至少一个芯基本由铜、铜合金或金组成。如下所述，球形部分可通过在将线键合针脚式键合至衬底的导电元件728之前的预成形过程中，将暴露在键合工具的毛细管开口处的线的一部分熔融而形成。如图13D所示，球形部分738D的直径744可大于与其成一体的线键合的圆柱形部分736的直径746。在如图13D所示的特定实施例中，与球形部分738D成一体的线键合732D的圆柱形部分可突出超过封装的封装层751的表面752。可选地，如图13E所示，线键合732D的圆柱形部分可被封装层完全覆盖。在图13E所示的情况下，线键合732D的球形部分738D可在一些情况下被封装层751部分地覆盖。
图13F进一步示出具有芯731和其上的金属面层733的线键合732F，芯731由主金属制成，金属面层733包括覆盖主金属的第二金属，例如以上所述的镀钯的铜线或镀钯的金线。在另一个示例中，非金属材料的抗氧化保护层(如商业可得的“有机可焊性保护层”(OSP))可形成在线键合的未封装部分上以避免其氧化，直到线键合的未封装部分联接至另一个部件的相应的触点。
图14示出一种方法，其中在此所述的线键合32(图1)可以成形，然后针脚式键合至衬底上的导电元件28。在该方法的阶段A中，金属线(如如上关于图1所述的金或铜线或复合材料线)的一段800(即具有预定长度802的一体部分)从键合工具的毛细管804进给。为了确保从毛细管进给的金属线的预定长度，初始线长度可为零或设为已知长度，在开始进给用于处理的线之前，通过键合工具针脚式键合线，然后从毛细管延伸，以将初始线长度设为已知长度。同时，线段可以在垂直于毛细管的表面806的直线方向上延伸。在该方法的阶段B中，将毛细管804的表面806至少在第一方向814(例如平行于形成单元810的第一表面812的方向)上移动，以使金属线段800弯曲而远离垂直方向。形成单元810可为具有表面的特殊设计的工具，该表面适合在金属线段被键合至衬底的导电元件之前帮助形成(即成形)金属线段。
在预形成过程的阶段B中，线段800的部分可以在平行于表面812的方向延伸。随后，如阶段C所示，毛细管移至第二表面816之上，使得线段800的至少一部分在沿着毛细管的外壁820在方向818上向上突出。在以这种方式预形成金属线段800之后，键合工具的毛细管移动至远离形成单元810但朝向衬底的导电元件28(图1)移动，然后毛细管将邻近毛细管开口808和毛细管面806的金属线段的部分822针脚式键合至导电元件。因此，远离毛细管开口808的金属线段800的端部838变成远离导电元件28的线键合的端部38(图1)。
图15进一步示出根据本发明实施例的方法在形成单元810的表面上移动毛细管的示例。如在此所示，形成单元810可具有第一凹陷830，当在形成过程中的阶段A，由毛细管的开口808进给线段800时，将毛细管804设置在第一凹陷830内。凹陷可包括通道或槽832，用于在阶段B帮助将线段800引导至表面812上。形成单元可进一步包括通道834或槽，以在该过程的阶段B中引导线段800。如图15进一步所示，形成单元可包括具有内表面816的另一个凹陷840，在该过程的阶段C中毛细管靠着内表面816移动以使金属线段在靠着毛细管的外壁820的方向818上弯曲。在一个示例中，凹陷840可具有图15所示的三角形形状。
在一个实施例中，可以使用如图14所示的毛细管的变型，该毛细管包括竖直或近竖直的侧壁2820。如图35所示，毛细管2804的侧壁2820可为大体竖直，或换句话说，大体平行于线段2800或大体垂直于毛细管2804的面2806。这样可允许形成更接近于垂直线(即接近于90°的角度)远离衬底的第一表面的线键合(图1中的32)，而不是限定具有大体上小于90°的角度的位于毛细管(如图14所示的毛细管)外部的侧壁。例如，使用形成工具2810获得与第一部分成角度的线键合，该线键合相对于第一线部分2822在25°-90°或45°-90°或80°-90°之间延伸。
在另一个变型中，毛细管3804可包括突出超过毛细管3804的面3806的表面3808。表面3808可被包括例如在侧壁3820的边缘之上。在形成线键合(例如图1中的32)的方法中，毛细管3804在形成线段的过程中可压在线段3800的第一部分3822上，例如当毛细管沿着在远离衬底3812的方向延伸的形成表面3816的方向移动时。在这个示例中，表面3808在靠近弯曲处压进第一部分3822，剩余线段3800从该弯曲处延伸。这样可导致线段3800的变形，以使线段可压在毛细管3804的壁3820上，且移动至比一旦毛细管3804被去除的位置稍微更竖直的位置。在其他示例中，表面3808的变形可使在毛细管3804被去除时，线段3800的位置大体保持不变。
图16是示出根据在此所述的一种或多种方法形成的线键合932可具有从线键合的各个基934偏移的端部938的摄影图像。在一个示例中，线键合的端部938可从线键合的各个基移动，以使端部938在平行于衬底的表面的方向上移动超过连接至其的导电元件的外边缘。在另一示例中，线键合的端部938可从线键合的各个基934移动，以使端部938在平行于衬底的表面的方向上移动超过连接至其的导电元件的外边缘933。
图17示出上述预形成过程的变型，其可用于形成线键合332Cii(图5)，线键合332Cii具有弯曲且具有端部1038，端部1038在横向1014A上从作为线键合的基1034针脚式键合至导电元件的部分1022移动。
如图17所示，该过程的前三个阶段A、B和C可以与上述参考图14的描述相同。然后，关于阶段C和D，邻近毛细管804的面806的线键合的部分1022A被与形成单元成一体的工具夹持。可以通过毛细管在形成单元上的运动而主动或被动地实施夹持。在一个示例中，通过将具有非滑动表面的板压在金属线段800上以阻止金属线段的移动，从而实现夹持。
当金属线段800以这种方式被夹持时，在图17所示的阶段D中，毛细管工具沿着形成单元1010的第三表面1018的方向1016移动，且进给与沿着表面1018移动距离一样长的线。随后，在阶段E，毛细管沿着形成单元的第三表面1024向下移动，以使线的部分沿着毛细管804的外表面1020向上弯曲。通过这种方式，线的向上突出的部分1026可通过金属线的第三部分1048连接至另一个向上突出的部分1036。
如图40所示，形成具有球形键合的线键合2732的微电子封装2710的方法包括如图41-44所示的各个步骤。图41示出在一个步骤中的微电子组件2710’，该步骤中微电子元件2722在衬底2712的第一表面2714的第一区域2718内电连接且机械连接至衬底2712。如图14所示，微电子元件2722通过焊料块2726以倒装布置的方式安装到衬底2712上。可选地，可使用图40所示的面朝上的键合替换。在图11所示的这个方法步骤的实施例中，介质填充层2766设置在微电子元件2722和衬底2712之间。
图42示出微电子组件10″，其具有应用于暴露在衬底2712的第一表面2714上的导电元件2728的焊盘2730上的线键合2732。如所讨论的，线键合2732可通过加热线段的端部以软化端部，以使当被压至导电元件2728时形成至导电元件2728的沉积键合，形成基2734而得以应用。然后将线从导电元件2728中拉出，如果需要，则在切断或以其他方式切割以形成线键合2732的端部36和端面2738之前以特定形状操作。可选地，线键合2732可由例如铝线经过楔形键合形成。楔形键合通过加热邻近线键合端部的线部分且将该部分沿着导电元件2728通过作用在其上的压力拉出而形成。这种工艺在美国专利No.7,391，121中进一步描述，其公开内容通过引用并入本文。
在图43中，封装层2742通过用于衬底的第一表面2714上而被附加在微电子组件2710″′上，从第一表面2714且沿着线键合2732的边缘表面2737向上延伸。封装层2742还覆盖填充层2766。如图42所示，通过在微电子组件2710’上沉积树脂而形成封装层2742。通过将组件2710’放在适当配置的模具内完成上述操作，该模具具有在可容纳组件2710’的封装层2742中的所需形状的腔。这种模具和这种形成封装层的方法可在美国专利申请公布No.2010/0232129示出和描述，其公开内容通过引用全部并入本文。可选地，使用至少部分柔性的材料将封装层2742预先制造成所需形状。在这种配置中，介质材料的柔性性质允许封装层2742被压入线键合2732和微电子元件2722之上的位置。在这个步骤中，线键合2732穿过柔性材料在其里面形成各个孔，封装层2742通过各个孔接触边缘表面2737。此外，微电子元件2722可使柔性材料变形，以使微电子元件2722可容纳进去。柔性介质材料可压缩以将端面2738暴露在外表面2744上。可选地，任何额外的柔性介质材料可从封装层去除以形成表面2744，在表面2744上，线键合2732的端面2738未被覆盖，或形成腔2764以在表面2763内的位置处不覆盖端面38。
在图43所示的实施例中，封装层形成为其表面2744最初在线键合2732的端面2738之上间隔开。为了暴露端面2738，在端面2738之上的封装层2742的部分可被去除，暴露大体与端面2742平齐的新表面2744’(如图44所示)。可选地，形成腔(未示出)，其中端面2738未被封装层2742覆盖。进一步可选地，封装层2742形成为表面2744大体与端面2738平齐，或表面2744布置在端面2738之下。如果必要，可通过碾磨、干法刻蚀、激光刻蚀、湿法刻蚀、研磨(lapping)等去除封装层2742的部分。如果需要，线键合2732的端部2738的部分也可以以相同或其他的步骤去除以获得大体与表面2744平齐的且大体是平坦的端面2738。如果需要，在这个步骤后形成腔，或也可形成凸点。制得的微电子组件2710可附接在PCB上或并入另外的组件(例如图6所示的堆叠封装)中。
在形成线段和将其键合至导电元件以形成线键合(尤其是上述的球形键合)之后，线键合(例如图1中的32)在毛细管(如图32A中的804)内与线的剩余部分分离。在远离线键合32的基34的任何位置可完成上述操作，且优选在远离基34至少足够限定线键合32的所需高度的一段距离处完成。可通过设置在毛细管804内或设置在毛细管804外的在面806和线键合32的基34之间的机构执行上述分离。在一个方法中，线段800可通过利用火星或火焰有效烧蚀在所需分离点穿过线段800来进行分离。为了对线键合高度获得更大的精确度，可用不同形式切割线段800。正如在此所述，切割可用来描述部分切割，可使在所需位置磨损线或完全切断线，以将线键合32与剩余线段800完全分离。
在图32所示的示例中，切割片805可被集成至键合头组件，例如毛细管804内部。如图所示，开口807可包括在毛细管804的侧壁820内，切割片805可延伸穿过开口807。切割片805可在毛细管804的内部移进移出，以使交替地允许线800自由穿出或接合线800。相应地，线800可被拉出，且线键合32形成且键合至导电元件28，切割片805在毛细管内部的外边位置处。形成键合之后，使用集成至键合头组件的夹具803夹持线段800，以保证线的位置。切割片803可移动进入线段以完全切割线或部分切割或磨损线。完全的切割可在某一点形成线键合32的端面38，在该点处毛细管804可从线键合32移出以例如形成另一个线键合。同样地，如果线段800被切割片805磨损，在线仍被线夹具803保持的情况下的键合头单元的移动可以通过在由部分切割磨损的区域损坏线段800而引起分离。
切割片805的移动可通过气动装置或伺服电动机使用偏心凸轮启动。在其他示例中，切割片805的移动可由弹簧或膜片启动。启动切割片805的触发信号可以基于从球形键合的形成开始计时的时间延迟，或通过将毛细管804移动至线键合基34之上的预定高度以启动触发信号。这种信号可与操控键合机器的其他软件关联，以使在任何随后的键合形成之前重新设定切割片805的位置。切割机构也可包括在紧靠切割片805的位置的第二切割片(未示出，两切割片之间有线)，以使通过第一切割片和第二切割片中的一个或多个相对于其他的第一切割片和第二切割片的移动而切断线段，例如一个示例中，从线的相对两侧。
在另一个示例中，将激光器809与键合头单元组装且定位以切割线。如图33所示，激光器头809可设置在毛细管804的外部，例如通过安装至毛细管804或安装在包括毛细管804的键合头单元上的另一个点。激光器可在所需时间启动(例如上述关于图32中的切割片805)，以切割线800，在基34之上的预定高度形成线键合32的端面38。在其他实施中，激光器809布置为引导切割光束穿过或进入毛细管804本身，且进入键合头单元内部。在一个示例中，使用二氧化碳激光器，或可选地，使用Nd:YAG或铜蒸汽激光器。
在另一实施例中，使用图34A-C所示的模板印刷单元824以将线键合32与剩余线段800分离。如图34A所示，模板印刷单元824可为具有本体的结构，该本体将上表面826限定在或接近线键合32的所需高度。配置模板印刷单元824以接触导电元件28或衬底12的任一部分或在导电元件28之间连接至模板印刷单元824的封装结构。模板印刷单元824包括多个相应于线键合32的所需位置(如在导电元件28之上)的孔828。孔828的尺寸可形成为在其中容纳键合头单元的毛细管804，以使毛细管延伸进入孔到相对于导电元件28的位置处，以将线800键合至导电元件28以形成基34(如通过球形键合等)。在一个示例中，模板印刷单元824可具有孔，每个导电元件通过孔暴露。在另一示例中，多个导电元件可通过模板印刷单元824单个孔暴露。例如，孔可为模板印刷单元824中的通道型的开口或凹口，导电元件的行或列通过孔暴露在模板印刷单元824的顶表面826处。
当线段被拉至所需长度时，毛细管804可垂直地移出孔828。一旦从孔828清除出去，线段可以在键合头单元被夹持(如通过夹具803)，且毛细管804在横向(如平行于模板印刷单元824的表面826的方向)上移动以使线段800移动接触由孔828的表面和模板印刷单元824的外表面826交线限定的模板印刷单元824的边缘829。这种移动导致线键合32与仍保持在毛细管804内的线段800的剩余部分分离。重复上述过程以在所需位置形成所需个数的线键合32。在实施中，在线分离之前，垂直移动毛细管，以使剩余的线段突出超过毛细管804的面806一段足以形成下一个球形键合的距离802。图34B示出模板印刷单元824的变型，其中孔828可逐渐变小以使孔具有从在表面826的第一直径增大到远离表面826的更大的直径。在图34C所示的另一变型中，可形成具有一定厚度的外框架821的模板印刷单元，该厚度足以使表面826以所需距离与衬底12间隔开。框架821可至少部分地环绕腔823，腔823配置在邻近衬底12处，模板印刷单元824在表面826和敞开区域823之间延伸一段厚度，以使模板印刷单元824的包括孔828的部分与衬底12在布置在衬底12上时间隔开。
图18、图19和图20示出一种技术，当通过模塑形成封装层时，使用该技术，以使线键合的未封装的部分39(图1)突出超过封装层42的表面44。因此，如图18所示，使用基于薄膜的模塑技术以将临时薄膜1102放在模板1110和腔1112之间，其中包括衬底、联接至衬底的线键合1132和部件(例如微电子元件)的子组件联接至腔1112。图18进一步示出模具的位于第一模板1110对面的第二模板1111。
然后，如图19-20所示，当模板1110和1111放在一起时，线键合1132的端部1138可突出进入临时薄膜1102。当模塑化合物在腔1112内流动以形成封装层1142时，因为端部1138被临时薄膜1102覆盖，模塑化合物不接触线键合的端部1138。在这个步骤之后，将模板1110和1111从封装层1142上去除，临时薄膜1102可从模具表面1144去除，然后使线键合1132的端部1138突出超过封装层的表面1144。
基于薄膜的模塑技术可适用于大规模生产。例如，在这个过程一个示例中，临时薄膜的连续层的部分可应用于模板。然后在至少部分由模板限定的腔1112内形成封装层。然后模板1110上的临时薄膜1102的当前部分可通过自动化设备由临时薄膜的连续层的另一部分代替。
在基于薄膜的模塑技术的变型中，取代使用上述的可去除的薄膜，在形成封装层之前，将水溶性的薄膜放在模板1110的内表面上。当模板被去除时，可通过清洗将水溶性薄膜去除以使线键合的端部突出超过上述封装层的表面1144。
在图18和图19所示的方法的示例中，封装层1142的表面1144之上的线键合1132的高度可以在所有线键合1132中变化(如图37A所示)。用于进一步处理封装1110以使线键合1132突出超过表面1142基本一致的高度的方法如图37B-D所示，且利用牺牲材料层1178，牺牲材料层1178可以形成为通过将其应用在表面1144之上而覆盖线键合1132的未封装部分。可通过研磨、碾磨或抛光等，平面化牺牲材料层1178以将其高度降低至线键合1132的所需高度。如图所示，牺牲材料层1178的平面化可通过降低其高度至一点而开始，在该点线键合1132暴露在牺牲材料层1178的表面。平面化过程也可同时将线键合1132和牺牲材料层1178平面化，以使当牺牲材料层1178的高度持续降低时，线键合1132的高度也降低。一旦达到线键合1132的所需高度，平面化就停止。要注意的是，在这个过程中，线键合1132最先形成，以使不均匀的线键合的高度全部高于均匀的目标高度。平面化线键合1132降至所需高度之后，牺牲材料层1178可通过刻蚀等方式去除。使用一种材料形成牺牲材料层1178，该材料允许通过不会严重影响封装材料的刻蚀剂刻蚀而去除。在一个示例中，可使用水溶性塑料材料形成牺牲材料层1178。
图21和图22示出形成线键合的未封装部分的另一种方法，该未封装部分突出超过封装层的表面。因此，在图21所示的示例中，最初线键合1232可与封装层1242的表面1244平齐或可不均匀地暴露在封装层1242的表面1244上。然后，如图22所示，封装层(如模塑的封装层)的部分可被去除以使端部1238突出超过改造的封装层表面1246。因此，在一个示例中，使用激光剥离以使封装层均匀地凹陷，从而形成平面的凹陷表面1246。可选地，在封装层与单独的线键合联接的区域内，选择性地执行激光剥离。
在将封装层的至少部分相对于线键合选择性去除的其他技术中，包括“湿法喷砂”技术。在湿法喷砂中，将液体介质携带的研磨颗粒流导向目标以将材料从目标表面去除。颗粒流有时可与化学刻蚀剂结合使用，以促进或加快材料的相对于其他结构(例如在湿法喷砂后留下的线键合)的选择性去除。
在图38A和图38B所示的示例中，图21和图22所示的方法的变型中，形成线键合环1232’，其一端部具有导电元件1228上的基1234a，且另一端部1234b附接至微电子元件1222的表面。为了将线键合环1232’附接至微电子元件1222，微电子元件1223的表面可被金属化，例如通过溅射、化学气相沉积、电镀等。基1234a可为所示的球形键合或边缘键合(如联接至微电子元件1222的端部1232b)。如图38A进一步所示，可在衬底1212之上形成介质封装层1242，以覆盖线键合环1232’。通过如碾磨、研磨、抛光等平面化封装层1242以降低其高度且断开线键合环1232’与线键合1232A的连接，线键合1232A可至少联接至其端面1238以电连接至导电元件1228和联接至微电子元件1222上的散热键合1232B。散热键合未电连接至微电子元件1222的任何电路，但被设置以将热量从微电子元件1222传导至封装层1242的表面1244。如本文其他处所述，也可以将其他的处理方法用于封装1210’。
图39A-C示出在预定高度形成线键合2632的另一种方法。在这种方法中，牺牲封装层2678可形成在衬底2612的表面2614上的至少第二区域2620内。牺牲层2678也可形成在衬底2612的第一区域2618之上以以如图1所描述的封装层类似的方式覆盖微电子元件2622。牺牲层2678包括至少一个开口2679和在一些实施例中包括多个开口2679以暴露微电子元件2628。在模塑牺牲层2678的过程中或模塑之后，通过刻蚀、钻孔等方式形成开口2679。在一个实施例中，形成一个大开口2679以暴露所有的导电元件2826，而在其他实施例中形成多个大开口2679以分别暴露各组导电元件2628。在进一步的实施例中，形成对应于单独的导电元件2628的开口2629。在线键合2632的所需高度形成具有表面2677的牺牲层2678，以使通过将线键合2632的基2634键合至导电元件2628，然后把线拉伸以达到牺牲层2678的表面2677而形成线键合2632。然后，线键合可沿开口的横向拉伸以覆盖牺牲层2678的表面2677的部分。移动键合形成装置的毛细管(如图14所示的毛细管804)以压住线段接触表面2677，以使表面2677和毛细管之间的线上的压力导致线在表面2677上断裂(如图39A所示)。
牺牲层2678可通过刻蚀或另一类似的工艺去除。在一个示例中，牺牲层2678可由水溶性塑料材料形成，以使其通过暴露在水中而被去除，但又不会影响加工用单元2610″的其他部件。在另一实施例中，牺牲层2678可由感光材料(例如光刻胶)制成，以便可以通过暴露在光源下而被去除。牺牲层2678’的部分可保留在微电子元件2622和衬底2612的表面2614之间，作为环绕焊料球2652的填充层。在去除牺牲层2678以后，在加工用单元之上形成封装层2642以形成封装2610。封装层2642可类似于以上描述的那些封装层，且可大体覆盖衬底2612的表面2614和微电子元件2622。封装层2642可进一步支撑且分离线键合2632。在图29C所示的封装2610中，线键合包括其边缘表面2637的暴露在封装剂2642的表面2644且大体与其平行延伸的部分。在另一实施例中，可以平面化线键合2632和封装层2642以形成表面2644，具有端面的线键合2632暴露在表面2644上且与表面2644平齐。
本发明的上述实施例和变型可以除了以上具体描述的方法之外的其他方式结合。本文旨在涵盖本发明范围和精神之内的所有变型。

Claims (44)

1.一种微电子封装，包括：
衬底，所述衬底具有第一区域和第二区域，所述衬底具有第一表面和远离所述第一表面的第二表面；
至少一个微电子元件，所述至少一个微电子元件覆盖在所述第一区域内的所述第一表面上；
导电元件，所述导电元件暴露在所述衬底的所述第二区域内的所述第一表面和第二表面中的至少一个处，至少一些所述导电元件电连接至所述至少一个微电子元件；
线键合，所述线键合限定边缘表面，且具有键合至各个导电元件的基，所述基包括沿着所述导电元件延伸的所述边缘表面的第一部分以及相对于所述第一部分成25°-90°的角度的所述边缘表面的第二部分，所述线键合进一步具有远离所述衬底和所述基的端部；和
介质封装层，所述介质封装层从所述第一表面和第二表面中的至少一个延伸且覆盖所述线键合的部分，以使所述线键合的被覆盖部分通过所述封装层相互分离，所述封装层至少覆盖所述衬底的所述第二区域，其中，所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的部分限定，所述未封装部分包括所述端部，其中，所述导电元件设置成多个导电元件中的各个相邻的导电元件之间具有第一最小间距的图案，且其中所述未封装部分设置成多个线键合中的各个相邻的线键合的端部之间具有第二最小间距的图案，所述第二间距大于所述第一间距。
2.根据权利要求1所述的微电子封装，其中，所述角度在80°-90°之间。
3.根据权利要求1所述的微电子封装，其中，所述线键合的至少一些所述未封装部分中的每个包括球形部分，每个球形部分与所述线键合的圆柱形部分成一体，每个球形部分和每个圆柱形部分至少具有基本上由铜、铜合金或金构成的芯。
4.根据权利要求3所述的微电子封装，其中，与所述球形部分成一体的所述圆柱形部分突出超过所述封装层的表面。
5.根据权利要求1所述的微电子封装，其中，至少一些所述线键合具有主金属的芯和金属面层，所述金属面层包括不同于所述主金属且覆盖所述主金属的第二金属。
6.根据权利要求5所述的微电子封装，其中，所述主金属为铜，所述金属面层包括一层银。
7.根据权利要求1所述的微电子封装，其中，所述导电元件为第一导电元件，所述微电子封装进一步包括电连接至所述线键合的所述未封装部分的多个第二导电元件，其中，所述第二导电元件不接触所述第一导电元件。
8.根据权利要求7所述的微电子封装，其中，所述第二导电元件通过在形成所述封装层之后，接触所述线键合的所述未封装部分电镀形成。
9.根据权利要求1所述的微电子封装，
其中，至少一个所述线键合的端部在平行于所述衬底的所述第一表面的方向上从所述基移动至少等于所述导电元件之间的最小间距和100微米之一的距离，
其中，至少一个所述线键合包括所述线键合的所述基和所述线键合的所述未封装部分之间的至少一个弯曲，
其中，至少一个所述线键合的所述弯曲远离所述线键合的所述基和所述线键合的所述未封装部分。
10.根据权利要求9所述的微电子封装，其中，所述弯曲的半径大于所述至少一个线键合的圆柱形部分的直径的十二倍。
11.根据权利要求9所述的微电子封装，其中，所述弯曲的半径小于所述至少一个线键合的圆柱形部分的直径的十倍。
12.根据权利要求9所述的微电子封装，其中，所述至少一个线键合的所述未封装部分在与所述衬底的所述第一表面的垂线成25度以内的方向上突出在所述封装层上。
13.根据权利要求1所述的微电子封装，其中，所述导电元件为非阻焊层限定的。
14.根据权利要求1所述的微电子封装，进一步包括联接至及覆盖所述线键合的所述基的部分的球形键合。
15.根据权利要求1所述的微电子封装，其中，所述至少一个微电子元件包括覆盖在所述第一区域内的所述第一表面上的第一微电子元件和第二微电子元件，其中，至少一些所述导电元件与所述第一微电子元件连接，其中，至少一些所述导电元件与所述第二微电子元件连接，其中，所述第一微电子元件和所述第二微电子元件在所述微电子封装内相互电连接。
16.一种微电子封装，包括：
衬底，所述衬底具有第一区域和第二区域，所述衬底具有第一表面和远离所述第一表面的第二表面；
至少一个微电子元件，所述至少一个微电子元件覆盖在所述第一区域内的所述第一表面上；
第一导电元件，所述第一导电元件暴露在所述衬底的所述第二区域内的所述第一表面和第二表面中的至少一个处，至少一些所述第一导电元件电连接至所述至少一个微电子元件；
线键合，所述线键合具有联接至各个所述第一导电元件的基和远离所述衬底和所述基的端面，每个所述线键合限定在所述线键合的所述基和所述端面之间延伸的边缘表面；
介质封装层，所述介质封装层从所述第一表面和第二表面中的至少一个延伸且填充所述线键合之间的空间，以使所述线键合通过所述封装层相互分离，所述封装层至少覆盖所述衬底的所述第二区域，其中，所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的端面的至少部分限定，
所述封装层包括主表面和相对于所述主表面倾斜的对齐表面，所述线键合的至少一个未封装部分布置在所述主表面上，所述对齐表面在邻近于所述未封装部分的位置处接近所述主表面，以使所述对齐表面用于将设置在所述对齐表面之上的导电突起引导朝向所述线键合的所述未封装部分。
17.根据权利要求16所述的微电子封装，其中，所述突起包括键合金属。
18.根据权利要求17所述的微电子封装，其中，所述键合金属包括附接至电路元件的焊料球。
19.根据权利要求16所述的微电子封装，其中，所述封装层限定所述封装层的角区域，所述封装层进一步包括布置在所述角区域内的且比所述主表面更远离所述衬底的至少一个次表面，所述对齐表面在所述次表面和所述主表面之间延伸。
20.根据权利要求16所述的微电子封装，其中，所述主表面为覆盖所述衬底的所述第一区域的第一主表面，所述封装层进一步限定覆盖所述第二区域且比所述主表面更靠近所述衬底的第二主表面，所述对齐表面在所述第一主表面和所述第二主表面之间延伸。
21.一种微电子组件，包括：
根据权利要求16所述的第一微电子封装；
第二微电子封装，所述第二微电子封装限定其上具有端子的前表面；和
多个导电突起，所述多个导电突起将所述线键合的至少一些所述未封装部分与各个所述端子连接；
其中，至少一个所述导电突起接触所述对齐表面的部分布置。
22.根据权利要求21所述的微电子封装，其中，所述导电突起包括焊料球。
23.一种微电子封装，包括：
衬底，所述衬底具有第一区域和第二区域，所述衬底具有第一表面和远离所述第一表面的第二表面；
至少一个微电子元件，所述至少一个微电子元件覆盖在所述第一区域内的所述第一表面上；
导电元件，所述导电元件暴露在所述衬底的所述第二区域内的所述第一表面和第二表面中的至少一个处，至少一些所述导电元件电连接至所述至少一个微电子元件；
球形键合，所述球形键合联接至至少一些所述导电元件；
线键合，所述线键合限定边缘表面，且具有键合至所述至少一些导电元件顶上的球形键合的基，所述基包括在所述导电元件上延伸的所述边缘表面的第一部分以及与所述第一部分成25°-90°的角度的所述边缘表面的第二部分，所述线键合进一步具有远离所述衬底和所述基的端部；和
介质封装层，所述介质封装层从所述第一表面和第二表面中的至少一个延伸且覆盖所述线键合的部分，以使所述线键合的被覆盖部分通过所述封装层相互分离，所述封装层至少覆盖所述衬底的所述第二区域，其中，所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的部分限定，所述未封装部分包括所述端部。
24.一种微电子组件，包括：
根据权利要求1所述的第一微电子封装，所述第一微电子封装进一步包括暴露在所述衬底的所述第二表面处的多个端子和在所述衬底的所述第一表面和第二表面之间的方向上延伸的外边缘；
第二微电子封装，所述第二微电子封装包括其上具有触点的衬底，与所述触点电连接的第二微电子元件，以及暴露在所述衬底的表面处且通过所述触点与所述第二微电子元件电连接的端子，所述第二微电子元件的所述端子面对所述线键合的各个未封装部分且与各个所述线键合的各个未封装部分电连接；
电路板，所述电路板包括第一表面和暴露在所述电路板的所述表面处的板式触点，所述第一微电子封装覆盖所述电路板且具有联接至所述电路板的所述板式触点的所述第一微电子封装的所述端子；和
整体填充层，所述整体填充层覆盖所述第一微电子封装的至少一个外边缘且设置在环绕所述第一微电子封装的所述端子和所述电路板的所述板式触点之间的联接的空间内，且设置在环绕所述第二微电子封装的所述端子和所述第一微电子封装的所述端子之间的联接的空间内。
25.一种微电子封装，包括：
衬底，所述衬底具有第一区域和第二区域，所述衬底具有第一表面和远离所述第一表面的第二表面；
至少一个微电子元件，所述至少一个微电子元件覆盖在所述第一区域内的所述第一表面上；
第一导电元件，所述第一导电元件暴露在所述衬底的所述第二区域内的所述第一表面和第二表面中的至少一个处，至少一些所述第一导电元件电连接至所述至少一个微电子元件；
线键合，所述线键合具有联接至各个所述第一导电元件的基和远离所述衬底和所述基的端面，每个所述线键合限定在所述线键合的所述基和所述端面之间延伸的边缘表面；
介质封装层，所述介质封装层从所述第一表面延伸且填充所述线键合之间的空间，以使所述线键合通过所述封装层相互分离，所述封装层限定在覆盖所述衬底的所述第一区域的面积内的所述第一表面之上的第一高度处的第一表面部分以及在覆盖所述衬底的所述第二区域的面积内的所述第一表面之上的第二高度处的第二表面部分，其中，所述第二高度小于所述第一高度，其中所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的所述端面的至少部分限定。
26.根据权利要求25所述的微电子封装，其中，所述微电子元件限定在所述第一表面之上间隔开的第三高度处的前面，其中，所述第二高度进一步小于所述第三高度。
27.一种微电子封装，包括：
衬底，所述衬底具有第一区域和第二区域，所述衬底具有第一表面和远离所述第一表面的第二表面；
至少一个微电子元件，所述至少一个微电子元件覆盖在所述第一区域内的所述第一表面上；
第一导电元件，所述第一导电元件暴露在所述衬底的所述第二区域内的所述第一表面和第二表面中的至少一个处，至少一些所述第一导电元件电连接至所述至少一个微电子元件；
线键合，所述线键合具有联接至各个所述第一导电元件的球形键合基以及以小于所述基的直径的三倍的距离远离所述衬底和所述基的端面，每个所述线键合限定在所述线键合的所述基和所述端面之间延伸的边缘表面；
介质封装层，所述介质封装层从所述第一表面延伸且填充所述线键合之间的空间，以使所述线键合通过所述封装层相互分离，其中，所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的所述端面的至少部分限定。
28.根据权利要求27所述的微电子封装，其中，所述球形键合基包括联接至各个所述导电元件的第一球形键合以及联接至所述第一球形键合的第二球形键合，所述端面在所述端面和所述第二球形键合之间延伸。
29.一种微电子封装，包括：
衬底，所述衬底具有第一区域和第二区域，所述衬底具有第一表面和远离所述第一表面的第二表面；
至少一个微电子元件，所述至少一个微电子元件覆盖在所述第一区域内的所述第一表面处；
第一导电元件，所述第一导电元件暴露在所述衬底的所述第二区域内的所述第一表面和第二表面中的至少一个处，至少一些所述第一导电元件电连接至所述至少一个微电子元件；
线键合，所述线键合具有联接至至少一些所述第一导电元件的基和远离所述衬底和所述基的端面，每个所述线键合限定在所述线键合的所述基和所述端面之间延伸的边缘表面，其中，至少两个所述线键合联接至多个所述第一导电元件中的一个；
介质封装层，所述介质封装层从所述第一表面和第二表面中的至少一个延伸且填充所述线键合之间的空间，以使所述线键合通过所述封装层相互分离，所述封装层至少覆盖所述衬底的所述第二区域，其中，所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的所述端面的至少部分限定。
30.一种微电子封装的制作方法，包括：
在包括具有第一表面和远离所述第一表面的第二表面的衬底的加工用单元上形成介质封装层，微电子元件安装至所述衬底的所述第一表面，多个导电元件暴露在所述第一表面处，至少一些所述导电元件电连接至所述微电子元件，线键合具有联接至所述导电元件的基以及远离所述基的端面，每个所述线键合限定在所述基和所述端面之间延伸的边缘表面；
其中，所述封装层形成为至少部分地覆盖所述第一表面和所述线键合的部分，以使所述线键合的未封装部分由所述线键合的所述端面或未被所述封装层覆盖的所述边缘表面的至少一个的部分限定，所述封装层进一步形成为包括主表面和相对于所述主表面成角度的对齐表面，所述线键合的至少一个未封装部分布置在所述主表面上，且所述对齐表面与所述主表面在接近所述未封装部分的位置相交，以使所述对齐表面用于将设置在所述对齐表面之上的导电突起引导朝向所述线键合的所述未封装部分。
31.根据权利要求30所述的方法，其中，所述封装层进一步形成为限定所述封装层的角区域以及以进一步包括布置在所述角区域内的且比所述主表面更远离所述衬底的至少一个次表面，所述对齐表面在所述次表面和所述主表面之间延伸。
32.根据权利要求30所述的方法，其中，所述封装层的所述主表面为覆盖所述衬底的所述第一区域的第一主表面，所述封装层进一步形成为限定覆盖所述第二区域且比所述主表面更靠近所述衬底的第二主表面，所述对齐表面在所述次表面和所述主表面之间延伸。
33.一种微电子组件的制作方法，包括：
将第二微电子封装与根据权利要求30所述的方法制作的第一微电子封装对齐，所述第二微电子封装包括限定其上暴露有触点焊盘的第一表面的衬底以及与所述触点焊盘联接的导电块，其中通过将至少一个焊料球移动至与所述对齐表面和至少一个线键合的至少端面相接触以使所述第二微电子封装与所述第一微电子封装对齐；和
回流所述导电块以将所述导电块与所述线键合的各个未封装部分联接。
34.一种微电子组件的制作方法，包括：
将第二微电子封装与第一微电子封装对齐，所述第一微电子封装根据以下方法制作，包括：
在包括具有第一表面和远离所述第一表面的第二表面的衬底的加工用单元上形成介质封装层，微电子元件安装至所述衬底的所述第一表面，多个导电元件暴露在所述第一表面处，至少一些所述导电元件电连接至所述微电子元件，线键合具有联接至所述导电元件的基以及远离所述基的端面，每个所述线键合限定在所述基和所述端面之间延伸的边缘表面，其中，所述封装层形成为至少部分地覆盖所述第一表面和所述线键合的部分，以使所述线键合的未封装部分由所述线键合的所述端面或未被所述封装层覆盖的所述边缘表面的至少一个的部分限定；
所述第二微电子封装包括限定其上暴露有触点焊盘的第一表面的衬底，且相对于所述第一微电子封装确定所述第二微电子封装的尺寸，以使所述第二微电子封装可以被对齐，以使由所述封装层的部分限定的点胶区域横向延伸超过所述第二微电子封装的边缘表面；和
在所述点胶区域上沉积填充材料以使所述填充材料流入至限定在所述封装层和所述第二微电子封装的所述衬底的所述第一表面之间的空间，且所述点胶区域上的所述填充材料的量可以流入至所述第一微电子封装和所述第二微电子封装的相对的表面之间的空间。
35.根据权利要求34所述的方法，其中，所述第二微电子封装包括四个边缘表面，所述点胶区域由横向延伸超过所有四个所述边缘表面的所述封装层的部分限定以环绕所述第二微电子封装。
36.根据权利要求34所述的方法，其中，所述第二微电子封装包括四个边缘表面，所述点胶区域由横向延伸超过两个相邻的所述边缘表面的所述封装层的部分限定。
37.根据权利要求34所述的方法，其中，所述第二微电子封装包括四个边缘表面，所述点胶区域由横向延伸超过一个所述边缘表面的所述封装层的部分限定。
38.一种微电子组件的制作方法，包括：
在第一微电子封装和第二微电子封装之间布置多个导电块，所述第二微电子封装包括限定其上暴露有第二触点焊盘的第一表面的衬底，其中，所述导电块进一步布置在各个第一触点焊盘和第二触点焊盘之间，且所述第一微电子封装通过以下方法制作，包括：
在包括具有第一表面和远离所述第一表面的第二表面的衬底的加工用单元上形成介质封装层，微电子元件安装至所述衬底的所述第一表面，多个导电元件暴露在所述第一表面处以及多个端子暴露在所述第二表面处，至少一些所述导电元件电连接至所述微电子元件，线键合具有联接至所述导电元件的基以及远离所述基的端面，每个所述线键合限定在所述基和所述端面之间延伸的边缘表面，其中，所述封装层形成为至少部分地覆盖所述第一表面和所述线键合的部分，以使所述线键合的未封装部分由所述线键合的所述端面或未被所述封装层覆盖的所述边缘表面的至少一个的部分限定；
绕所述第一微电子封装和所述第二微电子封装的边缘表面组装柔性边框；以及
回流所述导电块以将各个所述第一触点焊盘和第二触点焊盘相联接。
39.一种微电子封装的制作方法，包括：
a)从键合工具的毛细管进给具有预定长度的金属线段；
b)在形成单元的第一表面和第二表面上移动所述毛细管的面以使所述金属线段成形，以使所述金属线段具有在沿着所述毛细管的外壁的方向上向上突出的第一部分；以及
c)使用所述键合工具将所述金属线的第二部分键合至联接在暴露在衬底的第一表面处的导电元件上的球形键合，所述金属线的所述第二部分布置为沿着所述导电元件延伸，所述第一部分布置为相对于所述第二部分成25°-90°的角度；
d)重复步骤(a)-(b)以将多个所述金属线键合至所述衬底的多个所述导电元件；以及
e)然后形成覆盖所述衬底的所述表面的介质封装层，其中，所述封装层形成为至少部分地覆盖所述衬底的所述表面和所述线键合的部分，以使所述线键合的未封装部分由所述线键合的端面或未被所述封装层覆盖的边缘表面的至少一个的部分限定。
40.一种微电子组件的制作方法，包括：
将第一微电子封装和第二微电子封装联接，所述第二微电子封装包括具有与封装层间隔开且面对所述封装层的第一表面的衬底，所述第一微电子封装通过以下方法制作，包括：
在包括具有第一表面和远离所述第一表面的第二表面的衬底的加工用单元上形成介质封装层，微电子元件安装至所述衬底的所述第一表面，多个导电元件暴露在所述第一表面处以及多个端子暴露在所述第二表面处，至少一些所述导电元件电连接至所述微电子元件，线键合具有联接至所述导电元件的基以及远离所述基的端面，每个所述线键合限定在所述基和所述端面之间延伸的边缘表面，其中，所述封装层形成为至少部分地覆盖所述第一表面和所述线键合的部分，以使所述线键合的未封装部分由所述线键合的所述端面或未被所述封装层覆盖的所述边缘表面的至少一个的部分限定；
将所述第一微电子封装和具有与所述衬底的所述第二表面间隔开且面对所述衬底的所述第二表面的表面的电路板相联接，所述第一微电子封装和所述电路板联接在所述第一微电子封装的所述端子和暴露在所述电路板的所述表面上的触点焊盘之间；以及
环绕所述第一微电子封装的暴露部分形成整体填充层，以及填充环绕所述第一微电子封装的所述端子和所述电路板的联接以及所述第二微电子封装的所述端子和所述第一微电子封装的所述端子之间的联接的空间。
41.一种微电子封装的制作方法，包括：
在加工用单元上的介质封装层的表面上形成牺牲材料层，所述加工用单元进一步包括具有端面和远离所述端面的基且布置在所述封装层内的线键合，每个所述线键合限定在所述基和所述端面之间延伸的边缘表面，其中，所述封装层覆盖所述线键合的部分，以使所述线键合的未封装部分由所述线键合的所述端面和未被所述封装层覆盖的所述边缘表面的部分限定，其中，所述牺牲材料层覆盖所述线键合的未被所述封装层覆盖的所述部分；
平面化所述牺牲材料层的部分以及所述线键合的部分以使所述线键合的未被所述封装层覆盖的所述部分达到预定的基本一致的高度；以及
去除所述牺牲材料层的任何剩余部分。
42.一种微电子封装的制作方法，包括：
在包括具有第一表面和远离所述第一表面的第二表面的衬底的加工用单元上形成多个线键合，微电子元件安装至所述衬底的所述第一表面，多个导电元件暴露在所述第一表面处，至少一些所述导电元件电连接至所述微电子元件，所述线键合具有联接至所述导电元件的第一基和联接至所述微电子元件的背表面的第二基，每个所述线键合限定在所述第一基和所述第二基之间延伸的边缘表面；
在所述加工用单元上形成介质封装层，其中所述封装层形成为覆盖所述第一表面和所述线键合；
同时去除所述封装层的部分和所述线键合的部分以使所述线键合被分割为包括所述第一基的连接通孔和包括所述第二基的热通孔，所述连接通孔和所述热通孔具有远离所述基的端面，所述去除步骤进一步使得所述线键合的未封装部分由所述线键合的未被所述封装层覆盖的所述端面的至少部分限定。
43.一种微电子封装的制作方法，包括：
在包括具有第一表面和远离所述第一表面的第二表面的衬底的加工用单元上形成多个线键合，微电子元件安装至所述衬底的所述第一表面，多个导电元件暴露在所述第一表面处，至少一些所述导电元件电连接至所述微电子元件，所述线键合具有联接至所述导电元件的基以及远离所述基的端面，每个所述线键合限定在所述基和所述端面之间延伸的边缘表面，其中，至少两个所述线键合形成在至少一个所述导电元件上；以及
在所述加工用单元上形成介质封装层，其中所述封装层形成为至少部分地覆盖所述第一表面和所述线键合的部分，以使所述线键合的未封装部分由所述线键合的所述端面或未被所述封装层覆盖的所述边缘表面的至少一个的部分限定。
44.一种微电子封装的制作方法，包括：
在包括具有第一表面和远离所述第一表面的第二表面的衬底的加工用单元上形成牺牲结构，微电子元件安装至所述衬底的所述第一表面，多个导电元件暴露在所述第一表面处，至少一些所述导电元件电连接至所述微电子元件，所述牺牲结构中具有暴露至少一个所述导电元件的开口，所述牺牲结构限定邻近所述开口且远离所述衬底的所述第一表面的表面；
形成多个线键合，包括从键合工具的毛细管进给具有预定长度的金属线段，所述线键合具有联接至所述导电元件的基以及远离所述基的端面，每个所述线键合限定在所述基和所述端面之间延伸的边缘表面，在所述开口的外侧以及邻近所述牺牲结构的所述表面的位置切割所述线键合；
去除所述牺牲结构；以及
在所述加工用单元上形成介质封装层，其中所述封装层形成为至少覆盖所述第一表面和所述线键合的部分，以使所述线键合的未封装部分由所述线键合的所述端面或未被所述封装层覆盖的所述边缘表面的至少一个的部分限定。
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CN104505384A (zh) * 2014-12-30 2015-04-08 华天科技（西安）有限公司 一种键合线埋入扇入型封装件及其制备方法
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