CN103811022A - Method and device for waveform analysis - Google Patents

Method and device for waveform analysis Download PDF

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Publication number
CN103811022A
CN103811022A CN201410054922.0A CN201410054922A CN103811022A CN 103811022 A CN103811022 A CN 103811022A CN 201410054922 A CN201410054922 A CN 201410054922A CN 103811022 A CN103811022 A CN 103811022A
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China
Prior art keywords
cycle
pulse width
bit
waveform
wave
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CN201410054922.0A
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CN103811022B (en
Inventor
李东声
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Tendyron Technology Co Ltd
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Tendyron Technology Co Ltd
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Priority to CN201410054922.0A priority Critical patent/CN103811022B/en
Publication of CN103811022A publication Critical patent/CN103811022A/en
Priority to PCT/CN2015/070739 priority patent/WO2015124047A1/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04KSECRET COMMUNICATION; JAMMING OF COMMUNICATION
    • H04K1/00Secret communication
    • H04K1/003Secret communication by varying carrier frequency at or within predetermined or random intervals
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/30Authentication, i.e. establishing the identity or authorisation of security principals
    • G06F21/31User authentication
    • G06F21/34User authentication involving the use of external additional devices, e.g. dongles or smart cards
    • G06F21/35User authentication involving the use of external additional devices, e.g. dongles or smart cards communicating wirelessly

Abstract

The invention provides a method and a device for waveform analysis. The method includes that sinusoidal waveforms are received, and comprise a sinusoidal waves which are in cycle Ta and used for representing bits 0 and b sinusoidal waves which are in cycle Tb and used for representing bits 1, cycle Ta is not equal to cycle Tb, and a and b are positive integers; the sinusoidal waveforms are sampled to obtain square waveforms; a pulse width Mi between an i<th> rising edge and an i<th> falling edge in the square waveforms is obtained, and i is a positive integer which is smaller than or equal to the total of a and b; the pulse width Mi is compared with a half of an obtained cycle T1 in advance and a half of an obtained cycle T0 in advance to obtain a comparative result; according to the comparative result, bits represented by the square waveforms corresponding to the pulse width Mi are determined, if the pulse width Mi is equal to a half of the cycle T1, the square waveforms corresponding to the pulse width Mi represent the bits 1, and if the pulse width Mi is equal to a half of the cycle T0, the square waveforms corresponding to the pulse width Mi represent the bits 0.

Description

A kind of method and apparatus of resolving waveform
Technical field
The present invention relates to electronic technology field, relate in particular to a kind of waveform display method and device of resolving.
Background technology
Intelligent cipher key equipment is the safety equipment with signature function and/or dynamic password systematic function.In the time that the mobile terminals such as intelligent cipher key equipment and mobile phone, panel computer communicate by audio interface, after mobile terminal output waveform, intelligent cipher key equipment can be sampled to the waveform receiving, and parses the bit that waveform is corresponding.
And in prior art, do not provide a kind of scheme of resolving waveform corresponding to sound signal.
Summary of the invention
The invention provides a kind of method and apparatus of resolving waveform, fundamental purpose is to provide the parsing scheme to waveform when by audio interface transmitted waveform.
A kind of method of resolving waveform, comprise: receive sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, and a and b are positive integer; Described sine waveform is sampled, obtain square-wave waveform; Obtain the pulse width Mi between i rising edge and i negative edge in described square-wave waveform, wherein i is the positive integer that is less than or equal to the summation of a and b; The half of the cycle T 0 that pulse width Mi and a half-sum of the cycle T 1 of obtaining are in advance obtained in advance compares, and obtains comparative result; According to comparative result, determine the bit that square wave that pulse width Mi is corresponding represents; Wherein according to comparative result, determine the bit that square wave that pulse width Mi is corresponding represents, comprising: if described pulse width Mi equals the half of cycle T 1, the square wave that pulse width Mi is corresponding represents bit 1; If described pulse width Mi equals the half of cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
Wherein, described according to comparative result, determine the bit that the square wave of pulse width Mi represents, comprise: if described pulse width Mi is not equal to the half of cycle T 1, also be not equal to the half of cycle T 0, judge that described pulse width Mi is whether in the error range of the half of the cycle T 1 of obtaining in advance or cycle T 0, if described pulse width Mi is in the error range of the half of cycle T 1, determine that square wave corresponding to pulse width Mi represents bit 1, if described pulse width Mi is in the error range of the half of cycle T 0, determine that square wave corresponding to pulse width Mi represents bit 0.
A kind of method of resolving waveform, comprise: receive sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, and a and b are positive integer; Described sine waveform is sampled, obtain square-wave waveform; Obtain the pulse width Mi between i rising edge and i+1 rising edge in described square-wave waveform, or, obtain the pulse width Ni between i negative edge and i+1 negative edge in described square-wave waveform, wherein i is the positive integer that is less than or equal to the summation of a and b; The each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, obtain comparative result; According to comparative result, determine the bit that square wave corresponding to each pulse width represents; Wherein, according to comparative result, determine the bit that square wave corresponding to each pulse width represents, comprising: if described pulse width Mi equals cycle T 1, the square wave that pulse width Mi is corresponding represents bit 1; If described pulse width Mi equals cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
Wherein, described according to comparative result, determine the bit that square wave corresponding to each pulse width represents, comprise: if the some pulse widths that obtain are not equal to cycle T 1, also be not equal to cycle T 0, judge in the error range of the no cycle T 1 obtaining in advance of described some pulse widths or cycle T 0, if described a certain pulse width Mi is in the error range of cycle T 1, determine that square wave corresponding to described some pulse widths represents bit 1, if described a certain pulse width Mi is in the error range of cycle T 0, determine that square wave corresponding to described some pulse width Mi represents bit 0.
Wherein, after obtaining pulse width Mi or pulse width Ni, before the each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, described method also comprises: judge that pulse width Mi and pulse width Ni are whether between described cycle T 0 and described cycle T 1; If pulse width Mi between described cycle T 0 and described cycle T 1, the pulse width pulse width Ni being used when comparing with cycle T 1 and cycle T 0; If pulse width Ni between described cycle T 0 and cycle T 1, the pulse width pulse width Mi being used when comparing with cycle T 1 and cycle T 0.
A kind of device of resolving waveform, comprise: receiver module, be used for receiving sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, and a and b are positive integer; Sampling module, for described sine waveform is sampled, obtains square-wave waveform; Acquisition module, for obtaining the pulse width Mi between i rising edge of described square-wave waveform and i negative edge, wherein i is the positive integer that is less than or equal to the summation of a and b; Comparison module, compares for the half of cycle T 0 that pulse width Mi and a half-sum of the cycle T 1 of obtaining are in advance obtained in advance, obtains comparative result; Determination module, for according to comparative result, determines the bit that square wave that pulse width Mi is corresponding represents; Wherein, if described determination module equals the half of cycle T 1 for described pulse width Mi, the square wave that pulse width Mi is corresponding represents bit 1; If described pulse width Mi equals the half of cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
Wherein, described determination module, comprising: judging unit, if be not equal to the half of cycle T 1 for described pulse width Mi, also be not equal to the half of cycle T 0, judge that described pulse width Mi is whether in the error range of the half of the cycle T 1 of obtaining in advance or cycle T 0; Determining unit, if be used for described pulse width Mi in the error range of the half of cycle T 1, determine that square wave corresponding to pulse width Mi represents bit 1, if described pulse width Mi in the error range of the half of cycle T 0, determines that square wave corresponding to pulse width Mi represents bit 0.
A kind of device of resolving waveform, comprise: receiver module, be used for receiving sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, and a and b are positive integer; Sampling module, for described sine waveform is sampled, obtains square-wave waveform; Acquisition module, for obtaining the pulse width Mi between i rising edge of described square-wave waveform and i+1 rising edge, or, obtain the pulse width Ni between i negative edge and i+1 negative edge in described square-wave waveform, wherein i is the positive integer that is less than or equal to the summation of a and b; Comparison module, for the each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, obtains comparative result; Determination module, for according to comparative result, determines the bit that square wave corresponding to each pulse width represents; Wherein, if described determination module equals cycle T 1 for described pulse width Mi, the square wave that pulse width Mi is corresponding represents bit 1; If described pulse width Mi equals cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
Wherein, described determination module comprises: judging unit, if be not equal to cycle T 1 for the some pulse widths that obtain, be also not equal to cycle T 0, and judge in the error range of the no cycle T 1 obtaining in advance of described some pulse widths or cycle T 0; Determining unit, if be used for described a certain pulse width Mi in the error range of cycle T 1, determine that square wave corresponding to described some pulse widths represents bit 1, if described a certain pulse width Mi in the error range of cycle T 0, determines that square wave corresponding to described some pulse width Mi represents bit 0.
Wherein, described device also comprises: judge module, for after obtaining pulse width Mi or pulse width Ni, before the each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, judge that pulse width Mi and pulse width Ni are whether between described cycle T 0 and described cycle T 1; Select module, if for pulse width Mi between described cycle T 0 and described cycle T 1, the pulse width pulse width Ni being used when comparing with cycle T 1 and cycle T 0; If pulse width Ni between described cycle T 0 and cycle T 1, the pulse width pulse width Mi being used when comparing with cycle T 1 and cycle T 0.
Embodiment of the method provided by the invention, is representing bit 0 and at 1 o'clock by the waveform of transmission different cycles, the bit of determining that by obtaining the pulse width of square-wave waveform square wave represents, the parsing of realization to waveform.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, can also obtain other accompanying drawings according to these accompanying drawings.
Fig. 1 is the schematic flow sheet that the invention provides a kind of embodiment of the method for resolving waveform;
Fig. 2 is the method schematic diagram of determining bit in the embodiment of the present invention one;
Fig. 3 is the schematic flow sheet that the invention provides another kind of embodiment of the method for resolving waveform;
Fig. 4 is the method schematic diagram of determining bit in the embodiment of the present invention two;
Fig. 5 is the structural representation that the invention provides a kind of device embodiment that resolves waveform;
Fig. 6 is the structural representation that the invention provides the another kind of device embodiment that resolves waveform.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Based on embodiments of the invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to protection scope of the present invention.
Below in conjunction with accompanying drawing, the embodiment of the present invention is described in further detail.
Embodiment mono-
Fig. 1 is the schematic flow sheet that the invention provides a kind of embodiment of the method for resolving waveform.Shown in Fig. 1, embodiment of the method comprises:
Step 101, receive sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, a and b are positive integer.
Wherein, this sine waveform is that mobile terminal sends by audio interface, and intelligent cipher key equipment is connected with mobile terminal by audio interface, realizes the object that receives this sine waveform.This sine waveform comprises the sine wave of two different cycles, represents respectively bit 1 and bit 0.
Step 102, described sine waveform is sampled, obtain square-wave waveform.
Wherein, intelligent cipher key equipment was sampled to the sine waveform receiving according to the local sampling period, according to the sampled result of sampling point position, obtained square-wave waveform.
Step 103, obtain the pulse width Mi between i rising edge and i negative edge in described square-wave waveform, wherein i is the positive integer that is less than or equal to the summation of a and b.
Wherein, the detection of rising edge and negative edge can change to detect by level, and the clock that its pulse width can be used according to waveform determines, and pulse width Mi between i rising edge and i negative edge represents the half of a square-wave cycle.This step, can get the pulse width that number is the summation of a and b.
The half of step 104, cycle T 0 that pulse width Mi and a half-sum of the cycle T 1 of obtaining are in advance obtained in advance compares, and obtains comparative result;
Wherein, cycle T 0 and cycle T 1 are obtained in the following way:
Wherein said square-wave waveform comprises the waveform of test data and the waveform of valid data successively, wherein the represented bit-order of the waveform of test data is consulted in advance, intelligent cipher key equipment can be according to this bit-order, obtain the cycle of bit 0 and bit 1 correspondence in the waveform of test data, again according to the cycle of bit in test data 0 and bit 1 correspondence, obtain the cycle of bit 0 and bit 1 correspondence in described square-wave waveform.
Step 105, according to comparative result, determine the bit that square wave that pulse width Mi is corresponding represents.
Fig. 2 is the method schematic diagram of determining bit in the embodiment of the present invention one.Shown in Fig. 2, flow process comprises:
Step 1051, judge whether described pulse width Mi equals the half of cycle T 1 or the half of cycle T 0;
If described pulse width Mi equals one in the half of a half-sum cycle T 0 of cycle T 1, perform step 1052 and step 1053;
If the described pulse width Mi of step 1052 equals the half of cycle T 1, the square wave that pulse width Mi is corresponding represents bit 1;
If the described pulse width Mi of step 1053 equals the half of cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
If the described pulse width Mi of step 1054 is not equal to the half of cycle T 1, be also not equal to the half of cycle T 0, judge that described pulse width Mi is whether in the error range of the half of the cycle T 1 of obtaining in advance or cycle T 0;
If the described pulse width Mi of step 1055 in the error range of the half of cycle T 1, determines that square wave corresponding to pulse width Mi represents bit 1;
If the described pulse width Mi of step 1056 in the error range of the half of cycle T 0, determines that square wave corresponding to pulse width Mi represents bit 0.
Wherein, this error range is caused by operations such as propagation delay times.In the time that pulse width Mi is not equal to any one value of T0 and T1, by judging that this pulse width whether in the error range allowing, can effectively resolve the bit that square-wave waveform represents, guarantee the complete parsing of square wave.
Embodiment of the method provided by the invention, is representing bit 0 and, to determine by the pulse width Mi obtaining between i rising edge and i negative edge the bit that square wave represents at 1 o'clock the parsing of realization to waveform by the waveform of transmission different cycles.
Embodiment bis-
Fig. 2 is the schematic flow sheet that the invention provides another kind of embodiment of the method for resolving waveform.Shown in Fig. 2, embodiment of the method comprises:
Step 201 and step 202 are identical with step 101 and step 102, repeat no more herein.
Step 203, obtain the pulse width Mi between i rising edge and i+1 rising edge in described square-wave waveform, or, obtain the pulse width Ni between i negative edge and i+1 negative edge in described square-wave waveform, wherein i is the positive integer that is less than or equal to the summation of a and b;
Wherein, the pulse width between the pulse width between two adjacent rising edges or adjacent two negative edges represents a square-wave cycle.This step, can get the pulse width that number is the summation of a and b.Wherein select rising edge or negative edge to depend on the level of the reference position in first cycle of this square-wave waveform, if the level of the reference position in first cycle is rising edge, obtain the pulse width between two adjacent rising edges, if the level of the reference position in first cycle is negative edge, obtain the pulse width between two adjacent negative edges.
Step 204, the each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, obtain comparative result.
Wherein, cycle T 0 and cycle T 1 are obtained in the following way:
Wherein said square-wave waveform comprises the waveform of test data and the waveform of valid data successively, wherein the represented bit-order of the waveform of test data is consulted in advance, intelligent cipher key equipment can be according to this bit-order, obtain the cycle of bit 0 and bit 1 correspondence in the waveform of test data, again according to the cycle of bit in test data 0 and bit 1 correspondence, obtain the cycle of bit 0 and bit 1 correspondence in described square-wave waveform.
Step 205, according to comparative result, determine the bit that square wave corresponding to each pulse width represents.
Fig. 4 is the method schematic diagram of determining bit in the embodiment of the present invention two.Shown in Fig. 4, flow process comprises:
Step 2051, judge whether described pulse width Mi equals the half of cycle T 1 or the half of cycle T 0;
If described pulse width Mi equals one in the half of a half-sum cycle T 0 of cycle T 1, perform step 2052 and step 2053;
If the described pulse width Mi of step 2052 equals cycle T 1, the square wave that pulse width Mi is corresponding represents bit 1;
If the described pulse width Mi of step 2053 equals cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
Step 2054, some pulse widths are not equal to cycle T 1, are also not equal to cycle T 0, judge in the error range of the no cycle T 1 obtaining in advance of described some pulse widths or cycle T 0;
If the described a certain pulse width Mi of step 2055 in the error range of cycle T 1, determines that square wave corresponding to described some pulse widths represents bit 1;
If the described a certain pulse width Mi of step 2056 in the error range of cycle T 0, determines that square wave corresponding to described some pulse width Mi represents bit 0.
Wherein, this error range is caused by operations such as propagation delay times.In the time that pulse width Mi is not equal to any one value of T0 and T1, by judging that this pulse width whether in the error range allowing, can effectively resolve the bit that square-wave waveform represents, guarantee the complete parsing of square wave.
Optionally, after obtaining pulse width Mi or pulse width Ni, before the each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, described method also comprises:
Judge that pulse width Mi and pulse width Ni are whether between described cycle T 0 and described cycle T 1;
If pulse width Mi between described cycle T 0 and described cycle T 1, the pulse width pulse width Ni being used when comparing with cycle T 1 and cycle T 0; If pulse width Ni between described cycle T 0 and cycle T 1, the pulse width pulse width Mi being used when comparing with cycle T 1 and cycle T 0.
Determine for further accurate the pulse width using, by judging that this pulse width whether in these two numerical value, carrys out the pulse width of debug, thereby obtain how correctly obtaining a square-wave cycle, improve decode precision.
Embodiment of the method provided by the invention, is representing bit 0 and at 1 o'clock by the waveform of transmission different cycles, the bit of determining that by obtaining the pulse width of a square-wave cycle square wave represents, the parsing of realization to waveform.Different from embodiment mono-, the present embodiment is to obtain with the pulse width of one-period the bit that square-wave waveform represents, obtains with the pulse width of half period the bit that square-wave waveform represents, definite bit is more accurate.
Embodiment tri-
Fig. 3 is the structural representation of a kind of device embodiment that resolves waveform provided by the invention.Embodiment illustrated in fig. 3 comprising:
Receiver module 301, be used for receiving sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, and a and b are positive integer;
Sampling module 302, is connected with receiver module 301, for described sine waveform is sampled, obtains square-wave waveform;
Acquisition module 303, is connected with sampling module 302, and for obtaining the pulse width Mi between i rising edge of described square-wave waveform and i negative edge, wherein i is the positive integer that is less than or equal to the summation of a and b;
Comparison module 304, is connected with acquisition module 303, compares for the half of cycle T 0 that pulse width Mi and a half-sum of the cycle T 1 of obtaining are in advance obtained in advance, obtains comparative result;
Determination module 305, is connected with comparison module 304, for according to comparative result, determines the bit that square wave that pulse width Mi is corresponding represents;
Wherein, if described determination module equals the half of cycle T 1 for described pulse width Mi, the square wave that pulse width Mi is corresponding represents bit 1; If described pulse width Mi equals the half of cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
Wherein, described determination module 305 comprises:
Judging unit, if be not equal to the half of cycle T 1 for described pulse width Mi, is also not equal to the half of cycle T 0, judges that described pulse width Mi is whether in the error range of the half of the cycle T 1 of obtaining in advance or cycle T 0;
Determining unit, if be used for described pulse width Mi in the error range of the half of cycle T 1, determine that square wave corresponding to pulse width Mi represents bit 1, if described pulse width Mi in the error range of the half of cycle T 0, determines that square wave corresponding to pulse width Mi represents bit 0.
Certainly, above-mentioned Module Division just a kind of signal is divided, and the present invention is not limited thereto.This intelligent cipher key equipment can also only comprise: receiver module, acquisition module, acquisition module, comparison module and determination module; receiver module is carried out and is received relevant function; acquisition module is carried out and is gathered relevant function; acquisition module is carried out the function relevant to obtaining data etc.; comparison module is carried out and is carried out to more relevant function and determination module and determine relevant function; as long as can realize the Module Division of object of the present invention, all should belong to protection scope of the present invention.
Embodiment of the method provided by the invention, is representing bit 0 and, to determine by the pulse width Mi obtaining between i rising edge and i negative edge the bit that square wave represents at 1 o'clock the parsing of realization to waveform by the waveform of transmission different cycles.
Embodiment tetra-
Fig. 4 is the structural representation of the another kind of device embodiment that resolves waveform provided by the invention.Embodiment illustrated in fig. 4 comprising:
Receiver module 401, be used for receiving sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, and a and b are positive integer;
Sampling module 402, for described sine waveform is sampled, obtains square-wave waveform;
Acquisition module 403, for obtaining the pulse width Mi between i rising edge of described square-wave waveform and i+1 rising edge, or, obtain the pulse width Ni between i negative edge and i+1 negative edge in described square-wave waveform, wherein i is the positive integer that is less than or equal to the summation of a and b;
Comparison module 404, for the each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, obtains comparative result;
Determination module 405, for according to comparative result, determines the bit that square wave corresponding to each pulse width represents.
Wherein, described determination module 405 comprises:
Judging unit, if be not equal to cycle T 1 for the some pulse widths that obtain, is also not equal to cycle T 0, judges in the error range of the no cycle T 1 obtaining in advance of described some pulse widths or cycle T 0;
Determining unit, if be used for described a certain pulse width Mi in the error range of cycle T 1, determine that square wave corresponding to described some pulse widths represents bit 1, if described a certain pulse width Mi in the error range of cycle T 0, determines that square wave corresponding to described some pulse width Mi represents bit 0;
Wherein, if described determination module equals cycle T 1 for described pulse width Mi, the square wave that pulse width Mi is corresponding represents bit 1; If described pulse width Mi equals cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
Wherein, described device also comprises:
Judge module, with described for after obtaining pulse width Mi or pulse width Ni, before the each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, judge that pulse width Mi and pulse width Ni are whether between described cycle T 0 and described cycle T 1;
Select module, if for pulse width Mi between described cycle T 0 and described cycle T 1, the pulse width pulse width Ni being used when comparing with cycle T 1 and cycle T 0; If pulse width Ni between described cycle T 0 and cycle T 1, the pulse width pulse width Mi being used when comparing with cycle T 1 and cycle T 0.
Certainly, above-mentioned Module Division just a kind of signal is divided, and the present invention is not limited thereto.This intelligent cipher key equipment can also only comprise: receiver module, acquisition module, acquisition module, comparison module and determination module; receiver module is carried out and is received relevant function; acquisition module is carried out and is gathered relevant function; acquisition module is carried out the function relevant to obtaining data etc.; comparison module is carried out and is carried out to more relevant function and determination module and determine relevant function; as long as can realize the Module Division of object of the present invention, all should belong to protection scope of the present invention.
Embodiment of the method provided by the invention, is representing bit 0 and at 1 o'clock by the waveform of transmission different cycles, the bit of determining that by obtaining the pulse width of a square-wave cycle square wave represents, the parsing of realization to waveform.Different from embodiment tri-, the present embodiment is to obtain with the pulse width of one-period the bit that square-wave waveform represents, obtains with the pulse width of half period the bit that square-wave waveform represents, definite bit is more accurate.
Any process of otherwise describing in process flow diagram or at this or method are described and can be understood to, represent to comprise that one or more is for realizing module, fragment or the part of code of executable instruction of step of specific logical function or process, and the scope of the preferred embodiment of the present invention comprises other realization, wherein can be not according to order shown or that discuss, comprise according to related function by the mode of basic while or by contrary order, carry out function, this should be understood by embodiments of the invention person of ordinary skill in the field.
Should be appreciated that each several part of the present invention can realize with hardware, software, firmware or their combination.In the above-described embodiment, multiple steps or method can realize with being stored in software or the firmware carried out in storer and by suitable instruction execution system.For example, if realized with hardware, the same in another embodiment, can realize by any one in following technology well known in the art or their combination: there is the discrete logic for data-signal being realized to the logic gates of logic function, there is the special IC of suitable combinational logic gate circuit, programmable gate array (PGA), field programmable gate array (FPGA) etc.
Those skilled in the art are appreciated that realizing all or part of step that above-described embodiment method carries is can carry out the hardware that instruction is relevant by program to complete, described program can be stored in a kind of computer-readable recording medium, this program, in the time carrying out, comprises step of embodiment of the method one or a combination set of.
In addition, the each functional unit in each embodiment of the present invention can be integrated in a processing module, can be also that the independent physics of unit exists, and also can be integrated in a module two or more unit.Above-mentioned integrated module both can adopt the form of hardware to realize, and also can adopt the form of software function module to realize.If described integrated module realizes and during as production marketing independently or use, also can be stored in a computer read/write memory medium using the form of software function module.
The above-mentioned storage medium of mentioning can be ROM (read-only memory), disk or CD etc.
In the description of this instructions, the description of reference term " embodiment ", " some embodiment ", " example ", " concrete example " or " some examples " etc. means to be contained at least one embodiment of the present invention or example in conjunction with specific features, structure, material or the feature of this embodiment or example description.In this manual, the schematic statement of above-mentioned term is not necessarily referred to identical embodiment or example.And specific features, structure, material or the feature of description can be with suitable mode combination in any one or more embodiment or example.
Although illustrated and described embodiments of the invention above, be understandable that, above-described embodiment is exemplary, can not be interpreted as limitation of the present invention, those of ordinary skill in the art can change above-described embodiment within the scope of the invention in the situation that not departing from principle of the present invention and aim, modification, replacement and modification.Scope of the present invention is by claims and be equal to and limit.

Claims (10)

1. a method of resolving waveform, is characterized in that, comprising:
Receive sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, a and b are positive integer;
Described sine waveform is sampled, obtain square-wave waveform;
Obtain the pulse width Mi between i rising edge and i negative edge in described square-wave waveform, wherein i is the positive integer that is less than or equal to the summation of a and b;
The half of the cycle T 0 that pulse width Mi and a half-sum of the cycle T 1 of obtaining are in advance obtained in advance compares, and obtains comparative result;
According to comparative result, determine the bit that square wave that pulse width Mi is corresponding represents;
Wherein, according to comparative result, determine the bit that square wave that pulse width Mi is corresponding represents, comprising:
If described pulse width Mi equals the half of cycle T 1, the square wave that pulse width Mi is corresponding represents bit 1; If described pulse width Mi equals the half of cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
2. method according to claim 1, is characterized in that, described according to comparative result, determines the bit that the square wave of pulse width Mi represents, comprising:
If described pulse width Mi is not equal to the half of cycle T 1, also be not equal to the half of cycle T 0, judge that described pulse width Mi is whether in the error range of the half of the cycle T 1 of obtaining in advance or cycle T 0, if described pulse width Mi is in the error range of the half of cycle T 1, determine that square wave corresponding to pulse width Mi represents bit 1, if described pulse width Mi in the error range of the half of cycle T 0, determines that square wave corresponding to pulse width Mi represents bit 0.
3. a method of resolving waveform, is characterized in that, comprising:
Receive sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, a and b are positive integer;
Described sine waveform is sampled, obtain square-wave waveform;
Obtain the pulse width Mi between i rising edge and i+1 rising edge in described square-wave waveform, or, obtain the pulse width Ni between i negative edge and i+1 negative edge in described square-wave waveform, wherein i is the positive integer that is less than or equal to the summation of a and b;
The each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, obtain comparative result;
According to comparative result, determine the bit that square wave corresponding to each pulse width represents;
Wherein, according to comparative result, determine the bit that square wave corresponding to each pulse width represents, comprising:
If described pulse width Mi equals cycle T 1, the square wave that pulse width Mi is corresponding represents bit 1; If described pulse width Mi equals cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
4. method according to claim 3, is characterized in that, described according to comparative result, determines the bit that square wave corresponding to each pulse width represents, comprising:
If the some pulse widths that obtain are not equal to cycle T 1, also be not equal to cycle T 0, judge in the error range of the no cycle T 1 obtaining in advance of described some pulse widths or cycle T 0, if described a certain pulse width Mi is in the error range of cycle T 1, determine that square wave corresponding to described some pulse widths represents bit 1, if described a certain pulse width Mi in the error range of cycle T 0, determines that square wave corresponding to described some pulse width Mi represents bit 0.
5. method according to claim 3, it is characterized in that, after obtaining pulse width Mi or pulse width Ni, before the each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, described method also comprises:
Judge that pulse width Mi and pulse width Ni are whether between described cycle T 0 and described cycle T 1;
If pulse width Mi between described cycle T 0 and described cycle T 1, the pulse width pulse width Ni being used when comparing with cycle T 1 and cycle T 0; If pulse width Ni between described cycle T 0 and cycle T 1, the pulse width pulse width Mi being used when comparing with cycle T 1 and cycle T 0.
6. a device of resolving waveform, is characterized in that, comprising:
Receiver module, be used for receiving sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, and a and b are positive integer;
Sampling module, for described sine waveform is sampled, obtains square-wave waveform;
Acquisition module, for obtaining the pulse width Mi between i rising edge of described square-wave waveform and i negative edge, wherein i is the positive integer that is less than or equal to the summation of a and b;
Comparison module, compares for the half of cycle T 0 that pulse width Mi and a half-sum of the cycle T 1 of obtaining are in advance obtained in advance, obtains comparative result;
Determination module, for according to comparative result, determines the bit that square wave that pulse width Mi is corresponding represents;
Wherein, if described determination module equals the half of cycle T 1 for described pulse width Mi, the square wave that pulse width Mi is corresponding represents bit 1; If described pulse width Mi equals the half of cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
7. device according to claim 6, is characterized in that, described determination module, comprising:
Judging unit, if be not equal to the half of cycle T 1 for described pulse width Mi, is also not equal to the half of cycle T 0, judges that described pulse width Mi is whether in the error range of the half of the cycle T 1 of obtaining in advance or cycle T 0;
Determining unit, if be used for described pulse width Mi in the error range of the half of cycle T 1, determine that square wave corresponding to pulse width Mi represents bit 1, if described pulse width Mi in the error range of the half of cycle T 0, determines that square wave corresponding to pulse width Mi represents bit 0.
8. a device of resolving waveform, is characterized in that, comprising:
Receiver module, be used for receiving sine waveform, wherein said sine waveform comprise that a cycle is Ta for represent that the sine wave of bit 0 and b cycle are Tb for representing the sine wave of bit 1, wherein, cycle T a and cycle T b are unequal, and a and b are positive integer;
Sampling module, for described sine waveform is sampled, obtains square-wave waveform;
Acquisition module, for obtaining the pulse width Mi between i rising edge of described square-wave waveform and i+1 rising edge, or, obtain the pulse width Ni between i negative edge and i+1 negative edge in described square-wave waveform, wherein i is the positive integer that is less than or equal to the summation of a and b;
Comparison module, for the each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, obtains comparative result;
Determination module, for according to comparative result, determines the bit that square wave corresponding to each pulse width represents;
Wherein, if described determination module equals cycle T 1 for described pulse width Mi, the square wave that pulse width Mi is corresponding represents bit 1; If described pulse width Mi equals cycle T 0, the square wave that pulse width Mi is corresponding represents bit 0.
9. device according to claim 8, is characterized in that, described determination module comprises:
Judging unit, if be not equal to cycle T 1 for the some pulse widths that obtain, is also not equal to cycle T 0, judges in the error range of the no cycle T 1 obtaining in advance of described some pulse widths or cycle T 0;
Determining unit, if be used for described a certain pulse width Mi in the error range of cycle T 1, determine that square wave corresponding to described some pulse widths represents bit 1, if described a certain pulse width Mi in the error range of cycle T 0, determines that square wave corresponding to described some pulse width Mi represents bit 0.
10. device according to claim 8, is characterized in that, described device also comprises:
Judge module, for after obtaining pulse width Mi or pulse width Ni, before the each pulse width obtaining is compared with the cycle T 1 of obtaining in advance and the cycle T 0 obtained in advance respectively, judge that pulse width Mi and pulse width Ni are whether between described cycle T 0 and described cycle T 1;
Select module, if for pulse width Mi between described cycle T 0 and described cycle T 1, the pulse width pulse width Ni being used when comparing with cycle T 1 and cycle T 0; If pulse width Ni between described cycle T 0 and cycle T 1, the pulse width pulse width Mi being used when comparing with cycle T 1 and cycle T 0.
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