CN103582946B - 具有到封装表面的线键合的封装堆叠组件 - Google Patents

具有到封装表面的线键合的封装堆叠组件 Download PDF

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Publication number
CN103582946B
CN103582946B CN201280021639.7A CN201280021639A CN103582946B CN 103582946 B CN103582946 B CN 103582946B CN 201280021639 A CN201280021639 A CN 201280021639A CN 103582946 B CN103582946 B CN 103582946B
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line bonding
substrate
bonding
encapsulated layer
line
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CN201280021639.7A
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CN103582946A (zh
Inventor
佐藤弘明
康泽圭
贝尔加桑·哈巴
菲利普·R·奥斯本
王纬舜
埃利斯·周
伊利亚斯·穆罕默德
增田纪仁
佐久间和夫
桥本清彰
黑泽太郎
菊池智行
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Adeia Semiconductor Solutions LLC
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Tessera LLC
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Abstract

一种微电子组件(210)，包括具有第一表面(214)和远离第一表面(214)的第二表面(216)的衬底(212)。微电子元件(222)覆盖第一表面(214)，第一导电元件(228)暴露在第一表面(214)和第二表面(222)的一个处。第一导电元件(228)的一些与微电子元件(222)电连接。线键合(232)具有与导电元件(228)接合的基区(234)以及远离衬底(212)和基区(234)的端表面(238)，每个线键合(232)限定在基区(234)和端表面(238)之间延伸的边缘表面(237)。封装层(242)从第一表面(214)延伸并填充线键合(232)之间的空间，以便通过封装层(242)分离线键合(232)。通过未被封装层(242)覆盖的线键合的端表面(238)的至少部分限定线键合(232)的未封装部分。

Description

具有到封装表面的线键合的封装堆叠组件
相关申请的交叉引用
本申请要求2011年5月3日提交的韩国专利申请No.10-2011-0041843的优先权，其公开内容通过引用并入本文。
背景技术
微电子装置例如半导体芯片典型地需要与其他电子部件的很多输入和输出连接。半导体芯片或其他可比装置的输入和输出触点通常设置在基本覆盖装置表面(常称作“区域阵列”)的网格状图案、或者在可能与装置的前表面的每个边缘平行且邻近延伸的细长行、或者在前表面的中心。典型地，装置如芯片必须物理地安装在衬底如印刷电路板上，装置的触点必须与电路板的导电特征电连接。
半导体芯片通常设在封装中，封装便于在制造期间和在将芯片安装到外部衬底如电路板或其他线路板上时操作芯片。例如，很多半导体芯片设在适于表面安装的封装中。已经提出用于各种应用的许多这种通用类型的封装。更通常地，这种封装包括通常称作“芯片载体”的介质元件，端子作为电镀或刻蚀金属结构形成在介质元件上。这些端子典型地通过特征(例如沿芯片载体自身延伸的薄迹线)以及在芯片的触点与端子或迹线之间延伸的细引线或导线与芯片自身的触点相连。在表面安装操作中，将封装放置到电路板上，以便封装上的每个端子与电路板上的相应触点焊盘对齐。在端子和触点焊盘之间提供焊锡或其他键合材料。通过加热组件以熔化或“回流”焊锡或以其他方式活化键合材料可以将封装永久地键合在合适的位置。
许多封装包括焊球形式的、附接至封装的端子的焊料块，直径典型地约0.1mm和约0.8mm(5和30mils)。具有从它的底部表面突出的焊球阵列的封装通常称作球栅阵列或“BGA”封装。称作连接盘网格阵列或“LGA”封装的其他封装通过由焊锡形成的薄层或连接盘(land)紧固至衬底。这种类型的封装可以是相当紧凑的。通常称作“芯片级封装”的某些封装占据电路板的面积等于或者仅仅稍大于包含在封装中的装置的面积。这是有利的，因为它减小组件的总尺寸并允许使用衬底上的各种装置之间的短互连，这又限制装置之间的信号传播时间，由此帮助组件的高速操作。
封装半导体芯片通常设成“堆叠”布置，其中一个封装设在例如电路板上，另一个封装安装在第一封装上。这些布置可以允许将多个不同的芯片安装在电路板上的单个覆盖区内，并且通过提供封装之间的短互连可以进一步地帮助高速操作。经常地，这个互连距离仅仅稍大于芯片自身的厚度。为了在芯片封装的堆叠内实现互连，必须在每个封装(除了最顶部封装之外)的两侧上设置用于机械连接和电连接的结构。这已经通过例如在安装芯片的衬底的两侧上设置触点焊盘或连接盘而实现，焊盘通过导电通孔等穿过衬底连接。已经使用焊球等桥接下层衬底的顶部上的触点与邻近的上层衬底的底部上的触点之间的间隙。焊球必须比芯片的高度高，以便连接触点。在美国专利申请公开No.2010/0232129(“’129公开”)中提供了堆叠芯片布置和互连结构的示例，其全部公开内容通过引用并入本文。
延长的接线柱或管脚形式的微触点元件可以用于微电子封装和电路板的连接以及用于微电子封装中的其他连接。在一些情况下，已经通过刻蚀包括一个或多个金属层的金属结构来形成微触点。刻蚀工艺限制微触点的大小。常规的刻蚀工艺典型地不能够形成具有高度与最大宽度之间的大比例(本文称作“高宽比”)的微触点。难以或者不可能形成具有相当大的高度和相邻微触点之间的非常小的间距或间隔的微触点阵列。而且，通过常规的刻蚀工艺形成的微触点的配置是受限的。
除了本领域的上述所有进展之外，制造和测试微电子封装的进一步改进仍是可期望的。
发明内容
本发明的一个实施例涉及一种微电子封装。所述微电子封装包括衬底，所述衬底具有第一区域、第二区域、第一表面和远离所述第一表面的第二表面。至少一个微电子元件覆盖所述第一区域内的所述第一表面。导电元件暴露在所述第二区域内的所述衬底的所述第一表面和所述第二表面的至少一个处，且所述导电元件的至少一些与所述至少一个微电子元件电连接。微电子封装进一步包括线键合，所述线键合具有与相应的所述导电元件接合的基区以及远离所述衬底和所述基区的端表面，每个线键合限定在其所述基区和所述端表面之间延伸的边缘表面。介质封装层从所述第一表面或第二表面的至少一个延伸并填充所述线键合之间的空间，以便通过所述封装层将所述线键合彼此分离。所述封装层至少覆盖所述衬底的所述第二区域，且通过未被所述封装层覆盖的所述线键合的所述端表面的至少部分限定所述线键合的未封装部分。所述衬底可以是引线框架，所述导电元件可以是所述引线框架的引线。
可以通过未被所述封装层覆盖的所述线键合的所述端表面和邻近所述端表面的所述边缘表面的部分限定所述线键合的未封装部分。可以包括氧化保护层，所述氧化保护层接触所述线键合的所述未封装部分的至少一些。邻近所述线键合的所述端表面的至少一个所述线键合的至少一部分可以与所述封装层的表面基本垂直。所述导电元件可以是第一导电元件，所述微电子封装可以进一步包括与所述线键合的所述未封装部分电连接的多个第二导电元件。在这种实施例中，所述第二导电元件可以不接触所述第一导电元件。所述第二导电元件可以包括与至少一些所述第一线键合的所述端表面接合的多个钉头凸点。
至少一个所述线键合可以沿其所述基区和所述未封装部分之间的大体直的线延伸，所述大体直的线可以相对于所述衬底的所述第一表面形成小于90°的角度。额外地或可选地，所述至少一个线键合的所述边缘表面可以具有邻近所述端表面的第一部分以及通过所述第一部分与所述端表面分离的第二部分，所述第一部分可以沿远离所述第二部分延伸方向的方向延伸。
本发明的另一个实施例涉及一种可选的微电子封装。这种微电子封装包括衬底，所述衬底具有第一区域、第二区域、第一表面和远离所述第一表面的第二表面。至少一个微电子元件覆盖所述第一区域内的所述第一表面。导电元件暴露在所述第二区域内的所述衬底的所述第一表面和所述第二表面的至少一个处，所述导电元件的至少一些与所述至少一个微电子元件电连接。所述微电子封装进一步包括多个线键合，所述多个线键合具有与相应的所述导电元件接合的基区以及远离所述衬底和所述基区的端表面。每个线键合限定在其所述基区和所述端表面之间延伸的边缘表面。介质封装层从所述第一表面或第二表面的至少一个延伸并填充所述线键合之间的空间，以便通过所述封装层将所述线键合彼此分离。所述封装层至少覆盖所述衬底的所述第二区域，且通过未被所述封装层覆盖的邻近所述线键合的所述端表面的所述边缘表面的至少部分限定所述线键合的未封装部分。
所述封装层可以是通过在形成所述线键合之后在所述第一衬底上沉积介质材料，然后固化所述沉积的介质材料而形成在所述衬底上的单片层。所述单片封装层的形成可以包括成型所述介质材料。
可以通过未被所述封装层覆盖的所述端表面的至少一部分进一步限定所述未封装部分的至少一个。未被所述封装层覆盖的所述边缘表面的部分可以具有在与所述封装层的所述表面基本平行的方向上延伸的最长尺寸。未被所述封装层覆盖且基本平行于所述封装层的表面延伸的所述边缘表面的部分的长度可以大于所述线键合的横截面宽度。
在上述实施例的任一个中，所述衬底的所述第一表面可以在第一横向方向和第二横向方向上延伸，每个横向方向与所述第一表面和第二表面之间的所述衬底的厚度方向横切。至少一个所述线键合的所述未封装部分可以进一步在至少一个所述横向方向上从与所述至少一个线键合接合的所述导电元件移动。所述线键合的至少一个可以包括其所述基区和所述端表面之间的基本弯曲的部分。所述至少一个线键合的所述未封装部分可以覆盖所述微电子元件的主要表面。
在上述实施例的任一个中，焊球可以与所述至少一个线键合的所述未封装部分接合。
额外地，在上述实施例的任一个中，所述封装层可以包括至少一个表面，且所述线键合的所述未封装部分可以不被在所述至少一个表面的一个处的所述封装层覆盖。所述至少一个表面可以包括与所述衬底的所述第一表面基本平行的主要表面，所述至少一个线键合的所述未封装部分可以不被所述主要表面处的所述封装层覆盖。所述至少一个线键合的所述未封装部分可以与所述主要表面基本平齐。可选地，所述至少一个线键合的所述未封装部分可以在所述主要表面上延伸。所述至少一个表面可以包括距所述衬底的所述第一表面第一距离处的主要表面以及距所述衬底的第一表面第二距离处的凹表面，所述第二距离小于所述第一距离，所述至少一个线键合的所述未封装部分不被所述凹表面处的所述封装层覆盖。所述至少一个表面可以进一步包括以与所述衬底的所述第一表面成实质角度、远离所述衬底的所述第一表面延伸的侧表面，所述至少一个线键合的所述未封装部分不被所述侧表面处的所述封装层覆盖。所述封装层可以具有形成在其中、从所述封装层的表面朝所述衬底延伸的腔体，且一个所述线键合的所述未封装部分可以设置在所述腔体内。
进一步地，在上述实施例的任一个中，所述线键合可以基本由选自由铜、金、铝和焊锡组成的组中的至少一种材料组成。所述至少一个线键合可以限定沿其长度的纵向轴线，每个线键合可以包括第一材料的内层和第二材料的外层，所述内层沿所述纵向轴线延伸，所述外层远离所述纵向轴线且具有在所述线键合的纵向方向上延伸的长度。在这种实施例中，所述第一材料可以是铜、金、镍和铝中的一种，所述第二材料可以是铜、金、镍、铝和焊锡中的一种。
在上述实施例的任一个中，所述多个线键合可以是第一线键合，所述微电子封装可以进一步包括至少一个第二线键合，所述至少一个第二线键合具有与所述微电子元件上的触点接合的基区以及远离所述触点的端表面。所述至少一个第二线键合可以限定在所述基区和所述端表面之间延伸的边缘表面，且可以通过未被所述封装层覆盖的所述第二线键合的端表面或所述第二线键合的所述边缘表面中的至少一个的一部分限定所述至少一个第二线键合的未封装部分。所述至少一个微电子元件可以是第一微电子元件，所述微电子封装可以进一步包括至少部分地覆盖所述第一微电子元件的至少一个第二微电子元件。在这种实施例中，所述线键合可以是第一线键合，所述微电子封装可以具有至少一个第二线键合，所述至少一个第二线键合具有与所述微电子元件上的触点接合的基区以及远离所述触点的端表面。所述至少一个第二线键合可以限定在所述基区和所述端表面之间的边缘表面，且可以通过未被所述封装层覆盖的所述第二线键合的所述端表面的一部分或所述第二线键合的所述边缘表面的一部分中的至少一个限定所述第二线键合的未封装部分。
在上述实施例的任一个中，所述线键合的第一个可以适于承载第一信号电势，所述线键合的第二个可以适于同时承载与所述第一信号电势不同的第二信号电势。
上述实施例的任一个可以进一步包括沿所述封装层的表面延伸的再分布层。所述再分布层可以包括再分布衬底，所述再分布衬底具有邻近所述封装层的主要表面的第一表面，所述再分布层可以进一步包括远离所述第一表面的第二表面、第一导电焊盘和第二导电焊盘，所述第一导电焊盘暴露在所述再分布衬底的所述第一表面上且与所述线键合的各个未封装部分对齐及机械连接，所述第二导电焊盘暴露在所述衬底的第二表面上且与所述第一导电焊盘电连接。
在进一步实施例中，一种微电子组件可以包括根据上述实施例的任一个的第一微电子封装。所述组件可以进一步包括第二微电子封装，所述第二微电子封装包括具有第一表面和第二表面的衬底。第二微电子元件可以安装至所述第一表面，触点焊盘可以暴露在所述第二表面处且与所述第二微电子元件电连接。所述第二微电子封装可以安装至所述第一微电子封装，以便所述第二微电子封装的所述第二表面覆盖所述介质封装层的所述表面的至少一部分，以及以便所述触点焊盘的至少一些与所述线键合的所述未封装部分的至少一些电连接和机械连接。
本发明的另一个实施例可以涉及一种微电子封装，所述微电子封装包括衬底，所述衬底具有第一区域、第二区域、第一表面和远离所述第一表面且沿横向方向延伸的第二表面。微电子元件覆盖所述第一区域内的所述第一表面且具有远离所述衬底的主要表面。导电元件暴露在所述第二区域内的所述衬底的所述第一表面处，所述导电元件的至少一些与所述微电子元件电连接。所述微电子封装进一步包括线键合，所述线键合具有与所述第一导电元件的每一个接合的基区以及远离所述衬底和所述基区的端表面。每个线键合限定在其所述基区和所述端表面之间延伸的边缘表面。介质封装层从所述第一表面或第二表面的至少一个延伸并填充所述线键合之间的空间，以便通过所述介质层将所述线键合彼此分离。所述封装层至少覆盖所述衬底的第二区域，且通过未被所述封装层覆盖的所述线键合的所述端表面的至少部分限定所述线键合的未封装部分。至少一个线键合的未封装部分在沿所述第一表面的至少一个横向方向上从与所述至少一个线键合接合的所述导电元件移动，以便其所述未封装部分覆盖所述微电子元件的所述主要表面。
所述导电元件可以布置成第一预定配置的第一阵列，所述线键合的所述未封装部分可以布置成与所述第一预定配置不同的第二预定配置的第二阵列。所述第一预定配置可以以第一间距为特征，所述第二配置可以以比所述第一间距精细的第二间距为特征。绝缘层可以在所述微电子元件的至少一个表面上延伸。所述绝缘层可以设置在所述微电子元件的所述表面和具有覆盖所述微电子元件的所述主要表面的未封装部分的所述至少一个线键合之间。相应的所述线键合的多个所述未封装部分覆盖所述微电子元件的所述主要表面。
根据本发明实施例的微电子组件可以包括根据上面描述的第一微电子封装。所述组件可以进一步包括第二微电子封装，所述第二微电子封装包括具有第一表面和第二表面的衬底、附接在所述第一表面上的微电子元件、以及暴露在所述第二表面上且与所述微电子元件电连接的触点焊盘。所述第二微电子封装可以附接在所述第一微电子封装上，以便所述第二封装的所述第二表面覆盖所述介质层的所述表面的至少一部分，以及以便所述触点焊盘的至少一些与所述线键合的所述未封装部分的至少一些电连接和机械连接。
所述第一微电子封装的导电元件可以布置成第一预定配置的第一阵列，所述第二微电子封装的所述触点焊盘可以布置成与所述第一预定配置不同的第二预定配置的第二阵列。所述第一微电子封装的所述线键合的所述未封装部分的至少一些可以布置成与所述第二预定配置相对应的第三阵列。所述第一预定配置可以以第一间距为特征，所述第二配置可以以比所述第一间距更精细的第二间距为特征。
本发明的进一步实施例可以涉及一种制造微电子封装的方法。所述方法包括在加工中的单元(in-process unit)上形成介质封装层。所述加工中的单元包括衬底、微电子元件和多个导电元件，所述衬底具有第一表面和远离所述第一表面的第二表面，所述微电子元件安装至所述衬底的所述第一表面，所述多个导电元件暴露在所述第一表面处。所述导电元件的至少一些与所述微电子元件电连接。所述加工中的单元进一步包括线键合，所述线键合具有与所述导电元件接合的基区和远离所述基区的端表面。每个线键合限定在所述基区和所述端表面之间延伸的边缘表面。所述封装层被形成为至少部分地覆盖所述第一表面和部分的所述线键合，由此通过未被所述封装层覆盖的所述线键合的所述端表面或所述边缘表面的至少一个的一部分限定所述线键合的未封装部分。所述加工中的单元的所述衬底可以是引线框架，所述导电元件可以是所述引线框架的引线。可以在所述至少一个线键合的所述未封装部分上形成钉头凸点。可以在所述至少一个线键合的所述未封装部分上沉积焊球。
所述形成所述封装层的步骤可以包括：在所述第一表面和基本所有的线键合上沉积介质材料；以及移除所述介质材料块的一部分以暴露所述线键合的部分，从而限定所述线键合的所述未封装部分。在一个变型中，所述线键合的至少一个可以沿与至少两个所述导电元件的每个接合的环延伸。所述介质材料块可以沉积成至少部分地覆盖所述第一表面和至少一个线键合环，以及移除所述介质材料块的一部分可以进一步包括移除所述至少一个线键合环的一部分以将所述至少一个线键合环切断成具有未被所述封装层覆盖的各自的自由端的第一线键合和第二线键合，从而形成所述线键合的未封装部分。可以通过以下步骤形成所述环：将导线的第一端与所述导电元件接合；朝远离所述第一表面的方向拉所述导线；然后在沿所述第一表面的至少一个横向方向上拉所述导线；然后将所述导线拉到所述第二导电元件，以及将所述导线与所述第二导电元件接合。
可以通过以下步骤在所述加工中的单元上形成所述封装层：从远离所述衬底的位置挤压所述线键合上的介质材料块以使其与所述衬底的所述第一表面接触，以便所述线键合的至少一个穿透所述介质材料块。所述线键合可以由基本由金、铜、铝或焊锡组成的导线制成。所述第一线键合可以包括铝，所述线键合可以通过楔形焊接与所述导电元件接合。所述形成所述封装层的步骤可以额外地或可选地包括形成从所述封装层的主要表面朝所述衬底延伸的至少一个腔体，所述至少一个腔体围绕所述一个所述线键合的所述未封装部分。可以在将介质封装材料沉积到所述衬底上之后，通过湿法刻蚀、干法刻蚀或激光刻蚀所述封装材料的至少一个形成所述至少一个腔体。可以进一步地通过以下的步骤形成所述至少一个腔体：在将介质封装材料沉积到所述衬底和所述至少一个线键合上之后，从所述至少一个线键合的预定位置移除牺牲材料的块的至少一部分。所述形成所述封装层的步骤可以被实施为牺牲材料的块的一部分暴露在所述封装层的主要表面上，所述牺牲材料的块的暴露部分围绕邻近其自由端的线键合的部分并将所述封装层的一部分与所述线键合的所述部分间隔开。所述线键合的至少一个可以限定沿其长度的纵向轴线，每个线键合可以包括第一材料的内层和由所述牺牲材料的块形成的外层，所述内层沿所述纵向轴线延伸，所述外层远离所述纵向轴线并具有沿所述线键合的纵向方向延伸的长度。可以移除所述牺牲材料的块的第一部分以形成所述腔体，所述牺牲材料的块的第二部分保持邻近所述基区。
所述衬底的所述第一表面可以沿横向方向延伸，至少一个所述线键合的未封装部分可以被形成为所述线键合的端表面在至少一个所述横向方向上从与所述至少一个线键合接合的所述导电元件移动。由此，形成所述加工中的单元可以包括形成这样的线键合的步骤：所述线键合的至少一个包括定位在所述导电元件和所述至少一个线键合的所述端表面之间的基本弯曲的段。
在进一步的变型中，所述衬底可以包括第一区域和第二区域，所述微电子元件可以覆盖所述第一区域且可以具有远离所述衬底的主要表面。所述第一导电元件可以设置在所述第二区域内，形成所述加工中的单元可以包括形成这样的线键合的步骤：至少一个所述线键合的至少一部分在所述微电子元件的所述主要表面上延伸。
所述线键合可以限定沿其长度的纵向轴线，所述线键合包括第一材料的内层和第二材料的外层，所述内层沿所述纵向轴线延伸，所述外层远离所述纵向轴线并沿所述线键合的长度延伸。在这种变型中，所述第一材料可以是铜，所述第二材料可以是焊锡。在形成所述封装层的步骤之后可以移除所述第二材料的一部分以形成从介质层的表面延伸的腔体，从而暴露所述线键合的所述内层的所述边缘表面的一部分。
本发明的进一步实施例涉及一种微电子封装，所述微电子封装包括具有第一区域和第二区域的衬底，所述衬底具有第一表面和远离所述第一表面的第二表面。至少一个微电子元件覆盖所述第一区域内的所述第一表面，导电元件暴露在所述第二区域内的所述衬底的所述第一表面处，所述导电元件的至少一些与所述至少一个微电子元件电连接。所述微电子封装进一步包括多个键合元件，每个键合元件具有第一基区、第二基区和在所述基区之间延伸的边缘表面，所述第一基区与所述导电元件的一个接合。所述边缘表面包括远离所述触点焊盘延伸到远离所述衬底的所述边缘表面的顶点的第一部分。所述边缘表面进一步包括从所述顶点延伸到所述第二基区的第二部分，所述第二部分与所述衬底的特征接合。介质封装层从所述第一表面或第二表面的至少一个延伸并填充所述键合元件的所述第一部分和第二部分之间的空间以及所述多个键合元件之间的空间，以便通过所述封装层将所述键合元件彼此分离。所述封装层至少覆盖所述衬底的所述第二区域。通过围绕未被所述封装层覆盖的键合元件的顶点的所述键合元件的边缘表面的至少部分限定所述键合元件的未封装部分。
在上述实施例的变型中，所述键合元件是线键合。在这种变型中，与所述衬底的所述第二基区接合的所述衬底的特征是与所述第一基区接合的所述导电元件。可选地，与所述第二基区接合的所述衬底的特征可以是不同于与所述第一基区接合的所述导电元件的单独的导电元件。与所述第二基区接合的这种导电元件可以不与所述微电子元件电连接。在可选变型中，所述键合元件是键合带。在这种变型中，所述第一基区的一部分可以沿所述各个触点焊盘的一部分延伸，与所述第二基区接合的所述特征可以是沿所述各个触点焊盘的一部分延伸的所述第一基区的长度。
在该实施例中，所述衬底的所述第一表面可以沿第一横向方向和第二横向方向延伸，每个横向方向与所述第一表面和第二表面之间的所述衬底的厚度方向横切。至少一个所述线键合的所述未封装部分可以在至少一个所述横向方向上从与所述至少一个线键合接合的所述导电元件移动。进一步地，所述至少一个线键合的所述未封装部分覆盖所述微电子元件的主要表面。
本发明的进一步实施例可以涉及一种制造微电子组件的方法。这个实施例的方法可以包括将根据上述实施例制造的第一微电子封装与第二微电子封装接合，所述第二微电子封装可以包括具有第一表面的衬底和暴露在所述衬底的所述第一表面处的多个触点，将所述第一微电子封装与所述第二微电子封装接合可以包括将所述第一微电子封装的所述线键合的所述未封装部分与所述第二微电子封装的所述触点电连接和机械连接。
本发明的进一步实施例可以涉及一种制造微电子封装的可选方法。这个实施例的方法包括在加工中的单元上定位介质材料块，所述加工中的单元包括衬底、多个薄导电元件和线键合，所述衬底具有第一表面和远离所述第一表面的第二表面，所述多个薄导电元件暴露在所述第一表面处，所述线键合具有与相应的所述薄导电元件接合的基区以及远离所述衬底和所述基区的端表面。每个线键合限定在其所述基区和所述端表面之间延伸的边缘表面。所述方法还包括通过将所述线键合上的所述介质材料块挤压成与所述衬底的所述第一表面接触以便所述线键合穿透所述介质材料块，而在所述加工中的单元上形成封装层。由此，所述封装层填充所述线键合之间的空间以便通过所述封装层将所述线键合彼此分离，所述封装层至少覆盖所述衬底的所述第二区域。通过延伸穿过所述封装层的一部分的所述线键合形成所述第一线键合的未封装部分，以便所述第一线键合的一部分不被所述封装层覆盖。
本发明的又进一步实施例涉及一种用于制造微电子封装的可选方法。这个实施例的方法包括在加工中的单元上形成介质封装层，所述加工中的单元包括衬底、多个薄导电元件和线环，所述衬底具有第一表面和远离所述第一表面的第二表面，所述多个薄导电元件暴露在所述第一表面处，所述线环在第一基区和第二基区处与相应的至少两个所述薄导电元件接合。所述封装层形成为至少部分地覆盖所述第一表面和所述至少一个线环。所述方法进一步包括移除所述封装层的一部分和所述线环的一部分以将所述线环的每个切断成与所述第一基区和第二基区的每个相对应的分离的线键合。由此，所述线键合具有远离所述衬底和所述基区的端表面，每个线键合限定在其所述基区和所述端表面之间延伸的边缘表面。所述封装层填充所述线键合之间的空间以便通过所述封装层将所述线键合彼此分离。所述线键合具有通过至少部分地未被所述封装层覆盖的自由端形成的未封装部分。
本发明的另一个实施例涉及一种系统，包括根据上面讨论的实施例的一个的微电子封装或组件以及与所述微电子封装电连接的一个或多个其他电子部件。所述系统可以进一步包括壳体，所述微电子封装或组件和所述其他电子部件可以安装在所述壳体中。
附图说明
图1示出根据本发明实施例的微电子封装；
图2示出图1的微电子封装的俯视正视图；
图3示出根据本发明的可选实施例的微电子封装；
图4示出根据本发明的可选实施例的微电子封装；
图5示出根据本发明的可选实施例的微电子封装；
图6示出包括根据本发明实施例的微电子封装的堆叠微电子组件；
图7示出根据本发明的可选实施例的微电子封装；
图8A-8E示出根据本发明的各个实施例的微电子封装的一部分的详细视图；
图9示出根据本发明的可选实施例的微电子封装的一部分的详细视图；
图10A-10D示出根据本发明的各个实施例的微电子封装的一部分的详细视图；
图11-14示出根据本发明实施例的在其制造的各个步骤期间的微电子封装；
图15示出根据本发明的可选实施例的在其制造期间的微电子封装；
图16A-16C示出根据本发明实施例的在其制造的各个步骤期间的微电子封装的一部分的详细视图；
图17A-17C示出根据本发明的可选实施例的在其制造的各个步骤期间的微电子封装的一部分的详细视图；
图18示出根据本发明的可选实施例的微电子封装的俯视正视图；
图19示出根据本发明的可选实施例的微电子封装的一部分的俯视正视图；
图20示出根据本发明的进一步可选实施例的微电子封装的俯视图；
图21示出图20的微电子封装的正视图；
图22示出根据本发明的进一步可选实施例的微电子封装的正视图；
图23示出根据本发明进一步实施例的系统；
图24示出根据本发明的进一步可选实施例的微电子封装的正视图；
图25示出根据本发明的进一步可选实施例的微电子封装的正视图；
图26示出根据图25的实施例的变型的微电子封装的俯视图；
图27示出根据本发明的进一步可选实施例的微电子封装的正视图；以及
图28示出根据图27的实施例的变型的微电子封装的俯视图。
具体实施方式
现在转向附图，其中相似的附图标记用于表示相似的特征，图1中示出根据本发明实施例的微电子组件10。图1的实施例是封装的微电子元件形式的微电子组件，例如用于计算机或其他电子应用中的半导体芯片组件。
图1的微电子组件10包括衬底12，衬底12具有第一表面14和第二表面16。衬底12典型地为基本平坦的介质元件的形式。介质元件可以是片状的且可以是薄的。在特定实施例中，介质元件可以包括一层或多层有机介质材料或复合介质材料，例如但不限于：聚酰亚胺、聚四氟乙烯(“PTFE”)、环氧树脂、环氧玻璃、FR-4、BT树脂、热塑性塑料或热固性塑料材料。第一表面14和第二表面16优选地彼此基本平行且垂直于表面14、16间隔开距离，限定衬底12的厚度。衬底12的厚度优选地在对于本申请通常可接受的厚度范围内。在一个实施例中，第一表面14和第二表面16之间的距离为约25μm和500μm之间。为了这个讨论的目的，第一表面14可以描述为与第二表面16相对定位或远离第二表面16定位。本文使用的元件的相对位置(是指这些元件的垂直或水平位置)的这种描述以及任何其他描述仅用于与附图中的元件的位置相对应的说明性的目的，且是不受限制的。
在优选实施例中，衬底12被认为分成第一区域18和第二区域20。第一区域18位于第二区域20内，包括衬底12的中心部分且从其朝外延伸。第二区域20基本围绕第一区域18且从其朝外延伸至衬底12的外边缘。在这个实施例中，衬底自身的特定特征不物理地分开两个区域；但是，为了本文讨论的目的，相对于应用到其的或包含在其内的处理或特征区别该区域。
微电子元件22可以安装至第一区域18内的衬底12的第一表面14。微电子元件22可以是半导体芯片或另一可比装置。在图1的实施例中，微电子元件22以称为传统的或“面朝上”的方式安装至第一表面14。在这种实施例中，引线24可以用于将微电子元件22与暴露在第一表面14处的多个导电元件28的一些电连接。引线24还可以与衬底12中的迹线(未示出)或其他导电特征接合，迹线或其他导电特征再与导电元件28连接。
导电元件28包括暴露在衬底12的第一表面14处的各个“触点”或焊盘30。如本描述中使用的，当导电元件被描述为“暴露在”具有介质结构的另一元件的表面处时，它表示导电结构可用于与在与介质结构的表面垂直的方向上从介质结构的外部朝介质结构的表面移动的理论点接触。因此，暴露在介质结构的表面处的端子或其他导电结构可从这样的表面突出；可与这样的表面平齐；或者可相对于这样的表面凹入并通过介质结构中的孔或凹入部暴露。导电元件28可以是平坦的薄元件，其中焊盘30暴露在衬底12的第一表面14处。在一个实施例中，导电元件28可以是大体圆形的且可以彼此之间互连或通过迹线(未示出)与微电子元件22互连。导电元件28可以至少形成在衬底12的第二区域20内。额外地，在某些实施例中，导电元件28还可以形成在第一区域18内。当以称为“倒装芯片”的配置将微电子元件122(图3)安装至衬底112时，这种布置是特别有用的，微电子元件122上的触点可以通过定位在微电子元件122下方的焊锡凸点126等与第一区域18内的导电元件128相连。在如图22中所示的另一个配置中，微电子元件622面朝下地安装在衬底612上，且通过在衬底612的面朝外的表面(例如表面616)上延伸的引线624与芯片上的导电特征电连接。在示出的实施例中，引线625穿过衬底612中的开口625且可以被包胶模(overmold)699封装。
在一个实施例中，导电元件28由固体金属材料形成，该固体金属材料为例如，铜、金、镍、或这种应用可接受的其他材料，包括各种合金(包括铜、金、镍或其组合的一种或多种)。
导电元件28的至少一些可与暴露在衬底12的第二表面16处的相应的第二导电元件40(例如，导电焊盘)互连。这种互连可以使用形成在衬底12中的通孔41实现，通孔41可以衬有或填充有导电金属，通孔41的材料可以与导电元件28和40的材料相同。可选地，导电元件40可以通过衬底12上的迹线进一步互连。
微电子组件10进一步包括与导电元件28的至少一些(例如其焊盘30上的)接合的多个线键合32。线键合32在其基区34处与导电元件28接合且可以延伸至远离各个基区34和衬底12的自由端36。线键合32的端部36的特征为自由的，因为它们不与微电子组件10内的微电子元件22或与微电子元件22连接的任何其他导电特征电连接或以其他方式接合。换言之，自由端36可用于与组件10外部的导电特征直接地或间接地(例如通过焊球或本文讨论的其他特征)电连接。通过例如封装层42或与另一导电特征电连接或以其他方式接合而将端部36保持在预定位置的事实不意味着它们不是如本文描述的“自由”的，只要任何这种特征不与微电子元件22电连接即可。相反地，基区34不是自由的，因为它如本文所描述地直接地或间接地与微电子元件22电连接。如图1所示，基区34的形状可以是大体圆形的，从限定在基区34和端部36之间的线键合32的边缘表面37开始朝外延伸。根据用于形成线键合32的材料的类型、线键合32和导电元件28之间的连接的期望强度、或者用于形成线键合32的特定工艺，可以改变基区34的特定大小和形状。Otremba的美国专利No.7,391,121和美国专利申请公开No.2005/0095835(描述可以认为是线键合的一种形式的楔形键合过程)中描述了用于制造线键合28的示例性方法，其全部公开内容通过引用并入本文。其中线键合32额外地或可选地与暴露在衬底12的第二表面16上的导电元件40接合，并远离其延伸的可选实施例是可能的。
线键合32可以由导电材料制成，导电材料为例如铜、金、镍、焊锡、铝等。额外地，线键合32可以由材料的组合制成，例如具有导电材料(例如，铜或铝)的核心，例如具有涂覆到核心上的涂层。涂层可以是由第二导电材料(例如铝、镍等)制成的。可选地，涂层是由绝缘材料制成的，例如绝缘夹套。在一个实施例中，用于形成线键合32的导线可以具有约15μm和150μm之间的厚度，即垂直于导线的长度的尺寸。在其他实施例中，包括其中使用楔形键合的那些实施例中，线键合32可以具有多达约500μm的厚度。通常地，使用本领域中已知的专用设备在导电元件(例如导电元件28、焊盘、迹线等)上形成线键合。加热导线段的引线端并将其压向与导线段键合的接收表面，典型地形成与导电元件28的表面接合的球或球状基区34。从键合工具中拉出用于形成线键合的期望长度的导线段，然后可以在期望长度处切割线键合。例如，可以用于形成铝的线键合的楔形键合是拖着导线的加热部分跨过接收表面以形成与表面基本平行的楔的工艺。然后，如果必要的话，可以向上弯曲楔形键合的线键合，并在切割前将线键合延伸至期望的长度或位置。在特定实施例中，用于形成线键合的导线的横截面可以是圆柱形的。或者，从工具进给的用于形成线键合或者楔形键合的线键合的导线可以具有多边形的横截面，例如矩形或梯形。
线键合32的自由端36具有端表面38。端表面38可以形成由多个线键合32的各个端表面38形成的阵列中的触点的至少一部分。图2示出这种由端表面38形成的触点阵列的示例性图案。这种阵列可以形成为面积阵列配置，使用本文描述的结构可以实施其变型。这种阵列可以用于将微电子组件10与另一个微电子结构(例如印刷电路板(“PCB”)或其他封装的微电子元件)电连接和机械连接，图6示出这种连接的示例。在这种堆叠布置中，线键合32和导电元件28、40可以借此承载多个电信号，每个电信号具有不同的信号电势以允许通过单个堆叠中的不同微电子元件处理不同的信号。焊料块52可以用于互连这种堆叠中的微电子组件，例如通过将端表面38电附接和机械附接至导电元件40。
微电子组件10进一步包括由介质材料形成的封装层42。在图1的实施例中，封装层42形成在不被微电子元件22或导电元件28覆盖或占据的衬底12的第一表面14的部分上。类似地，封装层42形成在不被线键合32覆盖的导电元件28(包括其焊盘30)的部分上。封装层42还可以基本覆盖微电子元件22、线键合32(包括其基区34和边缘表面37的至少一部分)。线键合32的一部分可以保持不被封装层42覆盖(还可以称作未封装)，由此使得线键合可用于与位于封装层42外部的特征或元件电连接。在一个实施例中，线键合32的端表面38保持不被封装层42的主要表面44内的封装层42覆盖。其中边缘表面37的一部分不被封装层42覆盖，额外地或者可选地，具有保持不被封装层42覆盖的端表面38的其他实施例是可能的。换言之，封装层42可以覆盖来自第一表面14及其上的所有微电子组件10，除了线键合36的一部分(例如端表面38、边缘表面37或二者的组合)之外。在附图示出的实施例中，封装层42的表面(例如主要表面44)可以与衬底12的第一表面14间隔开足够大的距离以覆盖微电子元件12。由此，线键合32的端表面38与表面44平齐的微电子组件10的实施例将包括比微电子元件22高的线键合32以及用于倒装芯片连接的任何底层的焊锡凸点。但是，用于封装层42的其他配置是可能的。例如，封装层可以具有不同高度的多个表面。在这种配置中，端部38定位在其中的表面44可以比微电子元件22位于其下的面向上的表面高或矮。
封装层42用于保护微电子组件10内的其他元件，尤其是线键合32。这允许不易被其测试损害或在将其运输或组装到其他微电子结构的期间被损害的更坚固的结构。封装层42可以由具有绝缘性质的介质材料形成，例如美国专利申请公开No.2010/0232129中所描述的介质材料，其通过引用全部并入本文。
图3示出线键合132具有不直接定位在其各个基区34上的端部136的微电子组件110的实施例。换言之，考虑到衬底112的第一表面114在两个横向方向上延伸，以基本限定平面，从相应的基区134的横向位置开始沿这些横向方向的至少一个移动线键合132的至少一个或端部136。如图3所示，线键合132沿其纵向轴线可以是基本直的，如图1的实施例中，纵向轴线相对于衬底112的第一表面114成角度146。尽管图3的横截面视图仅示出穿过与第一表面114垂直的第一平面的角度146，线键合132还可以相对于同时垂直于第一平面和第一表面114的另一个平面中的第一表面114成角度。这个角度可以基本等于或者不同于角度146。换言之，端部136相对于基区134的移动可以沿两个横向方向，且可以这些方向的每个中移动相同的或不同的距离。
在一个实施例中，各个线键合132可以沿不同的方向移动且可以贯穿组件10移动不同的量。这种布置允许组件110具有与衬底12级上的配置相比不同地配置在表面144级上的阵列。例如，与衬底112的第一表面114相比，阵列可以具有较小的总面积或者表面144上的间距比第一表面114处的间距小。进一步地，一些线键合132可以具有定位在微电子元件122上以适应不同大小的封装微电子元件的堆叠布置的端部138。在图19示出的另一个示例中，线键合132可以配置成，一个线键合132A的端部136A基本定位在另一个线键合134B的基区134B上，线键合134B的端部132B定位在别处。这种布置可以称作相比于第二表面116上的相应触点阵列的位置，改变触点阵列内的触点端表面136的相对位置。在这种阵列内，根据微电子组件的应用或其他需求，可以如期望地改变或变化触点端表面的相对位置。
图4示出微电子组件210的进一步实施例，其中线键合232具有横向位置相对于基区234移动的端部236。在图4的实施例中，线键合132通过包括其中的弯曲部分248实现这个横向移动。可以在线键合形成工艺的附加步骤中形成弯曲部分248，例如可以在将导线部分拉出至期望长度时发生。可以使用可利用的线键合设备(可以包括单个机器的使用)执行这个步骤。
根据需要，弯曲部分248可以具有各种形状，以实现线键合232的端部236的期望位置。例如，弯曲部分248可以形成为各种形状的S-曲线，例如图4中所示的形状或者更平滑的形状(例如图5中所示的形状)。额外地，弯曲部分248可以定位为相比于端部236更邻近基区234，或者相反。弯曲部分248还可以是螺旋或环的形状，或者可以是包括多个方向中的曲线或者不同形状或特性的曲线的合成形状。
图5示出微电子封装310的进一步示例性实施例，其中微电子封装310具有导致基区334和端部336之间的各种相对横向移动的不同形状的线键合332的组合。一些线键合332A基本是直的，具有定位在它们各自的基区334A上的端部336A，而其他线键合332B包括导致端部336B和基区334B之间的稍微轻微的相对横向移动的细微的弯曲部分348B。进一步地，一些线键合332C包括弯曲部分348C，弯曲部分348C具有导致端部336C相比于端部334B从相对基区334C横向移动较大的距离的大幅度弯曲的形状。图5还示出这种线键合332Ci和332Cii的示例性对，332Ci和332Cii具有定位在衬底级阵列的相同行中的基区334Ci和334Cii以及定位在相应的表面级阵列的不同行中的端部336Ci和336Cii。
示出线键合332D的进一步变型，配置成不被其侧表面47上的封装层342覆盖。在示出的实施例中，自由端336D是不被覆盖的，但是，边缘表面337D的一部分可以额外地或者可选地被封装层342覆盖。这种配置可以用于通过与适当的特征的电连接的微电子组件10的接地或者用于与相对于微电子组件310横向设置的其他特征的机械连接或电连接。额外地，图5示出已经被刻蚀掉、成型、或以其他方式形成以限定凹表面345的封装层342的区域，凹表面345定位为相比于主要表面342更邻近衬底12。一个或多个线键合(例如，线键合332A)可以不被覆盖在沿凹表面345的区域内。在图5示出的示例性实施例中，端表面338A和部分的边缘表面337A不被封装层342覆盖。通过允许焊料沿边缘表面337A镀锡(wick)以及与边缘表面337A和端表面338接合，这种配置可以提供与另一导电元件的连接(例如通过焊球等)。线键合的一部分可以不被沿凹表面345的封装层342覆盖的其他配置是可行的，包括端表面与凹表面345基本平齐的配置或者本文相对于封装层342的任何其他表面示出的其他配置。类似地，线键合332D的一部分不被沿侧表面347的封装层342覆盖的其他配置可以与本文在别处相对于封装层的主要表面的变型讨论的那些配置相似。
图5进一步示出具有示例性布置的两个微电子元件322和350的微电子组件310，其中微电子元件350面朝上地堆叠在微电子元件322上。在这个布置中，引线324用于将微电子元件322电连接到衬底312上的导电特征。不同的引线用于将微电子元件350电连接到微电子组件310的不同的其他特征。例如，引线380将微电子元件350电连接到衬底312的导电特征，引线382将微电子元件350电连接到微电子元件322。进一步地，结构上可以与各个线键合332相似的线键合384用于在电连接到微电子元件350的封装层342的表面344上形成接触表面386。这可以用于将另一个微电子组件的特征从上述封装层342直接电连接到微电子元件350。还可以包括与微电子元件322连接的引线，包括当存在这种微电子元件而不存在附接在其上的第二微电子元件350时。在封装层342中可以形成开口(未示出)，开口从封装层342的表面344延伸至沿着例如引线380的点，由此提供到引线380的通路以通过位于表面344外部的元件与引线380电连接。类似的开口可以形成在其他引线或线键合332的任一个上，例如在线键合332C上的远离其端部336C的点处。在这种实施例中，端部336C可以定位在表面344的下方，开口提供与其电连接的唯一通路。
图6示出微电子组件410和488的堆叠封装。在这种布置中，焊料块52将组件410的端表面438电连接和机械连接到组件488的导电元件440。堆叠封装可以包括额外的组件且可以最终附接至用于电子装置中的PCB490等上的触点492。在这种堆叠布置中，线键合432和导电元件430可以借此承载多个电信号，每个电信号具有不同的信号电势，以允许通过单个堆叠中的不同的微电子元件(例如，微电子元件422或微电子元件489)处理不同的信号。
在图6的示例性配置中，线键合432配置有弯曲部分448，以便线键合432的端部436的至少一些延伸进覆盖微电子元件422的主要表面424的区域中。这个区域可以由微电子元件422的外围限定并从其向上延伸。从面向图18中的衬底412的第一表面414的视图示出这种配置的示例，其中线键合432覆盖微电子元件422的背主要表面，微电子元件422在其正面425倒装键合到衬底412。在另一个配置(图5)中，微电子元件422可以面朝上地安装至衬底312，正面325背向衬底312，至少一个线键合336覆盖微电子元件322的正面。在一个实施例中，这个线键合336不与微电子元件322电连接。键合到衬底312的线键合336还可以覆盖微电子元件350的正面或背面。图18示出的微电子组件410的实施例中，导电元件428布置成形成第一阵列的图案，其中导电元件428布置在围绕微电子元件422的行和列中，且在各个导电元件428之间可以具有预定的间距。线键合432与导电元件428接合，以便其各个基区434遵循如通过导电元件428陈列的第一阵列的图案。但是，线键合432配置成其各个端部436可以布置成根据第二阵列配置的不同的图案。在示出的实施例中，第二阵列的间距可以与第一阵列的间距不同，一些情况下，第二阵列的间距比第一阵列的间距精细。但是，其中第二阵列的间距比第一阵列的间距大，或者其中导电元件428不定位在预定阵列中而线键合432的端部436定位在预定阵列中的其他实施例是可能的。更进一步地，导电元件428可以配置成定位在衬底412的各处的阵列组，线键合432可以配置成端部436在不同的阵列组中或者在单个阵列中。
图6进一步示出沿微电子元件422的表面延伸的绝缘层421。可以在形成线键合之前，由介质材料或其他电绝缘材料形成绝缘层421。绝缘层421可以防止微电子元件与在其上延伸的线键合423的任一个接触。特别地，绝缘层421可以避免线键合之间的电短路以及线键合和微电子元件422之间的短路。以这种方式，绝缘层421可以帮助避免因线键合432和微电子元件422之间的非预期电接触而产生的故障或可能的损害。
图6和18中示出的线键合配置可以允许微电子组件410连接到另一个微电子组件，例如微电子组件488，在某些情况下，例如微电子组件488和微电子组件422的相对大小可能将不可能允许。在图6的实施例中，微电子组件488的大小为使得触点焊盘440的一些在比微电子元件422的前表面424或后表面426的面积小的面积内的阵列中。在具有基本垂直的导电特征(例如，导柱)的微电子组件中，替代线键合432，导电元件428和焊盘440之间的直接连接是不可能的。但是，如图6所示，具有适当配置的弯曲部分448的线键合432可以具有在适当位置的端部436，以实现微电子组件410和微电子组件488之间的必需的电连接。这种布置可以用于制造堆叠封装，其中微电子组件418是例如具有预定焊盘阵列的DRAM芯片等，以及其中微电子元件422是用于控制DRAM芯片的逻辑芯片。这可以允许单个类型的DRAM芯片与不同大小的一些不同的逻辑芯片(包括比DRAM芯片大的那些芯片)一起使用，因为线键合432可以具有定位在必须实现与DRAM芯片的期望的连接处的端部436。在可选实施例中，微电子封装410可以安装在另一个配置的印刷电路板490上，其中线键合432的未封装表面436与电路板490的焊盘492电连接。进一步地，在这种实施例中，另一个微电子封装(例如，修改的版本的封装488)可以通过与焊盘440接合的焊球452安装在封装410上。
图7示出图1中示出的微电子组件10，具有沿封装层42的表面44延伸的再分布层54。如图7所示，迹线58与内部触点焊盘61电连接，内部触点焊盘61与线键合32的端表面38电连接且延伸穿过再分布层54的衬底56至暴露在衬底56的表面62上的触点焊盘60。然后，可以通过焊料块等将额外的微电子组件连接到触点焊盘60。与再分布层54类似的结构可以沿衬底12的第二表面16延伸，即已知的扇出层。扇出层可以允许微电子组件10连接到不同配置的阵列，而不允许连接到导电元件40阵列。
图8A-8E示出可以在结构上与图1-7类似的线键合32的结构中或者线键合32的端部36附近实施的各种配置。图8A示出在封装层42的一部分中形成有腔体64以便线键合32的端部36在腔体64处的封装层的次要表面43上突出的结构。在示出的实施例中，端表面38定位在封装层42的主要表面44的下面，腔体64的结构为暴露表面44处的端表面38以允许电子结构与其连接。其中端表面38与表面44基本平齐，或者在表面44的上方且与表面44间隔开的其他实施例是可能的。进一步地，腔体64可以配置成，邻近其端部36的线键合32的边缘表面37的一部分可以不被腔体64内的封装层42覆盖。这可以允许从组件10的外部到线键合32的连接，例如从端表面38和邻近端部36的边缘表面37的未覆盖部分到线键合32的焊料连接。这种连接在图8B中示出，并且使用焊料块52可以提供与第二衬底94的更坚固的连接。在一个实施例中，腔体64可以具有在表面44下方的约10μm和50μm之间的深度，以及可以具有约100μm和300μm之间的宽度。图8B示出具有与图8A类似的结构、但是具有锥形侧壁65的腔体。进一步地，图8示出通过触点焊盘96处的焊料块52与线键合32电连接和机械连接的第二微电子组件94，触点焊盘96暴露在其衬底98的表面处。
可以通过移除在腔体64的期望区域中的封装层42的部分来形成腔体64。这可以通过已知的工艺实现，该工艺包括激光刻蚀、湿法刻蚀、抛光等。可选地，在通过注射成型形成封装层42的实施例中，腔体64可以形成为包括模具中的相应特征。在美国专利申请公开No.2010/0232129中公开了这种工艺，其通过引用全部并入本文。图8B中示出的锥形形状的腔体64可以是它的形成中使用的特殊刻蚀工艺的结果。
图8C和8E示出包括线键合32上的大体圆形的端部分70的端结构。圆形端部分70配置为具有比基区34和端部36之间的线键合32的部分的横截面宽的横截面。进一步地，圆形端部分70包括在其过渡之间从线键合32的边缘表面37向外延伸的边缘表面71。通过提供锚固特征，圆形边缘部分70的结合可以用于将线键合32紧固在封装层42内，其中表面71的方向的改变为封装层42提供在三个侧面上围绕端部70的位置。这可以帮助防止线键合32变得与衬底12上的导电元件28分离，从而导致失败的电连接。额外地，圆形端部分70可以提供未被表面44内的封装层42覆盖的增加的表面面积，从而可以实现与其的电连接。如图8E所示，圆形端部分70可以在表面44上延伸。可选地，如图8C所示，圆形端部分70可以进一步地研磨或者以其他方式变平以提供与表面44基本平齐的表面，并且可以具有比线键合32的横截面大的面积。
可以通过在用于制造线键合32的导线的端部施加火焰或火花形式的局部热来形成圆形端部分70。可以改变已知的线键合机器以执行这个步骤，这个步骤可以在切割导线之后立即进行。在这个工艺中，热量熔化在其端部的导线。通过其表面张力使得液体金属的局部部分为圆形的，并且当金属冷却时，保持圆形。
图8D示出微电子组件10的配置，其中线键合32的端部36包括在封装层42的主要表面44上且与主要表面44间隔开的表面38。这种配置可以具有与上面关于腔体64讨论的益处相似的益处，具体地，通过提供与沿未被表面44上的封装层42覆盖的边缘表面37的部分镀锡的焊料块68的更坚固的连接。在一个实施例中，端表面38可以在表面42上且与表面42间隔开约10μm和50μm之间的距离。额外地，在图8D的实施例和边缘表面37的一部分未被封装层42的表面上的封装层42覆盖的其他实施例的任一个中，端部可以包括形成在其上的保护层。这个层可以包括氧化保护层，包括由金、氧化物涂料或OSP制成的氧化保护层。
图9示出具有形成在线键合32的端表面38上的钉头凸点72的微电子组件10的实施例。在制造微电子组件10之后，可以通过在端表面44上施加另一个改变的线键合以及可选地沿表面44的一部分延伸来形成钉头凸点72。邻近其基区切割或者以其他方式切断改变的线键合，而不是拉出一定长度的导线。包含特定金属的钉头凸点72可以直接施加到端部38而不需首先施加键合层(例如，UBM)，由此提供形成与不可被焊料直接润湿的键合焊盘的导电互连的方式。当线键合32由不可湿材料制成时，这可能是有用的。通常地，基本由铜、镍、银、铂和金的一种或多种组成的钉头凸点可以这种方式施加。图9示出形成在钉头凸点72上用于与额外的微电子组件电连接或机械连接的焊料块68。
图10A-10D示出用于包括折弯的或弯曲的形状的线键合32的端部36的配置。在每个实施例中，线键合32的端部36被折弯成其一部分74与封装层42的表面44基本平行，以便边缘表面76的至少一部分不被例如主要表面44覆盖。边缘表面37的这个部分可以朝上延伸出表面44，或者可以被研磨，或者以其他方式变平以便与表面44基本平齐地延伸。图10A的实施例包括在与表面44平行的端部36的部分74处的线键合32中的陡弯和在与表面44基本垂直的端表面38中的端子。图10B示出具有在与表面44平行的端部36的部分74附近的比图10A中示出的曲线更平缓的曲线的端部36。其他配置是可行的，包括根据图3、4或5示出的线键合的部分包括具有与表面44基本平行的一部分以及具有未被表面44内的位置处的封装层42覆盖的一部分的边缘表面的端部的那些配置。额外地，图10B的实施例包括在其端部上的钩状部分75，钩状部分75将端表面38在表面44下方定位在封装层42内。这可以提供不易从封装层42内取出的端部36的更坚固的结构。图10C和10D示出分别与图10A和10B示出的结构相似、但是因形成在封装层42中的腔体64不被沿着表面44的位置处的封装层42覆盖的结构。这些腔体的结构可以与上面关于图8A和8B所讨论的结构类似。包括平行于表面44延伸的部分74的端部36的包含可以提供增加的表面积，用于通过延长的未覆盖边缘表面75与其连接。这个部分74的长度可以比用于形成线键合32的导线的横截面的宽度大。
图11-15示出在其制造方法的各个步骤中的微电子组件10。图11示出在已经将微电子元件22电连接和机械连接到第一区域18内的第一表面14上的衬底12的步骤时的微电子组件10’。在图11中，微电子元件22被示为通过焊料块26以倒装芯片布置的方式安装在衬底12上。可选地，如图1所示，可以替换使用面朝上的焊接。在图11示出的方法步骤的实施例中，可以在微电子元件22和衬底12之间提供介质底部填充层(dielectric underfilllayer)66。
图12示出具有施加在导电元件28的焊盘30上的线键合32的微电子组件10”，导电元件28暴露在衬底12的第一表面14上。如所讨论的，可以通过加热导线段的端部以软化该端部来施加线键合32，以便当将线键合32压向导电元件28时形成与导电元件28的沉积键合，从而形成基区34。然后，将导线从导电元件28拉出，并且如果需要，在将其切割或以其他方式切断前，将其操作成特定形状以形成线键合32的端部36和端表面38。可选地，例如，可以通过楔形键合由铝线形成线键合32。通过加热与其端部邻近的导线的部分以及使用施加到其的压力沿导电元件28拖动导线形成楔形键合。这个工艺在美国专利No.7,391,121中进一步描述，其全部公开内容通过引用并入本文。
在图13中，通过将封装层42施加到衬底的第一表面14上并从其沿线键合32的边缘表面37向上延伸，已经将封装层42添加到微电子组件10”’。封装层42还覆盖底部填充层66。可以通过在图12中示出的微电子组件10’上沉积树脂来形成封装层42。这可以通过将组件10’放置到具有可以容纳组件10’的、期望形状的封装层42中的腔体的适当配置的模具中实现。这种模具和使用其形成封装层的方法可以是如美国专利申请公开No.2010/0232129中示出和描述的，其全部公开内容通过引用并入本文。可选地，可以由至少部分的顺应材料将封装层42预制造成所需的形状。在这个配置中，介质材料的顺应性质允许将封装层42压至线键合32和微电子元件22上的位置中。在这个步骤中，线键合32穿透进顺应材料中，在其中形成各个孔，沿着各个孔，封装层42接触边缘表面37。进一步地，微电子元件22可以使顺应材料变形以便可以容纳在其中。可以压缩顺应介质材料以在外表面44上暴露端表面38。可选地，可以从封装层移除任何多余的顺应介质材料以形成表面44(表面44上的线键合32的端表面38不被覆盖)，或者形成在表面63内的位置处暴露端表面38的腔体64。
在图13示出的实施例中，形成封装层，以便初始时，其表面44在线键合32的端表面38上且与端表面38间隔开。为了暴露端表面38，如图14所示，可以移除在端表面38上的封装层42的部分，暴露与端表面42基本平齐的新表面44’。可选地，可以形成如图8A和8B所示的腔体64，其中端表面38不被封装层42覆盖。在进一步的替代方案中，封装层42可以被形成为，表面44预先与端表面48基本平齐，或者将表面44定位在端表面48的下面，如图8D所示。如果必要，可以通过研磨、干法刻蚀、激光刻蚀、湿法刻蚀、抛光等实现封装层42的一部分的移除。如果需要，还可以在相同的或额外的步骤中移除线键合32的端部36的一部分以实现与表面44基本平齐的大体平坦的端表面38。如果需要，在这个步骤之后，还可以形成腔体64，或者如图10所示，还可以施加钉头凸点。然后，可以将形成的微电子组件10附接到PCB上，或者以其他方式与另一个组件结合，例如堆叠封装，如图6所示。
在图15示出的可选实施例中，线键合32初始时成对地形成为线环86的部分32’。在这个实施例中，环86为如上讨论的线键合的形式。向上拉动到导线段，然后朝具有其至少一个部件的方向弯曲导线段，并在衬底13的第一表面14方向上拉动导线段至基本覆盖相邻的导电元件28的位置。然后，在切割或以其他方式切断导线之前，基本向下地拉动导线至邻近相邻的导电元件28的位置。然后，加热导线并通过沉积键合等将导线连接到相邻的导电元件28以形成环86。然后，形成封装层42以便基本覆盖环86。然后，通过研磨、蚀刻等工艺移除封装层42的一部分，还移除环86的一部分，以便将环切断分成两个部分32’，由此形成端表面38未被沿形成在封装层42上的表面44的位置处的封装层42覆盖的线键合32。如上讨论的，然后可以对组件10应用随后的修整步骤。
图16A-16C示出用于制造如上讨论的围绕线键合32的端部36的腔体64的可选实施例中的步骤。图16A示出如上关于图1-6讨论的通常类型的线键合32。线键合32具有施加在其端部36上的牺牲材料块78。牺牲材料块78可以是基本球形的形状(这可以由其形成期间的材料的表面张力产生)或者是本领域的普通技术人员理解的其他期望的形状。可以通过在焊锡膏中浸泡线键合32的端部36以涂覆其端部来形成牺牲材料块78。在浸泡之前可以调整焊锡膏的粘度以控制镀锡的焊料块的量以及导致粘附至端部36的表面张力。因此，这可以影响施加到端部36上的块78的大小。可选地，可以通过在线键合32的端部36上沉积可溶性材料来形成块78。其他可能的块78可以是单独的焊球，或者端部上的其他块，或者使用其他材料通过其他方式形成的稍后可以被移除的块，例如用于微电子部件制造的铜或金闪蒸。
在图16B中，介质层42被示为已经添加至组件10，包括沿线键合32的边缘表面37向上。介质层还沿牺牲材料块78的表面的一部分延伸，以便由此与线键合32的端部36间隔开。随后，移除牺牲材料块78，例如通过溶剂中的洗涤或冲洗、熔化、化学刻蚀或其他技术，留下介质层42中的腔体68，腔体68基本为移除前的块78的负形状且暴露邻近线键合32的端部36的边缘表面37的一部分。
可选地，通过沿其边缘表面37延伸，牺牲材料块78可以形成为基本涂覆所有的线键合32。这个布置在图17A中示出。如上所讨论的，形成在组件10上之后，这个涂层可以施加到线键合32上，或者可以作为涂层施加到用于制造线键合32的导线。这将基本是涂覆导线或两部分导线(例如具有铜内核和焊锡涂层)的形式。图17B示出施加到线键合32和牺牲材料块78上的介质层42，以便沿牺牲材料块78的边缘表面79延伸，由此将介质层42与基本沿其长度的线键合32间隔开。
图17C示出移除牺牲材料块78的一部分以形成腔体64而产生的结构，腔体64围绕端部36且暴露边缘表面37的一部分。在这个实施例中，牺牲材料块78的大部分或者至少一部分可以留在介质层42和线键合32之间的适当位置。图17C进一步示出将线键合32电连接和机械连接到另一个微电子结构10A的触点焊盘40A的焊料块52。
图20和21示出微电子组件510的进一步实施例，其中线键合532形成在引线框架结构上。美国专利No.7,176,506和No.6,765,287中示出和描述了引线框架结构的示例，其公开内容通过引用并入本文。通常地，引线框架是由一片导电材料(例如，铜)形成的图案化为包括多个引线的段的结构，且可以进一步包括桨和框架。框架用于在组件的制造期间紧固引线和桨(如果被使用)。在一个实施例中，微电子元件(例如，管芯或芯片)可以面朝上地接合到桨并使用线键合电连接到引线。可选地，微电子元件可以直接安装到引线上，引线可以在微电子元件下方延伸。在这种实施例中，微电子元件上的触点可以通过焊球等电连接到各个引线。然后，引线可以用于形成与用于承载来自或至微电子元件的电信号电势的各个其他导电结构的电连接。当完成结构的组装(可以包括在结构上形成封装层)时，可以从引线和引线框架的桨移除框架的临时元件，以便形成各个引线。为了这个公开内容的目的，各个引线513和桨515被认为是共同地形成衬底512的分段部分，衬底512包括与其一体地形成的分部分的导电元件528。进一步地，在这个实施例中，桨515被认为位于衬底512的第一区域518内，引线513被认为位于第二区域520内。也在图21的正视图中示出的线键合524将承载在桨515上的微电子元件22连接到引线515的导电元件528。线键合532可以进一步在其基区534处接合到引线515上的额外的导电元件528。封装层542形成在组件510上，留下表面544内的位置处的线键合532的端部538不被覆盖。线键合532可以具有不被封装层542覆盖的额外的或可选的部分，其结构与关于本文的其他实施例描述的结构相对应。
图24-26示出具有闭环线键合832的微电子封装810的进一步可选实施例。如图24所示，这个实施例的线键合832包括可以与相邻的导电元件828a和828b接合的两个基区834a和834b。可选地，如图25和26所示，基区834a和834b可以接合在共用的导电元件828上。在这种实施例中，线键合832限定在两个基区834a和834b之间环状地延伸的边缘表面837，以便边缘表面837的各个部分837a和837b从基区向上延伸至衬底812上方的封装层842的表面844处的顶点839。封装层842沿边缘表面部分837a和837b的至少一个延伸，将各个部分彼此分离以及将各个部分与封装810中的其他线键合832分离。在顶点839处，边缘表面837的至少一部分不被封装层842覆盖，以便线键合832可用于与另一个部件(可以是另一个微电子部件或其他部件，例如，分立元件(例如，电容或电感))电互连。如图24-26所示，线键合832形成为，顶点839在跨过衬底812的表面的至少一个横向方向上与导电元件828偏置。在一个示例中，顶点839可以覆盖微电子元件820的主要表面或以其他方式覆盖与微电子元件820对齐的衬底812的第一区域。线键合832的其他配置是可行的，包括其他实施例中讨论的顶点839定位在线键合的端表面的任何位置的配置。进一步地，顶点839可以暴露在孔中，例如图8A所示。更进一步地，如关于图10A-10D的边缘表面所示，顶点839可以延长且可以暴露在沿其长度延伸的表面844上。通过设置围绕顶点839的未被覆盖的边缘表面837的形式的连接特征(即，在两个基区834a和834b之间延伸的线键合832)，可以实现通过主要表面844限定的方向上的连接特征的多个正确放置，而不是一个正确放置。
图27和28示出图24-26中的实施例的变型，其中使用键合带934替代线键合834。键合带可以是通常平坦的导电材料片，该导电材料为例如之前讨论的用于线键合的形成的任何材料。与横截面通常可以是圆形的线键合相反，键合带结构的宽度比厚度大。如图27所示，每个键合带934包括可以沿导电元件928的一部分延伸键合的第一基区934a。键合带932的第二基区934b可以与第一基区934a的一部分接合。边缘表面937的两个相应的部分937a和937b在两个基区934a和934b之间延伸至顶点939。顶点939的区域中的边缘表面937的一部分不被沿其主要表面944的一部分的封装层942覆盖。进一步的变型是可行的，例如用于本文公开的其他实施例中的关于线键合描述的那些变型。
上面讨论的结构可以用于构建不同的电子系统。例如，根据本发明的进一步实施例的系统711包括与其他电子部件713和715结合的上述微电子组件710。在示出的示例中，部件713是半导体芯片，而部件715是显示屏，但是可以使用任何其他部件。当然，尽管为了说明的清楚，在图23中只示出了两个额外的部件，系统可以包括任何数量的这种部件。上述的微电子组件710可以是例如上面结合图1描述的微电子组件，或者是参考图6讨论的结合多个微电子组件的结构。组件710可以进一步包括图2-22中描述的实施例的任一个。在进一步变型中，可以提供多个变型，以及可以使用任何数量的这种结构。
微电子组件710和部件713、715安装在共用的壳体719(以虚线示意性地示出)中，并在必要时彼此电互连以形成期望的电路。在示出的示例性系统中，系统包括电路板717例如柔性印刷电路板，电路板包括将部件彼此互连的很多个导体721，在图23中只示出其中一个导体。但是，这仅是示例性的；可以使用用于制造电连接的任何适当的结构。
壳体719作为在例如移动电话或个人数字助理中可用的类型的便携式壳体被示出，屏715暴露在壳体的表面处。在微电子组件710包括感光元件如成像芯片的情况下，还可以设置透镜723或其他光学装置用于将光导向到结构。此外，图23所示的简化的系统仅仅是示例性的；可以使用上述的结构制造其他系统，包括通常被认为是固定结构的系统，例如台式电脑、路由器等。
尽管已经参考特定实施例对本发明进行了描述，应该理解的是这些实施例仅仅是对本发明的原理和应用的说明。因此，应理解的是，在不脱离所附权利要求限定的本发明的精神和范围的情况下，可以对上述说明性实施例进行各种修改以及可以设计其他布置。

Claims (50)

1.一种微电子封装，包括：
衬底，所述衬底具有第一区域和第二区域，所述衬底具有第一表面和远离所述第一表面且沿横向方向延伸的第二表面；
至少一个微电子元件，所述至少一个微电子元件覆盖所述第一区域内的所述第一表面；
第一导电元件，所述第一导电元件暴露在所述第二区域内的所述衬底的所述第一表面和所述第二表面的至少一个处，所述第一导电元件的至少一些与所述至少一个微电子元件电连接；
线键合，所述线键合具有与相应的所述第一导电元件接合的基区以及远离所述衬底和所述基区的端表面，每个线键合限定在其所述基区和所述端表面之间延伸的边缘表面，其中所述线键合的第一个适于承载第一信号电势，所述线键合的第二个适于同时承载与所述第一信号电势不同的第二信号电势；
介质封装层，所述介质封装层从所述第一表面或所述第二表面的至少一个延伸并填充所述线键合之间的空间，以便所述线键合沿其分别从所述基区延伸至所述端表面的长度彼此分离，所述封装层至少覆盖所述衬底的所述第二区域，其中通过未被所述封装层覆盖的所述线键合的所述端表面的至少部分限定所述线键合的未封装部分；以及
多个第二导电元件，所述多个第二导电元件与所述线键合的未封装部分电连接，其中所述第二导电元件不接触所述第一导电元件，
其中至少一个线键合的未封装部分在沿所述第一表面的至少一个横向方向上从与所述至少一个线键合接合的所述第一导电元件移动，以便其所述未封装部分覆盖所述微电子元件的主要表面，
其中所述第一导电元件布置成第一预定配置的第一阵列，以及其中所述线键合的所述未封装部分布置成与所述第一预定配置不同的第二预定配置的第二阵列，以及
其中所述第一预定配置以在所述至少一个横向方向的第一方向上的第一间距为特征，以及其中所述第二预定配置以所述第一方向上的第二间距为特征，所述第二间距在所述第一方向上比所述第一间距小。
2.根据权利要求1所述的微电子封装，进一步包括氧化保护层，所述氧化保护层接触所述线键合的所述未封装部分的至少一些。
3.根据权利要求1所述的微电子封装，其中邻近所述线键合的所述端表面的至少一个所述线键合的至少一部分与所述封装层的表面垂直。
4.根据权利要求1所述的微电子封装，其中所述第二导电元件包括与至少一些所述线键合的所述端表面接合的多个钉头凸点。
5.根据权利要求1所述的微电子封装，其中所述线键合的至少一个沿其所述基区和所述未封装部分之间的直线延伸，以及其中所述直线相对于所述衬底的所述第一表面形成小于90°的角度。
6.一种微电子封装，包括：
衬底，所述衬底具有第一区域和第二区域，所述衬底具有第一表面和远离所述第一表面且沿横向方向延伸的第二表面；
至少一个微电子元件，所述至少一个微电子元件覆盖所述第一区域内的所述第一表面；
导电元件，所述导电元件暴露在所述第二区域内的所述衬底的所述第一表面和所述第二表面的至少一个处，所述导电元件的至少一些与所述至少一个微电子元件电连接；
多个线键合，所述多个线键合具有与相应的所述导电元件接合的基区以及远离所述衬底和所述基区的端表面，每个线键合限定在其所述基区和所述端表面之间延伸的边缘表面，其中所述线键合的第一个适于承载第一信号电势，所述线键合的第二个适于同时承载与所述第一信号电势不同的第二信号电势；以及
介质封装层，所述介质封装层从所述第一表面或所述第二表面的至少一个延伸并填充所述线键合之间的空间，以便所述线键合沿其分别从所述基区延伸至所述端表面的长度彼此分离，所述封装层至少覆盖所述衬底的所述第二区域，其中通过未被所述封装层覆盖的邻近所述线键合的所述端表面的所述边缘表面的至少部分限定所述线键合的未封装部分，其中未被所述封装层覆盖的所述边缘表面的部分具有在与所述介质封装层的表面平行的方向上延伸的最长尺寸，
其中至少一个线键合的未封装部分在沿所述第一表面的至少一个横向方向上从与所述至少一个线键合接合的所述导电元件移动，以便其所述未封装部分覆盖所述微电子元件的主要表面，
其中所述导电元件布置成第一预定配置的第一阵列，以及其中所述线键合的所述未封装部分布置成与所述第一预定配置不同的第二预定配置的第二阵列，以及
其中所述第一预定配置以在所述至少一个横向方向的第一方向上的第一间距为特征，以及其中所述第二预定配置以所述第一方向上的第二间距为特征，所述第二间距在所述第一方向上比所述第一间距小。
7.根据权利要求6所述的微电子封装，其中通过未被所述封装层覆盖的所述端表面的至少一部分进一步限定所述未封装部分的至少一个。
8.根据权利要求6所述的微电子封装，其中未被所述封装层覆盖且平行于所述封装层的所述表面延伸的所述边缘表面的所述部分的长度大于所述线键合的横截面宽度。
9.根据权利要求6所述的微电子封装，其中所述线键合的至少一个包括其所述基区和所述端表面之间的弯曲的部分。
10.根据权利要求1或6所述的微电子封装，其中所述封装层包括距所述衬底的所述第一表面第一距离处的主要表面以及距所述衬底的第一表面第二距离处的凹表面，所述第二距离小于所述第一距离，以及其中至少一个所述线键合的所述未封装部分不被所述凹表面处的所述封装层覆盖。
11.根据权利要求1或6所述的微电子封装，其中所述封装层具有形成在其中、从所述封装层的表面朝所述衬底延伸的腔体，以及其中一个所述线键合的所述未封装部分设置在所述腔体内。
12.根据权利要求1或6所述的微电子封装，其中所述线键合由选自由铜、金、铝和焊锡组成的组中的至少一种材料组成。
13.根据权利要求1或6所述的微电子封装，其中至少一个所述线键合限定沿其长度的纵向轴线，以及其中每个线键合包括第一材料的内层和第二材料的外层，所述内层沿所述纵向轴线延伸，所述外层远离所述纵向轴线且具有在所述线键合的纵向方向上延伸的长度。
14.根据权利要求13所述的微电子封装，其中所述第一材料是铜、金、镍和铝中的一种，以及其中所述第二材料是铜、金、镍、铝和焊锡中的一种。
15.根据权利要求1或6所述的微电子封装，进一步包括沿所述介质封装层的表面延伸的再分布层，其中所述再分布层包括再分布衬底，所述再分布衬底具有邻近所述封装层的主要表面的第一表面，所述再分布层进一步包括远离所述第一表面的第二表面、第一导电焊盘和第二导电焊盘，所述第一导电焊盘暴露在所述再分布衬底的所述第一表面上且与所述线键合的各个未封装部分对齐及机械连接，所述第二导电焊盘暴露在所述再分布衬底的第二表面上且与所述第一导电焊盘电连接。
16.一种微电子组件，包括：
第一微电子封装，所述第一微电子封装为根据权利要求1或6所述的微电子封装；以及
第二微电子封装，所述第二微电子封装包括具有第一表面和第二表面的衬底、安装到所述第一表面的第二微电子元件、以及暴露在所述第二表面处且与所述第二微电子元件电连接的触点焊盘；
其中所述第二微电子封装安装至所述第一微电子封装，以便所述第二微电子封装的所述第二表面覆盖所述介质封装层的表面的至少一部分，以及以便所述触点焊盘的至少一些与所述线键合的所述未封装部分的至少一些电连接和机械连接。
17.一种微电子封装，包括：
衬底，所述衬底具有第一区域和第二区域，所述衬底具有第一表面和远离所述第一表面且沿横向方向延伸的第二表面；
微电子元件，所述微电子元件覆盖所述第一区域内的所述第一表面，所述微电子元件具有远离所述衬底的主要表面；
导电元件，所述导电元件暴露在所述第二区域内的所述衬底的所述第一表面处，所述导电元件的至少一些与所述微电子元件电连接；
线键合，所述线键合具有与所述导电元件的每一个接合的基区以及远离所述衬底和所述基区的端表面，每个线键合限定在其所述基区和所述端表面之间延伸的边缘表面，其中所述线键合的第一个适于承载第一信号电势，所述线键合的第二个适于同时承载与所述第一信号电势不同的第二信号电势；以及
介质封装层，所述介质封装层从所述第一表面或所述第二表面的至少一个延伸并填充所述线键合之间的空间，以便所述线键合沿其分别从所述基区延伸至所述端表面的长度彼此分离，所述封装层至少覆盖所述衬底的第二区域，其中通过未被所述封装层覆盖的所述线键合的所述端表面的至少部分限定所述线键合的未封装部分，
其中至少一个线键合的未封装部分在沿所述第一表面的至少一个横向方向上从与所述至少一个线键合接合的所述导电元件移动，以便其所述未封装部分覆盖所述微电子元件的所述主要表面，
其中所述导电元件布置成第一预定配置的第一阵列，以及其中所述线键合的所述未封装部分布置成与所述第一预定配置不同的第二预定配置的第二阵列，以及
其中所述第一预定配置以在所述至少一个横向方向的第一方向上的第一间距为特征，所述第二预定配置以所述第一方向上的第二间距为特征，所述第二间距在所述第一方向上比所述第一间距小。
18.根据权利要求17所述的微电子封装，其中绝缘层在所述微电子元件的至少一个表面上延伸，所述绝缘层设置在所述微电子元件的所述表面和具有覆盖所述微电子元件的所述主要表面的未封装部分的所述至少一个线键合之间。
19.根据权利要求17所述的微电子封装，其中相应的所述线键合的多个所述未封装部分覆盖所述微电子元件的所述主要表面。
20.一种微电子组件，包括：
第一微电子封装，所述第一微电子封装为根据权利要求17所述的微电子封装；
第二微电子封装，所述第二微电子封装包括具有第一表面和第二表面的衬底、附接在所述第一表面上的微电子元件、以及暴露在所述第二表面上且与所述微电子元件电连接的触点焊盘；
其中所述第二微电子封装附接在所述第一微电子封装上，以便所述第二微电子封装的所述第二表面覆盖所述介质封装层的所述表面的至少一部分，以及以便所述触点焊盘的至少一些与所述线键合的所述未封装部分的至少一些电连接和机械连接。
21.根据权利要求20所述的微电子组件，其中所述第二微电子封装的所述触点焊盘布置成与所述第一预定配置不同的第三预定配置的第三阵列。
22.根据权利要求21所述的微电子组件，其中所述第三预定配置与所述第二预定配置相对应。
23.一种微电子封装，包括：
衬底，所述衬底具有第一区域和第二区域，所述衬底具有第一表面和远离所述第一表面的第二表面；
至少一个微电子元件，所述至少一个微电子元件覆盖所述第一区域内的所述第一表面；
导电元件，所述导电元件暴露在所述第二区域内的所述衬底的所述第一表面处，所述导电元件的至少一些与所述至少一个微电子元件电连接；
多个键合元件，每个键合元件具有第一基区、第二基区和在所述基区之间延伸的边缘表面，所述第一基区与所述导电元件的一个接合，所述边缘表面包括远离触点焊盘延伸到远离所述衬底的所述边缘表面的顶点的第一部分，所述边缘表面进一步包括从所述顶点延伸到所述第二基区的第二部分，所述第二基区与所述衬底的特征接合，其中所述键合元件的第一个适于承载第一信号电势，所述键合元件的第二个适于同时承载与所述第一信号电势不同的第二信号电势；以及
介质封装层，所述介质封装层从所述第一表面或所述第二表面的至少一个延伸并填充所述键合元件的所述第一部分和所述第二部分之间的空间以及所述多个键合元件之间的空间，以便所述键合元件沿其分别从所述基区延伸至端表面的长度彼此分离，所述封装层至少覆盖所述衬底的所述第二区域，其中通过围绕未被所述封装层覆盖的键合元件的顶点的所述键合元件的边缘表面的至少部分限定所述键合元件的未封装部分，
其中至少一个键合元件的未封装部分在沿所述第一表面的至少一个横向方向上从与所述至少一个键合元件接合的所述导电元件移动，以便其所述未封装部分覆盖所述微电子元件的主要表面，
其中所述导电元件布置成第一预定配置的第一阵列，以及其中所述键合元件的所述未封装部分布置成与所述第一预定配置不同的第二预定配置的第二阵列，以及
其中所述第一预定配置以在所述至少一个横向方向的第一方向上的第一间距为特征，所述第二预定配置以所述第一方向上的第二间距为特征，所述第二间距在所述第一方向上比所述第一间距小。
24.根据权利要求23所述的微电子封装，其中所述键合元件是线键合。
25.根据权利要求24所述的微电子封装，其中与所述衬底的所述第二基区接合的所述衬底的特征是与所述第一基区接合的所述导电元件。
26.根据权利要求24所述的微电子封装，其中与所述衬底的所述第二基区接合的所述衬底的特征是不同于与所述第一基区接合的所述导电元件的单独的导电元件。
27.根据权利要求26所述的微电子封装，其中与所述第二基区接合的导电元件不与所述微电子元件电连接。
28.根据权利要求23所述的微电子封装，其中所述键合元件是键合带。
29.根据权利要求28所述的微电子封装，其中所述第一基区的一部分沿所述触点焊盘的一部分延伸，其中与所述第二基区接合的所述特征是沿所述触点焊盘的一部分延伸的所述第一基区的部分。
30.一种制造微电子封装的方法，包括：
在加工中的单元上形成介质封装层，所述加工中的单元包括衬底、微电子元件、多个导电元件和线键合，所述衬底具有第一表面和远离所述第一表面的第二表面，所述衬底的第一表面沿横向方向延伸，所述微电子元件安装至所述衬底的所述第一表面，所述多个导电元件暴露在所述第一表面处，所述导电元件的至少一些与所述微电子元件电连接，所述线键合具有与所述导电元件接合的基区和远离所述基区的端表面，每个线键合限定在所述基区和所述端表面之间延伸的边缘表面，其中所述线键合的第一个适于承载第一信号电势，所述线键合的第二个适于同时承载与所述第一信号电势不同的第二信号电势；
其中所述封装层被形成为至少部分地覆盖所述第一表面和部分的所述线键合，由此通过未被所述封装层覆盖的所述线键合的所述端表面或所述边缘表面的至少一个的一部分限定所述线键合的未封装部分，至少一个所述线键合的未封装部分被形成为所述线键合的端表面在沿所述第一表面的至少一个横向方向上从与所述至少一个线键合接合的所述导电元件移动，以便其所述未封装部分覆盖所述微电子元件的主要表面；
其中所述封装层填充所述线键合之间的空间，以便所述线键合沿其分别从所述基区延伸至所述端表面的长度彼此分离；
其中所述导电元件布置成第一预定配置的第一阵列，以及其中所述线键合的所述未封装部分布置成与所述第一预定配置不同的第二预定配置的第二阵列；以及
其中所述第一预定配置以在所述至少一个横向方向的第一方向上的第一间距为特征，以及其中所述第二预定配置以所述第一方向上的第二间距为特征，所述第二间距在所述第一方向上比所述第一间距小。
31.根据权利要求30所述的方法，其中所述衬底是引线框架，所述导电元件是所述引线框架的引线。
32.根据权利要求30所述的方法，进一步包括在至少一个所述线键合的所述未封装部分上形成钉头凸点。
33.根据权利要求30所述的方法，进一步包括在至少一个所述线键合的所述未封装部分上沉积焊球。
34.根据权利要求30所述的方法，其中形成所述封装层包括：在所述第一表面和所有的线键合上沉积介质材料块；以及移除所述介质材料块的一部分以暴露所述线键合的部分，以限定所述线键合的所述未封装部分。
35.根据权利要求34所述的方法，其中所述线键合的至少一个沿与至少两个所述导电元件的每个接合的环延伸，其中所述介质材料块沉积成至少部分地覆盖所述第一表面和至少一个线键合环，其中移除所述介质材料块的一部分进一步包括移除所述至少一个线键合环的一部分以将所述至少一个线键合环切断成具有未被所述封装层覆盖的各自的自由端的第一线键合和第二线键合，以形成所述线键合的所述未封装部分。
36.根据权利要求35所述的方法，进一步包括通过以下步骤形成所述加工中的单元的所述环：将导线的第一端与所述导电元件接合；朝远离所述第一表面的方向拉所述导线；然后在沿所述第一表面的至少一个横向方向上拉所述导线；然后将所述导线拉到所述导电元件，以及将所述导线与所述导电元件接合。
37.根据权利要求30所述的方法，其中通过以下步骤在所述加工中的单元上形成所述封装层：从远离所述衬底的位置挤压所述线键合上的介质材料块以使其与所述衬底的所述第一表面接触，以便所述线键合的至少一个穿透所述介质材料块。
38.根据权利要求30所述的方法，其中所述线键合由由金、铜、铝或焊锡组成的导线制成。
39.根据权利要求30所述的方法，其中所述线键合包括铝，所述线键合通过楔形键合与所述导电元件接合。
40.根据权利要求30所述的方法，其中形成所述加工中的单元包括形成这样的线键合的步骤：所述线键合的至少一个包括定位在所述导电元件和所述至少一个线键合的所述端表面之间的弯曲的段。
41.根据权利要求30所述的方法，其中所述衬底包括第一区域和第二区域，所述微电子元件覆盖所述第一区域并具有远离所述衬底的主要表面，其中所述导电元件设置在所述第二区域内，其中形成所述加工中的单元包括形成这样的线键合的步骤：至少一个所述线键合的至少一部分在所述微电子元件的所述主要表面上延伸。
42.一种制造微电子封装的方法，包括：
在加工中的单元上形成介质封装层，所述加工中的单元包括衬底、微电子元件、多个导电元件和线键合，所述衬底具有第一表面和远离所述第一表面的第二表面，所述衬底的第一表面沿横向方向延伸，所述微电子元件安装至所述衬底的所述第一表面，所述多个导电元件暴露在所述第一表面处，所述导电元件的至少一些与所述微电子元件电连接，所述线键合具有与所述导电元件接合的基区和远离所述基区的端表面，每个线键合限定在所述基区和所述端表面之间延伸的边缘表面，其中所述线键合的第一个适于承载第一信号电势，所述线键合的第二个适于同时承载与所述第一信号电势不同的第二信号电势；
其中所述封装层被形成为至少部分地覆盖所述第一表面和部分的所述线键合，由此通过未被所述封装层覆盖的所述线键合的所述端表面或所述边缘表面的至少一个的一部分限定所述线键合的未封装部分；
其中所述封装层填充所述线键合之间的空间，以便所述线键合沿其分别从所述基区延伸至所述端表面的长度彼此分离；
其中形成所述封装层的步骤包括形成从所述封装层的主要表面朝所述衬底延伸的至少一个腔体，所述至少一个腔体围绕一个所述线键合的所述未封装部分；以及
其中在将介质封装材料沉积到所述衬底和至少一个线键合上之后，通过从至少一个所述线键合的预定位置移除牺牲材料的块的至少一部分形成所述至少一个腔体。
43.根据权利要求42所述的方法，其中所述形成所述封装层的步骤被实施为牺牲材料的块的一部分暴露在所述封装层的主要表面上，所述牺牲材料的块的暴露部分围绕邻近其自由端的线键合的部分并将所述封装层的一部分与所述线键合的所述部分间隔开。
44.根据权利要求42所述的方法，其中所述线键合的至少一个限定沿其长度的纵向轴线，所述牺牲材料的块的第二部分沿从邻近所述基区的位置延伸的所述至少一个线键合的所述纵向轴线延伸，并在所述移除所述牺牲材料的块的至少一部分之后留下。
45.一种制造微电子封装的方法，包括：
在加工中的单元上形成介质封装层，所述加工中的单元包括衬底、微电子元件、多个导电元件和线键合，所述衬底具有第一表面和远离所述第一表面的第二表面，所述衬底的第一表面沿横向方向延伸，所述微电子元件安装至所述衬底的所述第一表面，所述多个导电元件暴露在所述第一表面处，所述导电元件的至少一些与所述微电子元件电连接，所述线键合具有与所述导电元件接合的基区和远离所述基区的端表面，每个线键合限定在所述基区和所述端表面之间延伸的边缘表面，其中所述线键合的第一个适于承载第一信号电势，所述线键合的第二个适于同时承载与所述第一信号电势不同的第二信号电势；
其中所述介质封装层被形成为至少部分地覆盖所述第一表面和部分的所述线键合，由此通过未被所述介质封装层覆盖的所述线键合的所述端表面或所述边缘表面的至少一个的一部分限定所述线键合的未封装部分；
其中所述介质封装层填充所述线键合之间的空间，以便所述线键合沿其分别从所述基区延伸至所述端表面的长度彼此分离；
其中所述线键合限定沿其长度的纵向轴线，其中所述线键合包括第一材料的内层和第二材料的外层，所述内层沿所述纵向轴线延伸，所述外层远离所述纵向轴线并沿所述线键合的长度延伸；以及
其中在所述形成所述封装层的步骤之后移除所述第二材料的一部分以形成从介质封装层的表面延伸的腔体，从而暴露所述线键合的所述内层的所述边缘表面的一部分。
46.根据权利要求45所述的方法，其中所述第一材料是铜，所述第二材料是焊锡。
47.一种制造微电子组件的方法，包括：将第一微电子封装与第二微电子封装接合，所述第一微电子封装为根据权利要求30所述的步骤制造的，所述第二微电子封装包括具有第一表面的衬底和暴露在所述衬底的所述第一表面处的多个触点，其中将所述第一微电子封装与所述第二微电子封装接合包括将所述第一微电子封装的所述线键合的所述未封装部分与所述第二微电子封装的所述触点电连接和机械连接。
48.一种制造微电子封装的方法，包括：
在加工中的单元上定位介质材料块，所述加工中的单元包括衬底、多个导电元件和线键合，所述衬底具有第一表面和远离所述第一表面的第二表面，所述多个导电元件暴露在所述第一表面处，所述线键合具有与相应的所述导电元件接合的基区以及远离所述衬底和所述基区的端表面，每个线键合限定在其所述基区和所述端表面之间延伸的边缘表面，其中所述线键合的第一个适于承载第一信号电势，所述线键合的第二个适于同时承载与所述第一信号电势不同的第二信号电势；以及
通过将所述线键合上的所述介质材料块挤压成与所述衬底的所述第一表面接触以便所述线键合穿透所述介质材料块，而在所述加工中的单元上形成封装层，所述封装层填充所述线键合之间的空间以便所述线键合沿其分别从所述基区延伸至所述端表面的长度彼此分离，所述封装层至少覆盖所述衬底的至少一部分，其中通过延伸穿过所述封装层的一部分的所述线键合形成所述线键合的未封装部分，以便所述线键合的一部分不被所述封装层覆盖。
49.一种微电子系统，包括根据权利要求1和6中任一项所述的微电子封装以及与所述微电子封装电连接的一个或多个其他电子部件。
50.根据权利要求49所述的微电子系统，进一步包括壳体，所述微电子封装和所述其他电子部件安装至所述壳体。
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