CN103560122A - Frame csp package with bumping optimization technology and production process thereof - Google Patents
Frame csp package with bumping optimization technology and production process thereof Download PDFInfo
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- CN103560122A CN103560122A CN201310387861.5A CN201310387861A CN103560122A CN 103560122 A CN103560122 A CN 103560122A CN 201310387861 A CN201310387861 A CN 201310387861A CN 103560122 A CN103560122 A CN 103560122A
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- chip
- lead frame
- silver coating
- ball
- frame
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Abstract
The invention discloses a frame csp package with bumping optimization technology and a production process thereof. The package is mainly formed by a lead frame, a silver plated layer, balls, a chip, bonding wires and a plastic body. The lead frame is connected with the chip through the silver plated layer. The bonding wires are connected to the lead frame from the chip. The silver plated layer is provided with the balls. The plastic body encloses the lead frame, the silver plated layer, the balls, the chip, and the bonding wires. The power supply and the signal channel of a circuit are formed by the balls and the lead frame. The lead frame is provided with the silver plated layer which is provided with the balls and the chip. The balls are arranged at two ends of the chip. The silver plated layer, the balls, and the chip are at one side of the lead frame. The main flows of the production process are wafer thinning, dicing, frame and silver plated layer processing, ball planting on the silver plated layer, chip installation, pressing welding, plastic packaging, the etching of the lead frame and the obtainment of a finished product. According to the frame csp package and the production process thereof, the direct welding of the chip on the frame can be realized, and the tedious steps of frame design and high production cost are saved.
Description
Technical field
Patent of the present invention relates to a kind of encapsulation field based on framework csp, further says that a kind of employing plants framework csp packaging part and the manufacture craft thereof of ball optimisation technique, belongs to integrated antenna package technical field.
Background technology
CSP (Chip Scale Package) encapsulation is the meaning of wafer-level package.CSP encapsulation is the memory chip encapsulation technology of latest generation, compares with BGA encapsulation, and under equal space, CSP encapsulation can improve memory capacity three times.Not only volume is little for CSP encapsulation internal memory, simultaneously also thinner, has greatly improved the reliability of memory chip after long-play, and line impedance significantly reduces, and the chip speed of service is also greatly improved thereupon.The center pin form of CSP encapsulation memory chip has shortened the conduction distance of signal effectively, and its decay reduces thereupon, and anti-interference, the noiseproof feature of chip also can be increased dramatically, and this also makes the access time ratio of CSP have very big raising.Also there is the features such as many I/O terminal number, good electrical property and good in thermal property.
First design framework redevelopment framework is all wanted in existing csp shell frame products exploitation, and design cycle and construction cycle are all long, makes production cost height and production efficiency lower.
Summary of the invention
Defect for above-mentioned conventional framework, the object of this invention is to provide a kind of employing and plant framework csp packaging part and the manufacture craft thereof of ball optimisation technique, make IC chip in encapsulation process, no longer be subject to the restriction of Frame Design, can directly be connected with framework, save the step of design framework.Because chip no longer needs to make special figure, saved production cost, improve the production capacity of product.
Plant a framework csp packaging part for ball optimisation technique, mainly by lead frame, silver coating, plant ball, chip, bonding line and plastic-sealed body and form.Described lead frame is connected by silver coating with chip, bonding line is connected to lead frame from chip, on silver coating, there is the ball of planting, plastic-sealed body has surrounded lead frame, silver coating, has planted ball, chip and bonding line, chip, bonding line, plants power supply and signalling channel that ball and lead frame have formed circuit.On described lead frame, there is silver coating, on silver coating, have the ball of planting and chip, plant ball at the two ends of chip, silver coating, plant ball and chip all in a side of lead frame.
Plant ball for gold, copper or alloying pellet.
Bonding line is gold thread, copper cash or alloy wire.
Plant a manufacture craft for the framework csp packaging part of ball optimisation technique, main flow process is as follows: on wafer attenuate → scribing → framework silver coating → silver coating, plant ball → upper core → pressure welding → plastic packaging → etched lead frame frame → finished product.
Accompanying drawing explanation
Fig. 1 is lead frame profile;
Fig. 2 is the silver-plated rear profile of lead frame;
Fig. 3 is that lead frame is planted ball profile;
Fig. 4 is product profile after upper core;
Fig. 5 is product profile after pressure welding;
Fig. 6 is plastic packaged products profile;
Fig. 7 is product profile after etched lead frame frame.
In figure, 1 is lead frame, and 2 is silver coating, and 3 for planting ball, and 4 is chip, and 5 is bonding line, and 6 is plastic-sealed body.
embodiment
As shown in the figure, the framework csp packaging part of ball optimisation technique is planted in a kind of employing, mainly by lead frame 1, silver coating 2, plant ball 3, chip 4, bonding line 5 and plastic-sealed body 6 and form.Described lead frame 1 is connected by silver coating 2 with chip 4, bonding line 5 is connected to lead frame 1 from chip 4, on silver coating 2, there is the ball of planting 3, plastic-sealed body 6 has surrounded lead frame 1, silver coating 2, has planted ball 3, chip 4 and bonding line 5, chip 4, bonding line 5, plants power supply and signalling channel that ball 3 and lead frame 1 have formed circuit.On described lead frame 1, there is silver coating 2, on silver coating 2, have the ball of planting 3 and chip 4, plant ball 3 at the two ends of chip 4, silver coating 2, plant ball 3 and chip 4 all in a side of lead frame 1.
Bonding line 5 is gold thread, copper cash or alloy wire.
Plant a manufacture craft for the framework csp packaging part of ball optimisation technique, main flow process is as follows: on wafer attenuate → scribing → framework silver coating → silver coating, plant ball → upper core → pressure welding → plastic packaging → etched lead frame frame → finished product.
As shown in the figure, the manufacture craft of the framework csp packaging part of ball optimisation technique is planted in a kind of employing, and it carries out according to following concrete steps:
(1) wafer attenuate: thickness thinning 50 μ m~200 μ m, roughness Ra 0.10mm~0.05mm;
(2) scribing: the above wafer of 150 μ m is with common Q FN scribing process, but thickness is at the following wafer of 150 μ m, uses double-pole scribing machine and technique thereof;
(3) framework silver coating, on silver coating, plant ball: silver coating 2 and plant ball with conventional csp technique, different, silver coating 2 and plant ball 3 all in the same side of lead frame 1;
(4) upper core, pressure welding, plastic packaging: upper core, pressure welding, plastic packaging are with normal csp technique, different, chip 4 and silver coating 2, plant ball 3 all in the same side of lead frame 1;
(5) etched lead frame frame: complete after plastic packaging at product, use etching solution by after the whole etchings of lead frame 1, silver coating 2 can all expose, and can do contact point and directly form connection.
The present invention can be used for single-chip package and also can be used for multi-chip stacking encapsulation.
The present invention adopts a kind of novel ball technique of planting, this technique is by planting ball, can realize the welding of directly carrying out chip on framework, save the loaded down with trivial details step of design framework and higher production cost, this method flexibility is high, further improve production total value, significantly improve product reliability, and realize and reduce production cost.
Claims (2)
1. a framework csp packaging part for ball optimisation technique is planted in employing, it is characterized in that: mainly by lead frame (1), silver coating (2), plant ball (3), chip (4), bonding line (5) and plastic-sealed body (6) and form; Described lead frame (1) is connected by silver coating (2) with chip (4), bonding line (5) is connected to lead frame (1) from chip (4), on silver coating (2), there is the ball of planting (3), plastic-sealed body (6) has surrounded lead frame (1), silver coating (2), has planted ball (3), chip (4) and bonding line (5), chip (4), bonding line (5), plants power supply and signalling channel that ball (3) and lead frame (1) have formed circuit; On described lead frame (1), there is silver coating (2), on silver coating (2), have the ball of planting (3) and chip (4), plant ball (3) at the two ends of chip (4), silver coating (2), plant ball (3) and chip (4) all in a side of lead frame (1).
2. a manufacture craft for the framework csp packaging part of ball optimisation technique is planted in employing, it is characterized in that: it carries out according to following concrete steps:
(1) wafer attenuate: thickness thinning 50 μ m~200 μ m, roughness Ra 0.10mm~0.05mm;
(2) scribing: the above wafer of 150 μ m is with common Q FN scribing process, but thickness is at the following wafer of 150 μ m, uses double-pole scribing machine and technique thereof;
(3) framework silver coating, on silver coating, plant ball: silver coating (2) and plant ball with conventional csp technique, different, silver coating (2) and plant ball (3) all in the same side of lead frame (1);
(4) upper core, pressure welding, plastic packaging: upper core, pressure welding, plastic packaging are with normal csp technique, different, chip (4) and silver coating (2), plant ball (3) all in the same side of lead frame (1);
(5) etched lead frame frame: complete after plastic packaging at product, use etching solution by after the whole etchings of lead frame (1), silver coating (2) can all expose, and can do contact point and directly form connection.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201310387861.5A CN103560122A (en) | 2013-08-31 | 2013-08-31 | Frame csp package with bumping optimization technology and production process thereof |
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CN201310387861.5A CN103560122A (en) | 2013-08-31 | 2013-08-31 | Frame csp package with bumping optimization technology and production process thereof |
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CN201310387861.5A Pending CN103560122A (en) | 2013-08-31 | 2013-08-31 | Frame csp package with bumping optimization technology and production process thereof |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5894108A (en) * | 1997-02-11 | 1999-04-13 | National Semiconductor Corporation | Plastic package with exposed die |
US20100129964A1 (en) * | 2008-11-26 | 2010-05-27 | Infineon Technologies Ag | Method of manufacturing a semiconductor package with a bump using a carrier |
CN103346135A (en) * | 2013-06-10 | 2013-10-09 | 孙青秀 | Package based on technology that frame is connected through bonding wires and manufacturing process of package |
CN203481221U (en) * | 2013-08-31 | 2014-03-12 | 华天科技(西安)有限公司 | Framework CSP package adopting ball mounting optimization technology |
-
2013
- 2013-08-31 CN CN201310387861.5A patent/CN103560122A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5894108A (en) * | 1997-02-11 | 1999-04-13 | National Semiconductor Corporation | Plastic package with exposed die |
US20100129964A1 (en) * | 2008-11-26 | 2010-05-27 | Infineon Technologies Ag | Method of manufacturing a semiconductor package with a bump using a carrier |
CN103346135A (en) * | 2013-06-10 | 2013-10-09 | 孙青秀 | Package based on technology that frame is connected through bonding wires and manufacturing process of package |
CN203481221U (en) * | 2013-08-31 | 2014-03-12 | 华天科技(西安)有限公司 | Framework CSP package adopting ball mounting optimization technology |
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Application publication date: 20140205 |